xref: /nrf52832-nimble/nordic/nrfx/drivers/src/nrfx_timer.c (revision 150812a83cab50279bd772ef6db1bfaf255f2c5b)
1*150812a8SEvalZero /*
2*150812a8SEvalZero  * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
3*150812a8SEvalZero  * All rights reserved.
4*150812a8SEvalZero  *
5*150812a8SEvalZero  * Redistribution and use in source and binary forms, with or without
6*150812a8SEvalZero  * modification, are permitted provided that the following conditions are met:
7*150812a8SEvalZero  *
8*150812a8SEvalZero  * 1. Redistributions of source code must retain the above copyright notice, this
9*150812a8SEvalZero  *    list of conditions and the following disclaimer.
10*150812a8SEvalZero  *
11*150812a8SEvalZero  * 2. Redistributions in binary form must reproduce the above copyright
12*150812a8SEvalZero  *    notice, this list of conditions and the following disclaimer in the
13*150812a8SEvalZero  *    documentation and/or other materials provided with the distribution.
14*150812a8SEvalZero  *
15*150812a8SEvalZero  * 3. Neither the name of the copyright holder nor the names of its
16*150812a8SEvalZero  *    contributors may be used to endorse or promote products derived from this
17*150812a8SEvalZero  *    software without specific prior written permission.
18*150812a8SEvalZero  *
19*150812a8SEvalZero  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20*150812a8SEvalZero  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21*150812a8SEvalZero  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22*150812a8SEvalZero  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23*150812a8SEvalZero  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24*150812a8SEvalZero  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25*150812a8SEvalZero  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26*150812a8SEvalZero  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27*150812a8SEvalZero  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28*150812a8SEvalZero  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29*150812a8SEvalZero  * POSSIBILITY OF SUCH DAMAGE.
30*150812a8SEvalZero  */
31*150812a8SEvalZero 
32*150812a8SEvalZero #include <nrfx.h>
33*150812a8SEvalZero 
34*150812a8SEvalZero #if NRFX_CHECK(NRFX_TIMER_ENABLED)
35*150812a8SEvalZero 
36*150812a8SEvalZero #if !(NRFX_CHECK(NRFX_TIMER0_ENABLED) || NRFX_CHECK(NRFX_TIMER1_ENABLED) || \
37*150812a8SEvalZero       NRFX_CHECK(NRFX_TIMER2_ENABLED) || NRFX_CHECK(NRFX_TIMER3_ENABLED) || \
38*150812a8SEvalZero       NRFX_CHECK(NRFX_TIMER4_ENABLED))
39*150812a8SEvalZero #error "No enabled TIMER instances. Check <nrfx_config.h>."
40*150812a8SEvalZero #endif
41*150812a8SEvalZero 
42*150812a8SEvalZero #include <nrfx_timer.h>
43*150812a8SEvalZero 
44*150812a8SEvalZero #define NRFX_LOG_MODULE TIMER
45*150812a8SEvalZero #include <nrfx_log.h>
46*150812a8SEvalZero 
47*150812a8SEvalZero /**@brief Timer control block. */
48*150812a8SEvalZero typedef struct
49*150812a8SEvalZero {
50*150812a8SEvalZero     nrfx_timer_event_handler_t handler;
51*150812a8SEvalZero     void *                     context;
52*150812a8SEvalZero     nrfx_drv_state_t           state;
53*150812a8SEvalZero } timer_control_block_t;
54*150812a8SEvalZero 
55*150812a8SEvalZero static timer_control_block_t m_cb[NRFX_TIMER_ENABLED_COUNT];
56*150812a8SEvalZero 
nrfx_timer_init(nrfx_timer_t const * const p_instance,nrfx_timer_config_t const * p_config,nrfx_timer_event_handler_t timer_event_handler)57*150812a8SEvalZero nrfx_err_t nrfx_timer_init(nrfx_timer_t const * const  p_instance,
58*150812a8SEvalZero                            nrfx_timer_config_t const * p_config,
59*150812a8SEvalZero                            nrfx_timer_event_handler_t  timer_event_handler)
60*150812a8SEvalZero {
61*150812a8SEvalZero     timer_control_block_t * p_cb = &m_cb[p_instance->instance_id];
62*150812a8SEvalZero #ifdef SOFTDEVICE_PRESENT
63*150812a8SEvalZero     NRFX_ASSERT(p_instance->p_reg != NRF_TIMER0);
64*150812a8SEvalZero #endif
65*150812a8SEvalZero     NRFX_ASSERT(p_config);
66*150812a8SEvalZero     NRFX_ASSERT(timer_event_handler);
67*150812a8SEvalZero 
68*150812a8SEvalZero     nrfx_err_t err_code;
69*150812a8SEvalZero 
70*150812a8SEvalZero     if (p_cb->state != NRFX_DRV_STATE_UNINITIALIZED)
71*150812a8SEvalZero     {
72*150812a8SEvalZero         err_code = NRFX_ERROR_INVALID_STATE;
73*150812a8SEvalZero         NRFX_LOG_WARNING("Function: %s, error code: %s.",
74*150812a8SEvalZero                          __func__,
75*150812a8SEvalZero                          NRFX_LOG_ERROR_STRING_GET(err_code));
76*150812a8SEvalZero         return err_code;
77*150812a8SEvalZero     }
78*150812a8SEvalZero 
79*150812a8SEvalZero     /* Warning 685: Relational operator '<=' always evaluates to 'true'"
80*150812a8SEvalZero      * Warning in NRF_TIMER_IS_BIT_WIDTH_VALID macro. Macro validate timers resolution.
81*150812a8SEvalZero      * Not necessary in nRF52 based systems. Obligatory in nRF51 based systems.
82*150812a8SEvalZero      */
83*150812a8SEvalZero 
84*150812a8SEvalZero     /*lint -save -e685 */
85*150812a8SEvalZero 
86*150812a8SEvalZero     NRFX_ASSERT(NRF_TIMER_IS_BIT_WIDTH_VALID(p_instance->p_reg, p_config->bit_width));
87*150812a8SEvalZero 
88*150812a8SEvalZero     //lint -restore
89*150812a8SEvalZero 
90*150812a8SEvalZero     p_cb->handler = timer_event_handler;
91*150812a8SEvalZero     p_cb->context = p_config->p_context;
92*150812a8SEvalZero 
93*150812a8SEvalZero     uint8_t i;
94*150812a8SEvalZero     for (i = 0; i < p_instance->cc_channel_count; ++i)
95*150812a8SEvalZero     {
96*150812a8SEvalZero         nrf_timer_event_clear(p_instance->p_reg,
97*150812a8SEvalZero                               nrf_timer_compare_event_get(i));
98*150812a8SEvalZero     }
99*150812a8SEvalZero 
100*150812a8SEvalZero     NRFX_IRQ_PRIORITY_SET(nrfx_get_irq_number(p_instance->p_reg),
101*150812a8SEvalZero         p_config->interrupt_priority);
102*150812a8SEvalZero     NRFX_IRQ_ENABLE(nrfx_get_irq_number(p_instance->p_reg));
103*150812a8SEvalZero 
104*150812a8SEvalZero     nrf_timer_mode_set(p_instance->p_reg, p_config->mode);
105*150812a8SEvalZero     nrf_timer_bit_width_set(p_instance->p_reg, p_config->bit_width);
106*150812a8SEvalZero     nrf_timer_frequency_set(p_instance->p_reg, p_config->frequency);
107*150812a8SEvalZero 
108*150812a8SEvalZero     p_cb->state = NRFX_DRV_STATE_INITIALIZED;
109*150812a8SEvalZero 
110*150812a8SEvalZero     err_code = NRFX_SUCCESS;
111*150812a8SEvalZero     NRFX_LOG_INFO("Function: %s, error code: %s.",
112*150812a8SEvalZero                   __func__,
113*150812a8SEvalZero                   NRFX_LOG_ERROR_STRING_GET(err_code));
114*150812a8SEvalZero     return err_code;
115*150812a8SEvalZero }
116*150812a8SEvalZero 
nrfx_timer_uninit(nrfx_timer_t const * const p_instance)117*150812a8SEvalZero void nrfx_timer_uninit(nrfx_timer_t const * const p_instance)
118*150812a8SEvalZero {
119*150812a8SEvalZero     NRFX_IRQ_DISABLE(nrfx_get_irq_number(p_instance->p_reg));
120*150812a8SEvalZero 
121*150812a8SEvalZero     #define DISABLE_ALL UINT32_MAX
122*150812a8SEvalZero     nrf_timer_shorts_disable(p_instance->p_reg, DISABLE_ALL);
123*150812a8SEvalZero     nrf_timer_int_disable(p_instance->p_reg, DISABLE_ALL);
124*150812a8SEvalZero     #undef DISABLE_ALL
125*150812a8SEvalZero 
126*150812a8SEvalZero     nrfx_timer_disable(p_instance);
127*150812a8SEvalZero 
128*150812a8SEvalZero     m_cb[p_instance->instance_id].state = NRFX_DRV_STATE_UNINITIALIZED;
129*150812a8SEvalZero     NRFX_LOG_INFO("Uninitialized instance: %d.", p_instance->instance_id);
130*150812a8SEvalZero }
131*150812a8SEvalZero 
nrfx_timer_enable(nrfx_timer_t const * const p_instance)132*150812a8SEvalZero void nrfx_timer_enable(nrfx_timer_t const * const p_instance)
133*150812a8SEvalZero {
134*150812a8SEvalZero     NRFX_ASSERT(m_cb[p_instance->instance_id].state == NRFX_DRV_STATE_INITIALIZED);
135*150812a8SEvalZero     nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_START);
136*150812a8SEvalZero     m_cb[p_instance->instance_id].state = NRFX_DRV_STATE_POWERED_ON;
137*150812a8SEvalZero     NRFX_LOG_INFO("Enabled instance: %d.", p_instance->instance_id);
138*150812a8SEvalZero }
139*150812a8SEvalZero 
nrfx_timer_disable(nrfx_timer_t const * const p_instance)140*150812a8SEvalZero void nrfx_timer_disable(nrfx_timer_t const * const p_instance)
141*150812a8SEvalZero {
142*150812a8SEvalZero     NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
143*150812a8SEvalZero     nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_SHUTDOWN);
144*150812a8SEvalZero     m_cb[p_instance->instance_id].state = NRFX_DRV_STATE_INITIALIZED;
145*150812a8SEvalZero     NRFX_LOG_INFO("Disabled instance: %d.", p_instance->instance_id);
146*150812a8SEvalZero }
147*150812a8SEvalZero 
nrfx_timer_is_enabled(nrfx_timer_t const * const p_instance)148*150812a8SEvalZero bool nrfx_timer_is_enabled(nrfx_timer_t const * const p_instance)
149*150812a8SEvalZero {
150*150812a8SEvalZero     NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
151*150812a8SEvalZero     return (m_cb[p_instance->instance_id].state == NRFX_DRV_STATE_POWERED_ON);
152*150812a8SEvalZero }
153*150812a8SEvalZero 
nrfx_timer_resume(nrfx_timer_t const * const p_instance)154*150812a8SEvalZero void nrfx_timer_resume(nrfx_timer_t const * const p_instance)
155*150812a8SEvalZero {
156*150812a8SEvalZero     NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
157*150812a8SEvalZero     nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_START);
158*150812a8SEvalZero     NRFX_LOG_INFO("Resumed instance: %d.", p_instance->instance_id);
159*150812a8SEvalZero }
160*150812a8SEvalZero 
nrfx_timer_pause(nrfx_timer_t const * const p_instance)161*150812a8SEvalZero void nrfx_timer_pause(nrfx_timer_t const * const p_instance)
162*150812a8SEvalZero {
163*150812a8SEvalZero     NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
164*150812a8SEvalZero     nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_STOP);
165*150812a8SEvalZero     NRFX_LOG_INFO("Paused instance: %d.", p_instance->instance_id);
166*150812a8SEvalZero }
167*150812a8SEvalZero 
nrfx_timer_clear(nrfx_timer_t const * const p_instance)168*150812a8SEvalZero void nrfx_timer_clear(nrfx_timer_t const * const p_instance)
169*150812a8SEvalZero {
170*150812a8SEvalZero     NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
171*150812a8SEvalZero     nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_CLEAR);
172*150812a8SEvalZero }
173*150812a8SEvalZero 
nrfx_timer_increment(nrfx_timer_t const * const p_instance)174*150812a8SEvalZero void nrfx_timer_increment(nrfx_timer_t const * const p_instance)
175*150812a8SEvalZero {
176*150812a8SEvalZero     NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
177*150812a8SEvalZero     NRFX_ASSERT(nrf_timer_mode_get(p_instance->p_reg) != NRF_TIMER_MODE_TIMER);
178*150812a8SEvalZero 
179*150812a8SEvalZero     nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_COUNT);
180*150812a8SEvalZero }
181*150812a8SEvalZero 
nrfx_timer_capture(nrfx_timer_t const * const p_instance,nrf_timer_cc_channel_t cc_channel)182*150812a8SEvalZero uint32_t nrfx_timer_capture(nrfx_timer_t const * const p_instance,
183*150812a8SEvalZero                             nrf_timer_cc_channel_t     cc_channel)
184*150812a8SEvalZero {
185*150812a8SEvalZero     NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
186*150812a8SEvalZero     NRFX_ASSERT(cc_channel < p_instance->cc_channel_count);
187*150812a8SEvalZero 
188*150812a8SEvalZero     nrf_timer_task_trigger(p_instance->p_reg,
189*150812a8SEvalZero         nrf_timer_capture_task_get(cc_channel));
190*150812a8SEvalZero     return nrf_timer_cc_read(p_instance->p_reg, cc_channel);
191*150812a8SEvalZero }
192*150812a8SEvalZero 
nrfx_timer_compare(nrfx_timer_t const * const p_instance,nrf_timer_cc_channel_t cc_channel,uint32_t cc_value,bool enable_int)193*150812a8SEvalZero void nrfx_timer_compare(nrfx_timer_t const * const p_instance,
194*150812a8SEvalZero                         nrf_timer_cc_channel_t     cc_channel,
195*150812a8SEvalZero                         uint32_t                   cc_value,
196*150812a8SEvalZero                         bool                       enable_int)
197*150812a8SEvalZero {
198*150812a8SEvalZero     nrf_timer_int_mask_t timer_int = nrf_timer_compare_int_get(cc_channel);
199*150812a8SEvalZero 
200*150812a8SEvalZero     if (enable_int)
201*150812a8SEvalZero     {
202*150812a8SEvalZero         nrf_timer_event_clear(p_instance->p_reg, nrf_timer_compare_event_get(cc_channel));
203*150812a8SEvalZero         nrf_timer_int_enable(p_instance->p_reg, timer_int);
204*150812a8SEvalZero     }
205*150812a8SEvalZero     else
206*150812a8SEvalZero     {
207*150812a8SEvalZero         nrf_timer_int_disable(p_instance->p_reg, timer_int);
208*150812a8SEvalZero     }
209*150812a8SEvalZero 
210*150812a8SEvalZero     nrf_timer_cc_write(p_instance->p_reg, cc_channel, cc_value);
211*150812a8SEvalZero     NRFX_LOG_INFO("Timer id: %d, capture value set: %lu, channel: %d.",
212*150812a8SEvalZero                   p_instance->instance_id,
213*150812a8SEvalZero                   cc_value,
214*150812a8SEvalZero                   cc_channel);
215*150812a8SEvalZero }
216*150812a8SEvalZero 
nrfx_timer_extended_compare(nrfx_timer_t const * const p_instance,nrf_timer_cc_channel_t cc_channel,uint32_t cc_value,nrf_timer_short_mask_t timer_short_mask,bool enable_int)217*150812a8SEvalZero void nrfx_timer_extended_compare(nrfx_timer_t const * const p_instance,
218*150812a8SEvalZero                                  nrf_timer_cc_channel_t     cc_channel,
219*150812a8SEvalZero                                  uint32_t                   cc_value,
220*150812a8SEvalZero                                  nrf_timer_short_mask_t     timer_short_mask,
221*150812a8SEvalZero                                  bool                       enable_int)
222*150812a8SEvalZero {
223*150812a8SEvalZero     nrf_timer_shorts_disable(p_instance->p_reg,
224*150812a8SEvalZero         (TIMER_SHORTS_COMPARE0_STOP_Msk  << cc_channel) |
225*150812a8SEvalZero         (TIMER_SHORTS_COMPARE0_CLEAR_Msk << cc_channel));
226*150812a8SEvalZero 
227*150812a8SEvalZero     nrf_timer_shorts_enable(p_instance->p_reg, timer_short_mask);
228*150812a8SEvalZero 
229*150812a8SEvalZero     nrfx_timer_compare(p_instance,
230*150812a8SEvalZero                        cc_channel,
231*150812a8SEvalZero                        cc_value,
232*150812a8SEvalZero                        enable_int);
233*150812a8SEvalZero     NRFX_LOG_INFO("Timer id: %d, capture value set: %lu, channel: %d.",
234*150812a8SEvalZero                   p_instance->instance_id,
235*150812a8SEvalZero                   cc_value,
236*150812a8SEvalZero                   cc_channel);
237*150812a8SEvalZero }
238*150812a8SEvalZero 
nrfx_timer_compare_int_enable(nrfx_timer_t const * const p_instance,uint32_t channel)239*150812a8SEvalZero void nrfx_timer_compare_int_enable(nrfx_timer_t const * const p_instance,
240*150812a8SEvalZero                                    uint32_t                   channel)
241*150812a8SEvalZero {
242*150812a8SEvalZero     NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
243*150812a8SEvalZero     NRFX_ASSERT(channel < p_instance->cc_channel_count);
244*150812a8SEvalZero 
245*150812a8SEvalZero     nrf_timer_event_clear(p_instance->p_reg,
246*150812a8SEvalZero         nrf_timer_compare_event_get(channel));
247*150812a8SEvalZero     nrf_timer_int_enable(p_instance->p_reg,
248*150812a8SEvalZero         nrf_timer_compare_int_get(channel));
249*150812a8SEvalZero }
250*150812a8SEvalZero 
nrfx_timer_compare_int_disable(nrfx_timer_t const * const p_instance,uint32_t channel)251*150812a8SEvalZero void nrfx_timer_compare_int_disable(nrfx_timer_t const * const p_instance,
252*150812a8SEvalZero                                     uint32_t                   channel)
253*150812a8SEvalZero {
254*150812a8SEvalZero     NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
255*150812a8SEvalZero     NRFX_ASSERT(channel < p_instance->cc_channel_count);
256*150812a8SEvalZero 
257*150812a8SEvalZero     nrf_timer_int_disable(p_instance->p_reg,
258*150812a8SEvalZero         nrf_timer_compare_int_get(channel));
259*150812a8SEvalZero }
260*150812a8SEvalZero 
irq_handler(NRF_TIMER_Type * p_reg,timer_control_block_t * p_cb,uint8_t channel_count)261*150812a8SEvalZero static void irq_handler(NRF_TIMER_Type        * p_reg,
262*150812a8SEvalZero                         timer_control_block_t * p_cb,
263*150812a8SEvalZero                         uint8_t                 channel_count)
264*150812a8SEvalZero {
265*150812a8SEvalZero     uint8_t i;
266*150812a8SEvalZero     for (i = 0; i < channel_count; ++i)
267*150812a8SEvalZero     {
268*150812a8SEvalZero         nrf_timer_event_t event = nrf_timer_compare_event_get(i);
269*150812a8SEvalZero         nrf_timer_int_mask_t int_mask = nrf_timer_compare_int_get(i);
270*150812a8SEvalZero 
271*150812a8SEvalZero         if (nrf_timer_event_check(p_reg, event) &&
272*150812a8SEvalZero             nrf_timer_int_enable_check(p_reg, int_mask))
273*150812a8SEvalZero         {
274*150812a8SEvalZero             nrf_timer_event_clear(p_reg, event);
275*150812a8SEvalZero             NRFX_LOG_DEBUG("Compare event, channel: %d.", i);
276*150812a8SEvalZero             p_cb->handler(event, p_cb->context);
277*150812a8SEvalZero         }
278*150812a8SEvalZero     }
279*150812a8SEvalZero }
280*150812a8SEvalZero 
281*150812a8SEvalZero #if NRFX_CHECK(NRFX_TIMER0_ENABLED)
nrfx_timer_0_irq_handler(void)282*150812a8SEvalZero void nrfx_timer_0_irq_handler(void)
283*150812a8SEvalZero {
284*150812a8SEvalZero     irq_handler(NRF_TIMER0, &m_cb[NRFX_TIMER0_INST_IDX],
285*150812a8SEvalZero         NRF_TIMER_CC_CHANNEL_COUNT(0));
286*150812a8SEvalZero }
287*150812a8SEvalZero #endif
288*150812a8SEvalZero 
289*150812a8SEvalZero #if NRFX_CHECK(NRFX_TIMER1_ENABLED)
nrfx_timer_1_irq_handler(void)290*150812a8SEvalZero void nrfx_timer_1_irq_handler(void)
291*150812a8SEvalZero {
292*150812a8SEvalZero     irq_handler(NRF_TIMER1, &m_cb[NRFX_TIMER1_INST_IDX],
293*150812a8SEvalZero         NRF_TIMER_CC_CHANNEL_COUNT(1));
294*150812a8SEvalZero }
295*150812a8SEvalZero #endif
296*150812a8SEvalZero 
297*150812a8SEvalZero #if NRFX_CHECK(NRFX_TIMER2_ENABLED)
nrfx_timer_2_irq_handler(void)298*150812a8SEvalZero void nrfx_timer_2_irq_handler(void)
299*150812a8SEvalZero {
300*150812a8SEvalZero     irq_handler(NRF_TIMER2, &m_cb[NRFX_TIMER2_INST_IDX],
301*150812a8SEvalZero         NRF_TIMER_CC_CHANNEL_COUNT(2));
302*150812a8SEvalZero }
303*150812a8SEvalZero #endif
304*150812a8SEvalZero 
305*150812a8SEvalZero #if NRFX_CHECK(NRFX_TIMER3_ENABLED)
nrfx_timer_3_irq_handler(void)306*150812a8SEvalZero void nrfx_timer_3_irq_handler(void)
307*150812a8SEvalZero {
308*150812a8SEvalZero     irq_handler(NRF_TIMER3, &m_cb[NRFX_TIMER3_INST_IDX],
309*150812a8SEvalZero         NRF_TIMER_CC_CHANNEL_COUNT(3));
310*150812a8SEvalZero }
311*150812a8SEvalZero #endif
312*150812a8SEvalZero 
313*150812a8SEvalZero #if NRFX_CHECK(NRFX_TIMER4_ENABLED)
nrfx_timer_4_irq_handler(void)314*150812a8SEvalZero void nrfx_timer_4_irq_handler(void)
315*150812a8SEvalZero {
316*150812a8SEvalZero     irq_handler(NRF_TIMER4, &m_cb[NRFX_TIMER4_INST_IDX],
317*150812a8SEvalZero         NRF_TIMER_CC_CHANNEL_COUNT(4));
318*150812a8SEvalZero }
319*150812a8SEvalZero #endif
320*150812a8SEvalZero 
321*150812a8SEvalZero #endif // NRFX_CHECK(NRFX_TIMER_ENABLED)
322