1*150812a8SEvalZero /*
2*150812a8SEvalZero * Copyright (c) 2018, Nordic Semiconductor ASA
3*150812a8SEvalZero * All rights reserved.
4*150812a8SEvalZero *
5*150812a8SEvalZero * Redistribution and use in source and binary forms, with or without
6*150812a8SEvalZero * modification, are permitted provided that the following conditions are met:
7*150812a8SEvalZero *
8*150812a8SEvalZero * 1. Redistributions of source code must retain the above copyright notice, this
9*150812a8SEvalZero * list of conditions and the following disclaimer.
10*150812a8SEvalZero *
11*150812a8SEvalZero * 2. Redistributions in binary form must reproduce the above copyright
12*150812a8SEvalZero * notice, this list of conditions and the following disclaimer in the
13*150812a8SEvalZero * documentation and/or other materials provided with the distribution.
14*150812a8SEvalZero *
15*150812a8SEvalZero * 3. Neither the name of the copyright holder nor the names of its
16*150812a8SEvalZero * contributors may be used to endorse or promote products derived from this
17*150812a8SEvalZero * software without specific prior written permission.
18*150812a8SEvalZero *
19*150812a8SEvalZero * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20*150812a8SEvalZero * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21*150812a8SEvalZero * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22*150812a8SEvalZero * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23*150812a8SEvalZero * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24*150812a8SEvalZero * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25*150812a8SEvalZero * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26*150812a8SEvalZero * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27*150812a8SEvalZero * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28*150812a8SEvalZero * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29*150812a8SEvalZero * POSSIBILITY OF SUCH DAMAGE.
30*150812a8SEvalZero */
31*150812a8SEvalZero
32*150812a8SEvalZero #include <nrfx.h>
33*150812a8SEvalZero
34*150812a8SEvalZero #if NRFX_CHECK(NRFX_DPPI_ENABLED)
35*150812a8SEvalZero
36*150812a8SEvalZero #include <nrfx_dppi.h>
37*150812a8SEvalZero
38*150812a8SEvalZero #define NRFX_LOG_MODULE DPPI
39*150812a8SEvalZero #include <nrfx_log.h>
40*150812a8SEvalZero
41*150812a8SEvalZero #if !defined(NRFX_DPPI_CHANNELS_USED)
42*150812a8SEvalZero // Default mask of DPPI channels reserved for other modules.
43*150812a8SEvalZero #define NRFX_DPPI_CHANNELS_USED 0x00000000uL
44*150812a8SEvalZero #endif
45*150812a8SEvalZero
46*150812a8SEvalZero #if !defined(NRFX_DPPI_GROUPS_USED)
47*150812a8SEvalZero // Default mask of DPPI groups reserved for other modules.
48*150812a8SEvalZero #define NRFX_DPPI_GROUPS_USED 0x00000000uL
49*150812a8SEvalZero #endif
50*150812a8SEvalZero
51*150812a8SEvalZero #define DPPI_AVAILABLE_CHANNELS_MASK \
52*150812a8SEvalZero (((1UL << DPPI_CH_NUM) - 1) & (~NRFX_DPPI_CHANNELS_USED))
53*150812a8SEvalZero
54*150812a8SEvalZero #define DPPI_AVAILABLE_GROUPS_MASK \
55*150812a8SEvalZero (((1UL << DPPI_GROUP_NUM) - 1) & (~NRFX_DPPI_GROUPS_USED))
56*150812a8SEvalZero
57*150812a8SEvalZero /** @brief Set bit at given position. */
58*150812a8SEvalZero #define DPPI_BIT_SET(pos) (1uL << (pos))
59*150812a8SEvalZero
60*150812a8SEvalZero static uint32_t m_allocated_channels;
61*150812a8SEvalZero
62*150812a8SEvalZero static uint8_t m_allocated_groups;
63*150812a8SEvalZero
channel_is_allocated(uint8_t channel)64*150812a8SEvalZero __STATIC_INLINE bool channel_is_allocated(uint8_t channel)
65*150812a8SEvalZero {
66*150812a8SEvalZero return ((m_allocated_channels & DPPI_BIT_SET(channel)) != 0);
67*150812a8SEvalZero }
68*150812a8SEvalZero
group_is_allocated(nrf_dppi_channel_group_t group)69*150812a8SEvalZero __STATIC_INLINE bool group_is_allocated(nrf_dppi_channel_group_t group)
70*150812a8SEvalZero {
71*150812a8SEvalZero return ((m_allocated_groups & DPPI_BIT_SET(group)) != 0);
72*150812a8SEvalZero }
73*150812a8SEvalZero
nrfx_dppi_free(void)74*150812a8SEvalZero void nrfx_dppi_free(void)
75*150812a8SEvalZero {
76*150812a8SEvalZero uint32_t mask = m_allocated_groups;
77*150812a8SEvalZero nrf_dppi_channel_group_t group = NRF_DPPI_CHANNEL_GROUP0;
78*150812a8SEvalZero
79*150812a8SEvalZero // Disable all channels
80*150812a8SEvalZero nrf_dppi_channels_disable(NRF_DPPIC, m_allocated_channels);
81*150812a8SEvalZero
82*150812a8SEvalZero // Clear all groups configurations
83*150812a8SEvalZero while (mask)
84*150812a8SEvalZero {
85*150812a8SEvalZero if (mask & DPPI_BIT_SET(group))
86*150812a8SEvalZero {
87*150812a8SEvalZero nrf_dppi_group_clear(NRF_DPPIC, group);
88*150812a8SEvalZero mask &= ~DPPI_BIT_SET(group);
89*150812a8SEvalZero }
90*150812a8SEvalZero group++;
91*150812a8SEvalZero }
92*150812a8SEvalZero
93*150812a8SEvalZero // Clear all allocated channels.
94*150812a8SEvalZero m_allocated_channels = 0;
95*150812a8SEvalZero
96*150812a8SEvalZero // Clear all allocated groups.
97*150812a8SEvalZero m_allocated_groups = 0;
98*150812a8SEvalZero }
99*150812a8SEvalZero
nrfx_dppi_channel_alloc(uint8_t * p_channel)100*150812a8SEvalZero nrfx_err_t nrfx_dppi_channel_alloc(uint8_t * p_channel)
101*150812a8SEvalZero {
102*150812a8SEvalZero nrfx_err_t err_code;
103*150812a8SEvalZero
104*150812a8SEvalZero // Get mask of available DPPI channels
105*150812a8SEvalZero uint32_t remaining_channels = DPPI_AVAILABLE_CHANNELS_MASK & ~(m_allocated_channels);
106*150812a8SEvalZero uint8_t channel = 0;
107*150812a8SEvalZero
108*150812a8SEvalZero if (!remaining_channels)
109*150812a8SEvalZero {
110*150812a8SEvalZero err_code = NRFX_ERROR_NO_MEM;
111*150812a8SEvalZero NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code));
112*150812a8SEvalZero return err_code;
113*150812a8SEvalZero }
114*150812a8SEvalZero
115*150812a8SEvalZero // Find first free channel
116*150812a8SEvalZero while (!(remaining_channels & DPPI_BIT_SET(channel)))
117*150812a8SEvalZero {
118*150812a8SEvalZero channel++;
119*150812a8SEvalZero }
120*150812a8SEvalZero
121*150812a8SEvalZero m_allocated_channels |= DPPI_BIT_SET(channel);
122*150812a8SEvalZero *p_channel = channel;
123*150812a8SEvalZero
124*150812a8SEvalZero err_code = NRFX_SUCCESS;
125*150812a8SEvalZero NRFX_LOG_INFO("Allocated channel: %d.", channel);
126*150812a8SEvalZero return err_code;
127*150812a8SEvalZero }
128*150812a8SEvalZero
nrfx_dppi_channel_free(uint8_t channel)129*150812a8SEvalZero nrfx_err_t nrfx_dppi_channel_free(uint8_t channel)
130*150812a8SEvalZero {
131*150812a8SEvalZero nrfx_err_t err_code = NRFX_SUCCESS;
132*150812a8SEvalZero
133*150812a8SEvalZero if (!channel_is_allocated(channel))
134*150812a8SEvalZero {
135*150812a8SEvalZero err_code = NRFX_ERROR_INVALID_PARAM;
136*150812a8SEvalZero }
137*150812a8SEvalZero else
138*150812a8SEvalZero {
139*150812a8SEvalZero // First disable this channel
140*150812a8SEvalZero nrf_dppi_channels_disable(NRF_DPPIC, DPPI_BIT_SET(channel));
141*150812a8SEvalZero // Clear channel allocated indication.
142*150812a8SEvalZero m_allocated_channels &= ~DPPI_BIT_SET(channel);
143*150812a8SEvalZero }
144*150812a8SEvalZero NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code));
145*150812a8SEvalZero return err_code;
146*150812a8SEvalZero }
147*150812a8SEvalZero
nrfx_dppi_channel_enable(uint8_t channel)148*150812a8SEvalZero nrfx_err_t nrfx_dppi_channel_enable(uint8_t channel)
149*150812a8SEvalZero {
150*150812a8SEvalZero nrfx_err_t err_code = NRFX_SUCCESS;
151*150812a8SEvalZero
152*150812a8SEvalZero if (!channel_is_allocated(channel))
153*150812a8SEvalZero {
154*150812a8SEvalZero err_code = NRFX_ERROR_INVALID_PARAM;
155*150812a8SEvalZero }
156*150812a8SEvalZero else
157*150812a8SEvalZero {
158*150812a8SEvalZero nrf_dppi_channels_enable(NRF_DPPIC, DPPI_BIT_SET(channel));
159*150812a8SEvalZero }
160*150812a8SEvalZero NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code));
161*150812a8SEvalZero return err_code;
162*150812a8SEvalZero }
163*150812a8SEvalZero
nrfx_dppi_channel_disable(uint8_t channel)164*150812a8SEvalZero nrfx_err_t nrfx_dppi_channel_disable(uint8_t channel)
165*150812a8SEvalZero {
166*150812a8SEvalZero nrfx_err_t err_code = NRFX_SUCCESS;
167*150812a8SEvalZero
168*150812a8SEvalZero if (!channel_is_allocated(channel))
169*150812a8SEvalZero {
170*150812a8SEvalZero err_code = NRFX_ERROR_INVALID_PARAM;
171*150812a8SEvalZero }
172*150812a8SEvalZero else
173*150812a8SEvalZero {
174*150812a8SEvalZero nrf_dppi_channels_disable(NRF_DPPIC, DPPI_BIT_SET(channel));
175*150812a8SEvalZero err_code = NRFX_SUCCESS;
176*150812a8SEvalZero }
177*150812a8SEvalZero NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code));
178*150812a8SEvalZero return err_code;
179*150812a8SEvalZero }
180*150812a8SEvalZero
nrfx_dppi_group_alloc(nrf_dppi_channel_group_t * p_group)181*150812a8SEvalZero nrfx_err_t nrfx_dppi_group_alloc(nrf_dppi_channel_group_t * p_group)
182*150812a8SEvalZero {
183*150812a8SEvalZero nrfx_err_t err_code;
184*150812a8SEvalZero
185*150812a8SEvalZero // Get mask of available DPPI groups
186*150812a8SEvalZero uint32_t remaining_groups = DPPI_AVAILABLE_GROUPS_MASK & ~(m_allocated_groups);
187*150812a8SEvalZero nrf_dppi_channel_group_t group = NRF_DPPI_CHANNEL_GROUP0;
188*150812a8SEvalZero
189*150812a8SEvalZero if (!remaining_groups)
190*150812a8SEvalZero {
191*150812a8SEvalZero err_code = NRFX_ERROR_NO_MEM;
192*150812a8SEvalZero NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code));
193*150812a8SEvalZero return err_code;
194*150812a8SEvalZero }
195*150812a8SEvalZero
196*150812a8SEvalZero // Find first free group
197*150812a8SEvalZero while (!(remaining_groups & DPPI_BIT_SET(group)))
198*150812a8SEvalZero {
199*150812a8SEvalZero group++;
200*150812a8SEvalZero }
201*150812a8SEvalZero
202*150812a8SEvalZero m_allocated_groups |= DPPI_BIT_SET(group);
203*150812a8SEvalZero *p_group = group;
204*150812a8SEvalZero
205*150812a8SEvalZero err_code = NRFX_SUCCESS;
206*150812a8SEvalZero NRFX_LOG_INFO("Allocated channel: %d.", group);
207*150812a8SEvalZero return err_code;
208*150812a8SEvalZero }
209*150812a8SEvalZero
nrfx_dppi_group_free(nrf_dppi_channel_group_t group)210*150812a8SEvalZero nrfx_err_t nrfx_dppi_group_free(nrf_dppi_channel_group_t group)
211*150812a8SEvalZero {
212*150812a8SEvalZero nrfx_err_t err_code = NRFX_SUCCESS;
213*150812a8SEvalZero
214*150812a8SEvalZero if (!group_is_allocated(group))
215*150812a8SEvalZero {
216*150812a8SEvalZero err_code = NRFX_ERROR_INVALID_PARAM;
217*150812a8SEvalZero }
218*150812a8SEvalZero else
219*150812a8SEvalZero {
220*150812a8SEvalZero nrf_dppi_group_disable(NRF_DPPIC, group);
221*150812a8SEvalZero // Set bit value to zero at position corresponding to the group number.
222*150812a8SEvalZero m_allocated_groups &= ~DPPI_BIT_SET(group);
223*150812a8SEvalZero }
224*150812a8SEvalZero NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code));
225*150812a8SEvalZero return err_code;
226*150812a8SEvalZero }
227*150812a8SEvalZero
nrfx_dppi_channel_include_in_group(uint8_t channel,nrf_dppi_channel_group_t group)228*150812a8SEvalZero nrfx_err_t nrfx_dppi_channel_include_in_group(uint8_t channel,
229*150812a8SEvalZero nrf_dppi_channel_group_t group)
230*150812a8SEvalZero {
231*150812a8SEvalZero nrfx_err_t err_code = NRFX_SUCCESS;
232*150812a8SEvalZero
233*150812a8SEvalZero if (!group_is_allocated(group) || !channel_is_allocated(channel))
234*150812a8SEvalZero {
235*150812a8SEvalZero err_code = NRFX_ERROR_INVALID_PARAM;
236*150812a8SEvalZero }
237*150812a8SEvalZero else
238*150812a8SEvalZero {
239*150812a8SEvalZero nrf_dppi_channels_include_in_group(NRF_DPPIC, DPPI_BIT_SET(channel), group);
240*150812a8SEvalZero }
241*150812a8SEvalZero NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code));
242*150812a8SEvalZero return err_code;
243*150812a8SEvalZero }
244*150812a8SEvalZero
nrfx_dppi_channel_remove_from_group(uint8_t channel,nrf_dppi_channel_group_t group)245*150812a8SEvalZero nrfx_err_t nrfx_dppi_channel_remove_from_group(uint8_t channel,
246*150812a8SEvalZero nrf_dppi_channel_group_t group)
247*150812a8SEvalZero {
248*150812a8SEvalZero nrfx_err_t err_code = NRFX_SUCCESS;
249*150812a8SEvalZero
250*150812a8SEvalZero if (!group_is_allocated(group) || !channel_is_allocated(channel))
251*150812a8SEvalZero {
252*150812a8SEvalZero err_code = NRFX_ERROR_INVALID_PARAM;
253*150812a8SEvalZero }
254*150812a8SEvalZero else
255*150812a8SEvalZero {
256*150812a8SEvalZero nrf_dppi_channels_remove_from_group(NRF_DPPIC, DPPI_BIT_SET(channel), group);
257*150812a8SEvalZero }
258*150812a8SEvalZero NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code));
259*150812a8SEvalZero return err_code;
260*150812a8SEvalZero }
261*150812a8SEvalZero
nrfx_dppi_group_clear(nrf_dppi_channel_group_t group)262*150812a8SEvalZero nrfx_err_t nrfx_dppi_group_clear(nrf_dppi_channel_group_t group)
263*150812a8SEvalZero {
264*150812a8SEvalZero nrfx_err_t err_code = NRFX_SUCCESS;
265*150812a8SEvalZero
266*150812a8SEvalZero if (!group_is_allocated(group))
267*150812a8SEvalZero {
268*150812a8SEvalZero err_code = NRFX_ERROR_INVALID_PARAM;
269*150812a8SEvalZero }
270*150812a8SEvalZero else
271*150812a8SEvalZero {
272*150812a8SEvalZero nrf_dppi_channels_remove_from_group(NRF_DPPIC, DPPI_AVAILABLE_CHANNELS_MASK, group);
273*150812a8SEvalZero }
274*150812a8SEvalZero NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code));
275*150812a8SEvalZero return err_code;
276*150812a8SEvalZero }
277*150812a8SEvalZero
nrfx_dppi_group_enable(nrf_dppi_channel_group_t group)278*150812a8SEvalZero nrfx_err_t nrfx_dppi_group_enable(nrf_dppi_channel_group_t group)
279*150812a8SEvalZero {
280*150812a8SEvalZero nrfx_err_t err_code = NRFX_SUCCESS;
281*150812a8SEvalZero
282*150812a8SEvalZero if (!group_is_allocated(group))
283*150812a8SEvalZero {
284*150812a8SEvalZero err_code = NRFX_ERROR_INVALID_PARAM;
285*150812a8SEvalZero }
286*150812a8SEvalZero else
287*150812a8SEvalZero {
288*150812a8SEvalZero nrf_dppi_group_enable(NRF_DPPIC, group);
289*150812a8SEvalZero }
290*150812a8SEvalZero NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code));
291*150812a8SEvalZero return err_code;
292*150812a8SEvalZero }
293*150812a8SEvalZero
nrfx_dppi_group_disable(nrf_dppi_channel_group_t group)294*150812a8SEvalZero nrfx_err_t nrfx_dppi_group_disable(nrf_dppi_channel_group_t group)
295*150812a8SEvalZero {
296*150812a8SEvalZero nrfx_err_t err_code = NRFX_SUCCESS;
297*150812a8SEvalZero
298*150812a8SEvalZero if (!group_is_allocated(group))
299*150812a8SEvalZero {
300*150812a8SEvalZero err_code = NRFX_ERROR_INVALID_PARAM;
301*150812a8SEvalZero }
302*150812a8SEvalZero else
303*150812a8SEvalZero {
304*150812a8SEvalZero nrf_dppi_group_disable(NRF_DPPIC, group);
305*150812a8SEvalZero }
306*150812a8SEvalZero NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code));
307*150812a8SEvalZero return err_code;
308*150812a8SEvalZero }
309*150812a8SEvalZero
310*150812a8SEvalZero #endif // NRFX_CHECK(NRFX_DPPI_ENABLED)
311