1*150812a8SEvalZero /*
2*150812a8SEvalZero * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
3*150812a8SEvalZero * All rights reserved.
4*150812a8SEvalZero *
5*150812a8SEvalZero * Redistribution and use in source and binary forms, with or without
6*150812a8SEvalZero * modification, are permitted provided that the following conditions are met:
7*150812a8SEvalZero *
8*150812a8SEvalZero * 1. Redistributions of source code must retain the above copyright notice, this
9*150812a8SEvalZero * list of conditions and the following disclaimer.
10*150812a8SEvalZero *
11*150812a8SEvalZero * 2. Redistributions in binary form must reproduce the above copyright
12*150812a8SEvalZero * notice, this list of conditions and the following disclaimer in the
13*150812a8SEvalZero * documentation and/or other materials provided with the distribution.
14*150812a8SEvalZero *
15*150812a8SEvalZero * 3. Neither the name of the copyright holder nor the names of its
16*150812a8SEvalZero * contributors may be used to endorse or promote products derived from this
17*150812a8SEvalZero * software without specific prior written permission.
18*150812a8SEvalZero *
19*150812a8SEvalZero * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20*150812a8SEvalZero * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21*150812a8SEvalZero * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22*150812a8SEvalZero * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23*150812a8SEvalZero * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24*150812a8SEvalZero * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25*150812a8SEvalZero * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26*150812a8SEvalZero * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27*150812a8SEvalZero * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28*150812a8SEvalZero * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29*150812a8SEvalZero * POSSIBILITY OF SUCH DAMAGE.
30*150812a8SEvalZero */
31*150812a8SEvalZero
32*150812a8SEvalZero #include <nrfx.h>
33*150812a8SEvalZero
34*150812a8SEvalZero #if NRFX_CHECK(NRFX_ADC_ENABLED)
35*150812a8SEvalZero
36*150812a8SEvalZero #include <nrfx_adc.h>
37*150812a8SEvalZero
38*150812a8SEvalZero #define NRFX_LOG_MODULE ADC
39*150812a8SEvalZero #include <nrfx_log.h>
40*150812a8SEvalZero
41*150812a8SEvalZero #define EVT_TO_STR(event) (event == NRF_ADC_EVENT_END ? "NRF_ADC_EVENT_END" : "UNKNOWN EVENT")
42*150812a8SEvalZero
43*150812a8SEvalZero typedef struct
44*150812a8SEvalZero {
45*150812a8SEvalZero nrfx_adc_event_handler_t event_handler;
46*150812a8SEvalZero nrfx_adc_channel_t * p_head;
47*150812a8SEvalZero nrfx_adc_channel_t * p_current_conv;
48*150812a8SEvalZero nrf_adc_value_t * p_buffer;
49*150812a8SEvalZero uint16_t size;
50*150812a8SEvalZero uint16_t idx;
51*150812a8SEvalZero nrfx_drv_state_t state;
52*150812a8SEvalZero } adc_cb_t;
53*150812a8SEvalZero
54*150812a8SEvalZero static adc_cb_t m_cb;
55*150812a8SEvalZero
nrfx_adc_init(nrfx_adc_config_t const * p_config,nrfx_adc_event_handler_t event_handler)56*150812a8SEvalZero nrfx_err_t nrfx_adc_init(nrfx_adc_config_t const * p_config,
57*150812a8SEvalZero nrfx_adc_event_handler_t event_handler)
58*150812a8SEvalZero {
59*150812a8SEvalZero NRFX_ASSERT(p_config);
60*150812a8SEvalZero nrfx_err_t err_code;
61*150812a8SEvalZero
62*150812a8SEvalZero if (m_cb.state != NRFX_DRV_STATE_UNINITIALIZED)
63*150812a8SEvalZero {
64*150812a8SEvalZero err_code = NRFX_ERROR_INVALID_STATE;
65*150812a8SEvalZero NRFX_LOG_WARNING("Function: %s, error code: %s.",
66*150812a8SEvalZero __func__,
67*150812a8SEvalZero NRFX_LOG_ERROR_STRING_GET(err_code));
68*150812a8SEvalZero return err_code;
69*150812a8SEvalZero }
70*150812a8SEvalZero
71*150812a8SEvalZero nrf_adc_event_clear(NRF_ADC_EVENT_END);
72*150812a8SEvalZero if (event_handler)
73*150812a8SEvalZero {
74*150812a8SEvalZero NRFX_IRQ_PRIORITY_SET(ADC_IRQn, p_config->interrupt_priority);
75*150812a8SEvalZero NRFX_IRQ_ENABLE(ADC_IRQn);
76*150812a8SEvalZero }
77*150812a8SEvalZero m_cb.event_handler = event_handler;
78*150812a8SEvalZero m_cb.state = NRFX_DRV_STATE_INITIALIZED;
79*150812a8SEvalZero
80*150812a8SEvalZero err_code = NRFX_SUCCESS;
81*150812a8SEvalZero NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code));
82*150812a8SEvalZero return err_code;
83*150812a8SEvalZero }
84*150812a8SEvalZero
nrfx_adc_uninit(void)85*150812a8SEvalZero void nrfx_adc_uninit(void)
86*150812a8SEvalZero {
87*150812a8SEvalZero NRFX_IRQ_DISABLE(ADC_IRQn);
88*150812a8SEvalZero nrf_adc_int_disable(NRF_ADC_INT_END_MASK);
89*150812a8SEvalZero nrf_adc_task_trigger(NRF_ADC_TASK_STOP);
90*150812a8SEvalZero
91*150812a8SEvalZero // Disable all channels. This must be done after the interrupt is disabled
92*150812a8SEvalZero // because adc_sample_process() dereferences this pointer when it needs to
93*150812a8SEvalZero // switch back to the first channel in the list (when the number of samples
94*150812a8SEvalZero // to read is bigger than the number of enabled channels).
95*150812a8SEvalZero m_cb.p_head = NULL;
96*150812a8SEvalZero
97*150812a8SEvalZero m_cb.state = NRFX_DRV_STATE_UNINITIALIZED;
98*150812a8SEvalZero }
99*150812a8SEvalZero
nrfx_adc_channel_enable(nrfx_adc_channel_t * const p_channel)100*150812a8SEvalZero void nrfx_adc_channel_enable(nrfx_adc_channel_t * const p_channel)
101*150812a8SEvalZero {
102*150812a8SEvalZero NRFX_ASSERT(!nrfx_adc_is_busy());
103*150812a8SEvalZero
104*150812a8SEvalZero p_channel->p_next = NULL;
105*150812a8SEvalZero if (m_cb.p_head == NULL)
106*150812a8SEvalZero {
107*150812a8SEvalZero m_cb.p_head = p_channel;
108*150812a8SEvalZero }
109*150812a8SEvalZero else
110*150812a8SEvalZero {
111*150812a8SEvalZero nrfx_adc_channel_t * p_curr_channel = m_cb.p_head;
112*150812a8SEvalZero while (p_curr_channel->p_next != NULL)
113*150812a8SEvalZero {
114*150812a8SEvalZero NRFX_ASSERT(p_channel != p_curr_channel);
115*150812a8SEvalZero p_curr_channel = p_curr_channel->p_next;
116*150812a8SEvalZero }
117*150812a8SEvalZero p_curr_channel->p_next = p_channel;
118*150812a8SEvalZero }
119*150812a8SEvalZero
120*150812a8SEvalZero NRFX_LOG_INFO("Enabled.");
121*150812a8SEvalZero }
122*150812a8SEvalZero
nrfx_adc_channel_disable(nrfx_adc_channel_t * const p_channel)123*150812a8SEvalZero void nrfx_adc_channel_disable(nrfx_adc_channel_t * const p_channel)
124*150812a8SEvalZero {
125*150812a8SEvalZero NRFX_ASSERT(m_cb.p_head);
126*150812a8SEvalZero NRFX_ASSERT(!nrfx_adc_is_busy());
127*150812a8SEvalZero
128*150812a8SEvalZero nrfx_adc_channel_t * p_curr_channel = m_cb.p_head;
129*150812a8SEvalZero nrfx_adc_channel_t * p_prev_channel = NULL;
130*150812a8SEvalZero while (p_curr_channel != p_channel)
131*150812a8SEvalZero {
132*150812a8SEvalZero p_prev_channel = p_curr_channel;
133*150812a8SEvalZero p_curr_channel = p_curr_channel->p_next;
134*150812a8SEvalZero NRFX_ASSERT(p_curr_channel != NULL);
135*150812a8SEvalZero }
136*150812a8SEvalZero if (p_prev_channel)
137*150812a8SEvalZero {
138*150812a8SEvalZero p_prev_channel->p_next = p_curr_channel->p_next;
139*150812a8SEvalZero }
140*150812a8SEvalZero else
141*150812a8SEvalZero {
142*150812a8SEvalZero m_cb.p_head = p_curr_channel->p_next;
143*150812a8SEvalZero }
144*150812a8SEvalZero
145*150812a8SEvalZero NRFX_LOG_INFO("Disabled.");
146*150812a8SEvalZero }
147*150812a8SEvalZero
nrfx_adc_all_channels_disable(void)148*150812a8SEvalZero void nrfx_adc_all_channels_disable(void)
149*150812a8SEvalZero {
150*150812a8SEvalZero NRFX_ASSERT(!nrfx_adc_is_busy());
151*150812a8SEvalZero
152*150812a8SEvalZero m_cb.p_head = NULL;
153*150812a8SEvalZero }
154*150812a8SEvalZero
nrfx_adc_sample(void)155*150812a8SEvalZero void nrfx_adc_sample(void)
156*150812a8SEvalZero {
157*150812a8SEvalZero NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED);
158*150812a8SEvalZero NRFX_ASSERT(!nrf_adc_busy_check());
159*150812a8SEvalZero nrf_adc_task_trigger(NRF_ADC_TASK_START);
160*150812a8SEvalZero }
161*150812a8SEvalZero
nrfx_adc_sample_convert(nrfx_adc_channel_t const * const p_channel,nrf_adc_value_t * p_value)162*150812a8SEvalZero nrfx_err_t nrfx_adc_sample_convert(nrfx_adc_channel_t const * const p_channel,
163*150812a8SEvalZero nrf_adc_value_t * p_value)
164*150812a8SEvalZero {
165*150812a8SEvalZero nrfx_err_t err_code;
166*150812a8SEvalZero
167*150812a8SEvalZero NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED);
168*150812a8SEvalZero if (m_cb.state == NRFX_DRV_STATE_POWERED_ON)
169*150812a8SEvalZero {
170*150812a8SEvalZero err_code = NRFX_ERROR_BUSY;
171*150812a8SEvalZero NRFX_LOG_WARNING("Function: %s, error code: %s.",
172*150812a8SEvalZero __func__,
173*150812a8SEvalZero NRFX_LOG_ERROR_STRING_GET(err_code));
174*150812a8SEvalZero return err_code;
175*150812a8SEvalZero }
176*150812a8SEvalZero else
177*150812a8SEvalZero {
178*150812a8SEvalZero m_cb.state = NRFX_DRV_STATE_POWERED_ON;
179*150812a8SEvalZero
180*150812a8SEvalZero nrf_adc_init(&p_channel->config);
181*150812a8SEvalZero nrf_adc_enable();
182*150812a8SEvalZero nrf_adc_int_disable(NRF_ADC_INT_END_MASK);
183*150812a8SEvalZero nrf_adc_task_trigger(NRF_ADC_TASK_START);
184*150812a8SEvalZero if (p_value)
185*150812a8SEvalZero {
186*150812a8SEvalZero while (!nrf_adc_event_check(NRF_ADC_EVENT_END)) {}
187*150812a8SEvalZero nrf_adc_event_clear(NRF_ADC_EVENT_END);
188*150812a8SEvalZero *p_value = (nrf_adc_value_t)nrf_adc_result_get();
189*150812a8SEvalZero nrf_adc_disable();
190*150812a8SEvalZero
191*150812a8SEvalZero m_cb.state = NRFX_DRV_STATE_INITIALIZED;
192*150812a8SEvalZero }
193*150812a8SEvalZero else
194*150812a8SEvalZero {
195*150812a8SEvalZero NRFX_ASSERT(m_cb.event_handler);
196*150812a8SEvalZero m_cb.p_buffer = NULL;
197*150812a8SEvalZero nrf_adc_int_enable(NRF_ADC_INT_END_MASK);
198*150812a8SEvalZero }
199*150812a8SEvalZero err_code = NRFX_SUCCESS;
200*150812a8SEvalZero NRFX_LOG_INFO("Function: %s, error code: %s.",
201*150812a8SEvalZero __func__,
202*150812a8SEvalZero NRFX_LOG_ERROR_STRING_GET(err_code));
203*150812a8SEvalZero return err_code;
204*150812a8SEvalZero }
205*150812a8SEvalZero }
206*150812a8SEvalZero
adc_sample_process()207*150812a8SEvalZero static bool adc_sample_process()
208*150812a8SEvalZero {
209*150812a8SEvalZero nrf_adc_event_clear(NRF_ADC_EVENT_END);
210*150812a8SEvalZero nrf_adc_disable();
211*150812a8SEvalZero m_cb.p_buffer[m_cb.idx] = (nrf_adc_value_t)nrf_adc_result_get();
212*150812a8SEvalZero m_cb.idx++;
213*150812a8SEvalZero if (m_cb.idx < m_cb.size)
214*150812a8SEvalZero {
215*150812a8SEvalZero bool task_trigger = false;
216*150812a8SEvalZero if (m_cb.p_current_conv->p_next == NULL)
217*150812a8SEvalZero {
218*150812a8SEvalZero // Make sure the list of channels has not been somehow removed
219*150812a8SEvalZero // (it is when all channels are disabled).
220*150812a8SEvalZero NRFX_ASSERT(m_cb.p_head);
221*150812a8SEvalZero
222*150812a8SEvalZero m_cb.p_current_conv = m_cb.p_head;
223*150812a8SEvalZero }
224*150812a8SEvalZero else
225*150812a8SEvalZero {
226*150812a8SEvalZero m_cb.p_current_conv = m_cb.p_current_conv->p_next;
227*150812a8SEvalZero task_trigger = true;
228*150812a8SEvalZero }
229*150812a8SEvalZero nrf_adc_init(&m_cb.p_current_conv->config);
230*150812a8SEvalZero nrf_adc_enable();
231*150812a8SEvalZero if (task_trigger)
232*150812a8SEvalZero {
233*150812a8SEvalZero nrf_adc_task_trigger(NRF_ADC_TASK_START);
234*150812a8SEvalZero }
235*150812a8SEvalZero return false;
236*150812a8SEvalZero }
237*150812a8SEvalZero else
238*150812a8SEvalZero {
239*150812a8SEvalZero return true;
240*150812a8SEvalZero }
241*150812a8SEvalZero }
242*150812a8SEvalZero
nrfx_adc_buffer_convert(nrf_adc_value_t * buffer,uint16_t size)243*150812a8SEvalZero nrfx_err_t nrfx_adc_buffer_convert(nrf_adc_value_t * buffer, uint16_t size)
244*150812a8SEvalZero {
245*150812a8SEvalZero NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED);
246*150812a8SEvalZero
247*150812a8SEvalZero nrfx_err_t err_code;
248*150812a8SEvalZero
249*150812a8SEvalZero NRFX_LOG_INFO("Number of samples requested to convert: %d.", size);
250*150812a8SEvalZero
251*150812a8SEvalZero if (m_cb.state == NRFX_DRV_STATE_POWERED_ON)
252*150812a8SEvalZero {
253*150812a8SEvalZero err_code = NRFX_ERROR_BUSY;
254*150812a8SEvalZero NRFX_LOG_WARNING("Function: %s, error code: %s.",
255*150812a8SEvalZero __func__,
256*150812a8SEvalZero NRFX_LOG_ERROR_STRING_GET(err_code));
257*150812a8SEvalZero return err_code;
258*150812a8SEvalZero }
259*150812a8SEvalZero else
260*150812a8SEvalZero {
261*150812a8SEvalZero m_cb.state = NRFX_DRV_STATE_POWERED_ON;
262*150812a8SEvalZero m_cb.p_current_conv = m_cb.p_head;
263*150812a8SEvalZero m_cb.size = size;
264*150812a8SEvalZero m_cb.idx = 0;
265*150812a8SEvalZero m_cb.p_buffer = buffer;
266*150812a8SEvalZero nrf_adc_init(&m_cb.p_current_conv->config);
267*150812a8SEvalZero nrf_adc_event_clear(NRF_ADC_EVENT_END);
268*150812a8SEvalZero nrf_adc_enable();
269*150812a8SEvalZero if (m_cb.event_handler)
270*150812a8SEvalZero {
271*150812a8SEvalZero nrf_adc_int_enable(NRF_ADC_INT_END_MASK);
272*150812a8SEvalZero }
273*150812a8SEvalZero else
274*150812a8SEvalZero {
275*150812a8SEvalZero while (1)
276*150812a8SEvalZero {
277*150812a8SEvalZero while (!nrf_adc_event_check(NRF_ADC_EVENT_END)){}
278*150812a8SEvalZero
279*150812a8SEvalZero if (adc_sample_process())
280*150812a8SEvalZero {
281*150812a8SEvalZero m_cb.state = NRFX_DRV_STATE_INITIALIZED;
282*150812a8SEvalZero break;
283*150812a8SEvalZero }
284*150812a8SEvalZero }
285*150812a8SEvalZero }
286*150812a8SEvalZero err_code = NRFX_SUCCESS;
287*150812a8SEvalZero NRFX_LOG_INFO("Function: %s, error code: %s.",
288*150812a8SEvalZero __func__,
289*150812a8SEvalZero NRFX_LOG_ERROR_STRING_GET(err_code));
290*150812a8SEvalZero return err_code;
291*150812a8SEvalZero }
292*150812a8SEvalZero }
293*150812a8SEvalZero
nrfx_adc_is_busy(void)294*150812a8SEvalZero bool nrfx_adc_is_busy(void)
295*150812a8SEvalZero {
296*150812a8SEvalZero NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED);
297*150812a8SEvalZero return (m_cb.state == NRFX_DRV_STATE_POWERED_ON) ? true : false;
298*150812a8SEvalZero }
299*150812a8SEvalZero
nrfx_adc_irq_handler(void)300*150812a8SEvalZero void nrfx_adc_irq_handler(void)
301*150812a8SEvalZero {
302*150812a8SEvalZero if (m_cb.p_buffer == NULL)
303*150812a8SEvalZero {
304*150812a8SEvalZero nrf_adc_event_clear(NRF_ADC_EVENT_END);
305*150812a8SEvalZero NRFX_LOG_DEBUG("Event: %s.",NRFX_LOG_ERROR_STRING_GET(NRF_ADC_EVENT_END));
306*150812a8SEvalZero nrf_adc_int_disable(NRF_ADC_INT_END_MASK);
307*150812a8SEvalZero nrf_adc_disable();
308*150812a8SEvalZero nrfx_adc_evt_t evt;
309*150812a8SEvalZero evt.type = NRFX_ADC_EVT_SAMPLE;
310*150812a8SEvalZero evt.data.sample.sample = (nrf_adc_value_t)nrf_adc_result_get();
311*150812a8SEvalZero NRFX_LOG_DEBUG("ADC data:");
312*150812a8SEvalZero NRFX_LOG_HEXDUMP_DEBUG((uint8_t *)(&evt.data.sample.sample), sizeof(nrf_adc_value_t));
313*150812a8SEvalZero m_cb.state = NRFX_DRV_STATE_INITIALIZED;
314*150812a8SEvalZero m_cb.event_handler(&evt);
315*150812a8SEvalZero }
316*150812a8SEvalZero else if (adc_sample_process())
317*150812a8SEvalZero {
318*150812a8SEvalZero NRFX_LOG_DEBUG("Event: %s.", NRFX_LOG_ERROR_STRING_GET(NRF_ADC_EVENT_END));
319*150812a8SEvalZero nrf_adc_int_disable(NRF_ADC_INT_END_MASK);
320*150812a8SEvalZero nrfx_adc_evt_t evt;
321*150812a8SEvalZero evt.type = NRFX_ADC_EVT_DONE;
322*150812a8SEvalZero evt.data.done.p_buffer = m_cb.p_buffer;
323*150812a8SEvalZero evt.data.done.size = m_cb.size;
324*150812a8SEvalZero m_cb.state = NRFX_DRV_STATE_INITIALIZED;
325*150812a8SEvalZero NRFX_LOG_DEBUG("ADC data:");
326*150812a8SEvalZero NRFX_LOG_HEXDUMP_DEBUG((uint8_t *)m_cb.p_buffer, m_cb.size * sizeof(nrf_adc_value_t));
327*150812a8SEvalZero m_cb.event_handler(&evt);
328*150812a8SEvalZero }
329*150812a8SEvalZero }
330*150812a8SEvalZero
331*150812a8SEvalZero #endif // NRFX_CHECK(NRFX_ADC_ENABLED)
332