1*150812a8SEvalZero /*
2*150812a8SEvalZero * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
3*150812a8SEvalZero * All rights reserved.
4*150812a8SEvalZero *
5*150812a8SEvalZero * Redistribution and use in source and binary forms, with or without
6*150812a8SEvalZero * modification, are permitted provided that the following conditions are met:
7*150812a8SEvalZero *
8*150812a8SEvalZero * 1. Redistributions of source code must retain the above copyright notice, this
9*150812a8SEvalZero * list of conditions and the following disclaimer.
10*150812a8SEvalZero *
11*150812a8SEvalZero * 2. Redistributions in binary form must reproduce the above copyright
12*150812a8SEvalZero * notice, this list of conditions and the following disclaimer in the
13*150812a8SEvalZero * documentation and/or other materials provided with the distribution.
14*150812a8SEvalZero *
15*150812a8SEvalZero * 3. Neither the name of the copyright holder nor the names of its
16*150812a8SEvalZero * contributors may be used to endorse or promote products derived from this
17*150812a8SEvalZero * software without specific prior written permission.
18*150812a8SEvalZero *
19*150812a8SEvalZero * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20*150812a8SEvalZero * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21*150812a8SEvalZero * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22*150812a8SEvalZero * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23*150812a8SEvalZero * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24*150812a8SEvalZero * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25*150812a8SEvalZero * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26*150812a8SEvalZero * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27*150812a8SEvalZero * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28*150812a8SEvalZero * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29*150812a8SEvalZero * POSSIBILITY OF SUCH DAMAGE.
30*150812a8SEvalZero */
31*150812a8SEvalZero
32*150812a8SEvalZero #ifndef NRFX_POWER_CLOCK_H__
33*150812a8SEvalZero #define NRFX_POWER_CLOCK_H__
34*150812a8SEvalZero
35*150812a8SEvalZero #include <nrfx.h>
36*150812a8SEvalZero
37*150812a8SEvalZero #ifdef __cplusplus
38*150812a8SEvalZero extern "C" {
39*150812a8SEvalZero #endif
40*150812a8SEvalZero
41*150812a8SEvalZero
42*150812a8SEvalZero __STATIC_INLINE void nrfx_power_clock_irq_init(void);
43*150812a8SEvalZero
44*150812a8SEvalZero #ifndef SUPPRESS_INLINE_IMPLEMENTATION
nrfx_power_clock_irq_init(void)45*150812a8SEvalZero __STATIC_INLINE void nrfx_power_clock_irq_init(void)
46*150812a8SEvalZero {
47*150812a8SEvalZero uint8_t priority;
48*150812a8SEvalZero #if NRFX_CHECK(NRFX_POWER_ENABLED) && NRFX_CHECK(NRFX_CLOCK_ENABLED)
49*150812a8SEvalZero #if NRFX_POWER_CONFIG_IRQ_PRIORITY != NRFX_CLOCK_CONFIG_IRQ_PRIORITY
50*150812a8SEvalZero #error "IRQ priority for POWER and CLOCK have to be the same. Check <nrfx_config.h>."
51*150812a8SEvalZero #endif
52*150812a8SEvalZero priority = NRFX_POWER_CONFIG_IRQ_PRIORITY;
53*150812a8SEvalZero #elif NRFX_CHECK(NRFX_POWER_ENABLED)
54*150812a8SEvalZero priority = NRFX_POWER_CONFIG_IRQ_PRIORITY;
55*150812a8SEvalZero #elif NRFX_CHECK(NRFX_CLOCK_ENABLED)
56*150812a8SEvalZero priority = NRFX_CLOCK_CONFIG_IRQ_PRIORITY;
57*150812a8SEvalZero #endif
58*150812a8SEvalZero
59*150812a8SEvalZero if (!NRFX_IRQ_IS_ENABLED(nrfx_get_irq_number(NRF_CLOCK)))
60*150812a8SEvalZero {
61*150812a8SEvalZero NRFX_IRQ_PRIORITY_SET(nrfx_get_irq_number(NRF_CLOCK), priority);
62*150812a8SEvalZero NRFX_IRQ_ENABLE(nrfx_get_irq_number(NRF_CLOCK));
63*150812a8SEvalZero }
64*150812a8SEvalZero }
65*150812a8SEvalZero #endif // SUPPRESS_INLINE_IMPLEMENTATION
66*150812a8SEvalZero
67*150812a8SEvalZero
68*150812a8SEvalZero #if NRFX_CHECK(NRFX_POWER_ENABLED) && NRFX_CHECK(NRFX_CLOCK_ENABLED)
69*150812a8SEvalZero void nrfx_power_clock_irq_handler(void);
70*150812a8SEvalZero #elif NRFX_CHECK(NRFX_POWER_ENABLED)
71*150812a8SEvalZero #define nrfx_power_irq_handler nrfx_power_clock_irq_handler
72*150812a8SEvalZero #elif NRFX_CHECK(NRFX_CLOCK_ENABLED)
73*150812a8SEvalZero #define nrfx_clock_irq_handler nrfx_power_clock_irq_handler
74*150812a8SEvalZero #endif
75*150812a8SEvalZero
76*150812a8SEvalZero
77*150812a8SEvalZero #ifdef __cplusplus
78*150812a8SEvalZero }
79*150812a8SEvalZero #endif
80*150812a8SEvalZero
81*150812a8SEvalZero #endif // NRFX_POWER_CLOCK_H__
82