1*150812a8SEvalZero /**************************************************************************//** 2*150812a8SEvalZero * @file core_cmInstr.h 3*150812a8SEvalZero * @brief CMSIS Cortex-M Core Instruction Access Header File 4*150812a8SEvalZero * @version V4.30 5*150812a8SEvalZero * @date 20. October 2015 6*150812a8SEvalZero ******************************************************************************/ 7*150812a8SEvalZero /* Copyright (c) 2009 - 2015 ARM LIMITED 8*150812a8SEvalZero 9*150812a8SEvalZero All rights reserved. 10*150812a8SEvalZero Redistribution and use in source and binary forms, with or without 11*150812a8SEvalZero modification, are permitted provided that the following conditions are met: 12*150812a8SEvalZero - Redistributions of source code must retain the above copyright 13*150812a8SEvalZero notice, this list of conditions and the following disclaimer. 14*150812a8SEvalZero - Redistributions in binary form must reproduce the above copyright 15*150812a8SEvalZero notice, this list of conditions and the following disclaimer in the 16*150812a8SEvalZero documentation and/or other materials provided with the distribution. 17*150812a8SEvalZero - Neither the name of ARM nor the names of its contributors may be used 18*150812a8SEvalZero to endorse or promote products derived from this software without 19*150812a8SEvalZero specific prior written permission. 20*150812a8SEvalZero * 21*150812a8SEvalZero THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22*150812a8SEvalZero AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23*150812a8SEvalZero IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24*150812a8SEvalZero ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE 25*150812a8SEvalZero LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26*150812a8SEvalZero CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27*150812a8SEvalZero SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28*150812a8SEvalZero INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29*150812a8SEvalZero CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30*150812a8SEvalZero ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31*150812a8SEvalZero POSSIBILITY OF SUCH DAMAGE. 32*150812a8SEvalZero ---------------------------------------------------------------------------*/ 33*150812a8SEvalZero 34*150812a8SEvalZero 35*150812a8SEvalZero #if defined ( __ICCARM__ ) 36*150812a8SEvalZero #pragma system_include /* treat file as system include file for MISRA check */ 37*150812a8SEvalZero #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 38*150812a8SEvalZero #pragma clang system_header /* treat file as system include file */ 39*150812a8SEvalZero #endif 40*150812a8SEvalZero 41*150812a8SEvalZero #ifndef __CORE_CMINSTR_H 42*150812a8SEvalZero #define __CORE_CMINSTR_H 43*150812a8SEvalZero 44*150812a8SEvalZero 45*150812a8SEvalZero /* ########################## Core Instruction Access ######################### */ 46*150812a8SEvalZero /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface 47*150812a8SEvalZero Access to dedicated instructions 48*150812a8SEvalZero @{ 49*150812a8SEvalZero */ 50*150812a8SEvalZero 51*150812a8SEvalZero /*------------------ RealView Compiler -----------------*/ 52*150812a8SEvalZero #if defined ( __CC_ARM ) 53*150812a8SEvalZero #include "cmsis_armcc.h" 54*150812a8SEvalZero 55*150812a8SEvalZero /*------------------ ARM Compiler V6 -------------------*/ 56*150812a8SEvalZero #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 57*150812a8SEvalZero #include "cmsis_armcc_V6.h" 58*150812a8SEvalZero 59*150812a8SEvalZero /*------------------ GNU Compiler ----------------------*/ 60*150812a8SEvalZero #elif defined ( __GNUC__ ) 61*150812a8SEvalZero #include "cmsis_gcc.h" 62*150812a8SEvalZero 63*150812a8SEvalZero /*------------------ ICC Compiler ----------------------*/ 64*150812a8SEvalZero #elif defined ( __ICCARM__ ) 65*150812a8SEvalZero #include <cmsis_iar.h> 66*150812a8SEvalZero 67*150812a8SEvalZero /*------------------ TI CCS Compiler -------------------*/ 68*150812a8SEvalZero #elif defined ( __TMS470__ ) 69*150812a8SEvalZero #include <cmsis_ccs.h> 70*150812a8SEvalZero 71*150812a8SEvalZero /*------------------ TASKING Compiler ------------------*/ 72*150812a8SEvalZero #elif defined ( __TASKING__ ) 73*150812a8SEvalZero /* 74*150812a8SEvalZero * The CMSIS functions have been implemented as intrinsics in the compiler. 75*150812a8SEvalZero * Please use "carm -?i" to get an up to date list of all intrinsics, 76*150812a8SEvalZero * Including the CMSIS ones. 77*150812a8SEvalZero */ 78*150812a8SEvalZero 79*150812a8SEvalZero /*------------------ COSMIC Compiler -------------------*/ 80*150812a8SEvalZero #elif defined ( __CSMC__ ) 81*150812a8SEvalZero #include <cmsis_csm.h> 82*150812a8SEvalZero 83*150812a8SEvalZero #endif 84*150812a8SEvalZero 85*150812a8SEvalZero /*@}*/ /* end of group CMSIS_Core_InstructionInterface */ 86*150812a8SEvalZero 87*150812a8SEvalZero #endif /* __CORE_CMINSTR_H */ 88