xref: /btstack/src/hci_transport_h4.c (revision 82d05f164db93aa27aedcdc559a0e5578e3c054e)
1bd021c4eSMatthias Ringwald /*
2bd021c4eSMatthias Ringwald  * Copyright (C) 2014 BlueKitchen GmbH
3bd021c4eSMatthias Ringwald  *
4bd021c4eSMatthias Ringwald  * Redistribution and use in source and binary forms, with or without
5bd021c4eSMatthias Ringwald  * modification, are permitted provided that the following conditions
6bd021c4eSMatthias Ringwald  * are met:
7bd021c4eSMatthias Ringwald  *
8bd021c4eSMatthias Ringwald  * 1. Redistributions of source code must retain the above copyright
9bd021c4eSMatthias Ringwald  *    notice, this list of conditions and the following disclaimer.
10bd021c4eSMatthias Ringwald  * 2. Redistributions in binary form must reproduce the above copyright
11bd021c4eSMatthias Ringwald  *    notice, this list of conditions and the following disclaimer in the
12bd021c4eSMatthias Ringwald  *    documentation and/or other materials provided with the distribution.
13bd021c4eSMatthias Ringwald  * 3. Neither the name of the copyright holders nor the names of
14bd021c4eSMatthias Ringwald  *    contributors may be used to endorse or promote products derived
15bd021c4eSMatthias Ringwald  *    from this software without specific prior written permission.
16bd021c4eSMatthias Ringwald  * 4. Any redistribution, use, or modification is done solely for
17bd021c4eSMatthias Ringwald  *    personal benefit and not for any commercial purpose or for
18bd021c4eSMatthias Ringwald  *    monetary gain.
19bd021c4eSMatthias Ringwald  *
20bd021c4eSMatthias Ringwald  * THIS SOFTWARE IS PROVIDED BY BLUEKITCHEN GMBH AND CONTRIBUTORS
21bd021c4eSMatthias Ringwald  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22bd021c4eSMatthias Ringwald  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
23bd021c4eSMatthias Ringwald  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL MATTHIAS
24bd021c4eSMatthias Ringwald  * RINGWALD OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
25bd021c4eSMatthias Ringwald  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
26bd021c4eSMatthias Ringwald  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
27bd021c4eSMatthias Ringwald  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
28bd021c4eSMatthias Ringwald  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29bd021c4eSMatthias Ringwald  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
30bd021c4eSMatthias Ringwald  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31bd021c4eSMatthias Ringwald  * SUCH DAMAGE.
32bd021c4eSMatthias Ringwald  *
33bd021c4eSMatthias Ringwald  * Please inquire about commercial licensing options at
34bd021c4eSMatthias Ringwald  * [email protected]
35bd021c4eSMatthias Ringwald  *
36bd021c4eSMatthias Ringwald  */
37bd021c4eSMatthias Ringwald 
38bd021c4eSMatthias Ringwald /*
39bd021c4eSMatthias Ringwald  *  hci_h4_transport.c
40bd021c4eSMatthias Ringwald  *
41bd021c4eSMatthias Ringwald  *  HCI Transport API implementation for basic H4 protocol over POSIX
42bd021c4eSMatthias Ringwald  *
43bd021c4eSMatthias Ringwald  *  Created by Matthias Ringwald on 4/29/09.
44bd021c4eSMatthias Ringwald  */
45bd021c4eSMatthias Ringwald 
46bd021c4eSMatthias Ringwald #include "btstack_config.h"
47bd021c4eSMatthias Ringwald 
48bd021c4eSMatthias Ringwald #include "btstack_debug.h"
49bd021c4eSMatthias Ringwald #include "hci.h"
50bd021c4eSMatthias Ringwald #include "hci_transport.h"
51bd021c4eSMatthias Ringwald #include "btstack_uart_block.h"
52bd021c4eSMatthias Ringwald 
53307a4fe3SMatthias Ringwald // #ifdef HAVE_EHCILL
54307a4fe3SMatthias Ringwald // #error "HCI Transport H4 POSIX does not support eHCILL yet. Please remove HAVE_EHCILL from your btstack-config.h"
55307a4fe3SMatthias Ringwald // #endif
56307a4fe3SMatthias Ringwald 
57bd021c4eSMatthias Ringwald #ifdef HAVE_EHCILL
58307a4fe3SMatthias Ringwald 
59307a4fe3SMatthias Ringwald // eHCILL commands
60307a4fe3SMatthias Ringwald #define EHCILL_GO_TO_SLEEP_IND 0x030
61307a4fe3SMatthias Ringwald #define EHCILL_GO_TO_SLEEP_ACK 0x031
62307a4fe3SMatthias Ringwald #define EHCILL_WAKE_UP_IND     0x032
63307a4fe3SMatthias Ringwald #define EHCILL_WAKE_UP_ACK     0x033
64307a4fe3SMatthias Ringwald 
65307a4fe3SMatthias Ringwald static void hci_transport_h4_ehcill_handle(uint8_t action);
66307a4fe3SMatthias Ringwald static void hci_transport_h4_ehcill_reset_statemachine(void);
67307a4fe3SMatthias Ringwald static void hci_transport_h4_ehcill_send_ehcill_command(void);
68307a4fe3SMatthias Ringwald static void hci_transport_h4_ehcill_sleep_ack_timer_setup(void);
69307a4fe3SMatthias Ringwald static int  hci_transport_h4_ehcill_outgoing_packet_ready(void);
70307a4fe3SMatthias Ringwald static void hci_transport_h4_ehcill_reactivate_rx(void);
71307a4fe3SMatthias Ringwald static void hci_transport_h4_echill_send_wakeup_ind(void);
72307a4fe3SMatthias Ringwald 
73307a4fe3SMatthias Ringwald typedef enum {
74307a4fe3SMatthias Ringwald     EHCILL_STATE_SLEEP,
75307a4fe3SMatthias Ringwald     EHCILL_STATE_W4_ACK,
76307a4fe3SMatthias Ringwald     EHCILL_STATE_AWAKE
77307a4fe3SMatthias Ringwald } EHCILL_STATE;
78307a4fe3SMatthias Ringwald 
79307a4fe3SMatthias Ringwald // eHCILL state machine
80307a4fe3SMatthias Ringwald static EHCILL_STATE ehcill_state;
81307a4fe3SMatthias Ringwald static uint8_t      ehcill_command_to_send;
82307a4fe3SMatthias Ringwald static uint8_t *    ehcill_defer_rx_buffer;
83307a4fe3SMatthias Ringwald static uint16_t     ehcill_defer_rx_size = 0;
84307a4fe3SMatthias Ringwald 
85307a4fe3SMatthias Ringwald // work around for eHCILL problem
86307a4fe3SMatthias Ringwald static btstack_timer_source_t ehcill_sleep_ack_timer;
87307a4fe3SMatthias Ringwald 
88*82d05f16SMatthias Ringwald static uint8_t * tx_data;
89*82d05f16SMatthias Ringwald 
90bd021c4eSMatthias Ringwald #endif
91bd021c4eSMatthias Ringwald 
92*82d05f16SMatthias Ringwald 
93bd021c4eSMatthias Ringwald // assert pre-buffer for packet type is available
94bd021c4eSMatthias Ringwald #if !defined(HCI_OUTGOING_PRE_BUFFER_SIZE) || (HCI_OUTGOING_PRE_BUFFER_SIZE == 0)
95bd021c4eSMatthias Ringwald #error HCI_OUTGOING_PRE_BUFFER_SIZE not defined. Please update hci.h
96bd021c4eSMatthias Ringwald #endif
97bd021c4eSMatthias Ringwald 
98bd021c4eSMatthias Ringwald static void dummy_handler(uint8_t packet_type, uint8_t *packet, uint16_t size);
99bd021c4eSMatthias Ringwald 
100bd021c4eSMatthias Ringwald typedef enum {
101bd021c4eSMatthias Ringwald     H4_W4_PACKET_TYPE,
102bd021c4eSMatthias Ringwald     H4_W4_EVENT_HEADER,
103bd021c4eSMatthias Ringwald     H4_W4_ACL_HEADER,
104bd021c4eSMatthias Ringwald     H4_W4_SCO_HEADER,
105bd021c4eSMatthias Ringwald     H4_W4_PAYLOAD,
106bd021c4eSMatthias Ringwald } H4_STATE;
107bd021c4eSMatthias Ringwald 
108307a4fe3SMatthias Ringwald typedef enum {
109307a4fe3SMatthias Ringwald     TX_IDLE = 1,
110307a4fe3SMatthias Ringwald     TX_W4_PACKET_SENT,
111307a4fe3SMatthias Ringwald #ifdef HAVE_EHCILL
112307a4fe3SMatthias Ringwald     TX_W4_WAKEUP,
113307a4fe3SMatthias Ringwald     TX_W2_EHCILL_SEND,
114307a4fe3SMatthias Ringwald     TX_W4_EHCILL_SENT,
115307a4fe3SMatthias Ringwald #endif
116307a4fe3SMatthias Ringwald } TX_STATE;
117307a4fe3SMatthias Ringwald 
118bd021c4eSMatthias Ringwald // UART Driver + Config
119bd021c4eSMatthias Ringwald static const btstack_uart_block_t * btstack_uart;
120bd021c4eSMatthias Ringwald static btstack_uart_config_t uart_config;
121bd021c4eSMatthias Ringwald 
122307a4fe3SMatthias Ringwald // write state
123307a4fe3SMatthias Ringwald static TX_STATE tx_state;             // updated from block_sent callback
124307a4fe3SMatthias Ringwald static uint16_t  tx_len;                        // 0 == no outgoing packet
125307a4fe3SMatthias Ringwald static uint8_t packet_sent_event[] = { HCI_EVENT_TRANSPORT_PACKET_SENT, 0};
126bd021c4eSMatthias Ringwald 
127bd021c4eSMatthias Ringwald static  void (*packet_handler)(uint8_t packet_type, uint8_t *packet, uint16_t size) = dummy_handler;
128bd021c4eSMatthias Ringwald 
129bd021c4eSMatthias Ringwald // packet reader state machine
130bd021c4eSMatthias Ringwald static  H4_STATE h4_state;
131bd021c4eSMatthias Ringwald static int bytes_to_read;
132bd021c4eSMatthias Ringwald static int read_pos;
133bd021c4eSMatthias Ringwald 
134bd021c4eSMatthias Ringwald // incoming packet buffer
135bd021c4eSMatthias Ringwald static uint8_t hci_packet_with_pre_buffer[HCI_INCOMING_PRE_BUFFER_SIZE + 1 + HCI_PACKET_BUFFER_SIZE]; // packet type + max(acl header + acl payload, event header + event data)
136bd021c4eSMatthias Ringwald static uint8_t * hci_packet = &hci_packet_with_pre_buffer[HCI_INCOMING_PRE_BUFFER_SIZE];
137bd021c4eSMatthias Ringwald 
138bd021c4eSMatthias Ringwald static int hci_transport_h4_set_baudrate(uint32_t baudrate){
139bd021c4eSMatthias Ringwald     log_info("hci_transport_h4_set_baudrate %u", baudrate);
140bd021c4eSMatthias Ringwald     return btstack_uart->set_baudrate(baudrate);
141bd021c4eSMatthias Ringwald }
142bd021c4eSMatthias Ringwald 
143bd021c4eSMatthias Ringwald static void hci_transport_h4_reset_statemachine(void){
144bd021c4eSMatthias Ringwald     h4_state = H4_W4_PACKET_TYPE;
145bd021c4eSMatthias Ringwald     read_pos = 0;
146bd021c4eSMatthias Ringwald     bytes_to_read = 1;
147bd021c4eSMatthias Ringwald }
148bd021c4eSMatthias Ringwald 
149bd021c4eSMatthias Ringwald static void hci_transport_h4_trigger_next_read(void){
150bd021c4eSMatthias Ringwald     // trigger next read
151bd021c4eSMatthias Ringwald     btstack_uart->receive_block(&hci_packet[read_pos], bytes_to_read);
152bd021c4eSMatthias Ringwald }
153bd021c4eSMatthias Ringwald 
154bd021c4eSMatthias Ringwald static void hci_transport_h4_block_read(void){
155bd021c4eSMatthias Ringwald 
156bd021c4eSMatthias Ringwald     read_pos += bytes_to_read;
157bd021c4eSMatthias Ringwald 
158bd021c4eSMatthias Ringwald     switch (h4_state) {
159bd021c4eSMatthias Ringwald         case H4_W4_PACKET_TYPE:
160bd021c4eSMatthias Ringwald             switch (hci_packet[0]){
161bd021c4eSMatthias Ringwald                 case HCI_EVENT_PACKET:
162bd021c4eSMatthias Ringwald                     bytes_to_read = HCI_EVENT_HEADER_SIZE;
163bd021c4eSMatthias Ringwald                     h4_state = H4_W4_EVENT_HEADER;
164bd021c4eSMatthias Ringwald                     break;
165bd021c4eSMatthias Ringwald                 case HCI_ACL_DATA_PACKET:
166bd021c4eSMatthias Ringwald                     bytes_to_read = HCI_ACL_HEADER_SIZE;
167bd021c4eSMatthias Ringwald                     h4_state = H4_W4_ACL_HEADER;
168bd021c4eSMatthias Ringwald                     break;
169bd021c4eSMatthias Ringwald                 case HCI_SCO_DATA_PACKET:
170bd021c4eSMatthias Ringwald                     bytes_to_read = HCI_SCO_HEADER_SIZE;
171bd021c4eSMatthias Ringwald                     h4_state = H4_W4_SCO_HEADER;
172bd021c4eSMatthias Ringwald                     break;
173307a4fe3SMatthias Ringwald #ifdef HAVE_EHCILL
174307a4fe3SMatthias Ringwald                 case EHCILL_GO_TO_SLEEP_IND:
175307a4fe3SMatthias Ringwald                 case EHCILL_GO_TO_SLEEP_ACK:
176307a4fe3SMatthias Ringwald                 case EHCILL_WAKE_UP_IND:
177307a4fe3SMatthias Ringwald                 case EHCILL_WAKE_UP_ACK:
178307a4fe3SMatthias Ringwald                     bytes_to_read = 1;
179307a4fe3SMatthias Ringwald                     hci_transport_h4_ehcill_handle(hci_packet[0]);
180307a4fe3SMatthias Ringwald                     break;
181307a4fe3SMatthias Ringwald #endif
182bd021c4eSMatthias Ringwald                 default:
183bd021c4eSMatthias Ringwald                     log_error("h4_process: invalid packet type 0x%02x", hci_packet[0]);
184bd021c4eSMatthias Ringwald                     hci_transport_h4_reset_statemachine();
185bd021c4eSMatthias Ringwald                     break;
186bd021c4eSMatthias Ringwald             }
187bd021c4eSMatthias Ringwald             break;
188bd021c4eSMatthias Ringwald 
189bd021c4eSMatthias Ringwald         case H4_W4_EVENT_HEADER:
190bd021c4eSMatthias Ringwald             bytes_to_read = hci_packet[2];
191bd021c4eSMatthias Ringwald             h4_state = H4_W4_PAYLOAD;
192bd021c4eSMatthias Ringwald             break;
193bd021c4eSMatthias Ringwald 
194bd021c4eSMatthias Ringwald         case H4_W4_ACL_HEADER:
195bd021c4eSMatthias Ringwald             bytes_to_read = little_endian_read_16( hci_packet, 3);
196bd021c4eSMatthias Ringwald             // check ACL length
197bd021c4eSMatthias Ringwald             if (HCI_ACL_HEADER_SIZE + bytes_to_read >  HCI_PACKET_BUFFER_SIZE){
198bd021c4eSMatthias Ringwald                 log_error("h4_process: invalid ACL payload len %u - only space for %u", bytes_to_read, HCI_PACKET_BUFFER_SIZE - HCI_ACL_HEADER_SIZE);
199bd021c4eSMatthias Ringwald                 hci_transport_h4_reset_statemachine();
200bd021c4eSMatthias Ringwald                 break;
201bd021c4eSMatthias Ringwald             }
202bd021c4eSMatthias Ringwald             h4_state = H4_W4_PAYLOAD;
203bd021c4eSMatthias Ringwald             break;
204bd021c4eSMatthias Ringwald 
205bd021c4eSMatthias Ringwald         case H4_W4_SCO_HEADER:
206bd021c4eSMatthias Ringwald             bytes_to_read = hci_packet[3];
207bd021c4eSMatthias Ringwald             h4_state = H4_W4_PAYLOAD;
208bd021c4eSMatthias Ringwald             break;
209bd021c4eSMatthias Ringwald 
210bd021c4eSMatthias Ringwald         case H4_W4_PAYLOAD:
211bd021c4eSMatthias Ringwald             packet_handler(hci_packet[0], &hci_packet[1], read_pos-1);
212bd021c4eSMatthias Ringwald             hci_transport_h4_reset_statemachine();
213bd021c4eSMatthias Ringwald             break;
214bd021c4eSMatthias Ringwald         default:
215bd021c4eSMatthias Ringwald             break;
216bd021c4eSMatthias Ringwald     }
217bd021c4eSMatthias Ringwald     hci_transport_h4_trigger_next_read();
218bd021c4eSMatthias Ringwald }
219bd021c4eSMatthias Ringwald 
220307a4fe3SMatthias Ringwald static void hci_transport_h4_block_sent(void){
221307a4fe3SMatthias Ringwald     tx_state = TX_IDLE;
222307a4fe3SMatthias Ringwald     switch (tx_state){
223307a4fe3SMatthias Ringwald         case TX_W4_PACKET_SENT:
224307a4fe3SMatthias Ringwald             // packet fully sent, reset state
225307a4fe3SMatthias Ringwald             tx_len = 0;
226307a4fe3SMatthias Ringwald 
227307a4fe3SMatthias Ringwald #ifdef HAVE_EHCILL
228307a4fe3SMatthias Ringwald             // now, send pending ehcill command if neccessary
229307a4fe3SMatthias Ringwald             switch (ehcill_command_to_send){
230307a4fe3SMatthias Ringwald                 case EHCILL_GO_TO_SLEEP_ACK:
231307a4fe3SMatthias Ringwald                     hci_transport_h4_ehcill_sleep_ack_timer_setup();
232307a4fe3SMatthias Ringwald                     break;
233307a4fe3SMatthias Ringwald                 case EHCILL_WAKE_UP_IND:
234307a4fe3SMatthias Ringwald                     hci_transport_h4_ehcill_send_ehcill_command();
235307a4fe3SMatthias Ringwald                     break;
236307a4fe3SMatthias Ringwald                 default:
237307a4fe3SMatthias Ringwald                     break;
238307a4fe3SMatthias Ringwald             }
239307a4fe3SMatthias Ringwald #endif
240307a4fe3SMatthias Ringwald             // notify upper stack that it can send again
241307a4fe3SMatthias Ringwald             packet_handler(HCI_EVENT_PACKET, &packet_sent_event[0], sizeof(packet_sent_event));
242307a4fe3SMatthias Ringwald             break;
243307a4fe3SMatthias Ringwald 
244307a4fe3SMatthias Ringwald #ifdef HAVE_EHCILL
245307a4fe3SMatthias Ringwald         case TX_W4_EHCILL_SENT: {
246307a4fe3SMatthias Ringwald             int command = ehcill_command_to_send;
247307a4fe3SMatthias Ringwald             ehcill_command_to_send = 0;
248307a4fe3SMatthias Ringwald             if (command == EHCILL_GO_TO_SLEEP_ACK) {
249307a4fe3SMatthias Ringwald                 // UART not needed after EHCILL_GO_TO_SLEEP_ACK was sent
250307a4fe3SMatthias Ringwald                 if (btstack_uart->get_supported_sleep_modes() & BTSTACK_UART_SLEEP_MASK_RTS_HIGH_WAKE_ON_CTS_PULSE){
251307a4fe3SMatthias Ringwald                     btstack_uart->set_sleep(BTSTACK_UART_SLEEP_RTS_HIGH_WAKE_ON_CTS_PULSE);
252307a4fe3SMatthias Ringwald                 } else if (btstack_uart->get_supported_sleep_modes() & BTSTACK_UART_SLEEP_MASK_RTS_LOW_WAKE_ON_RX_EDGE){
253307a4fe3SMatthias Ringwald                     btstack_uart->set_sleep(BTSTACK_UART_SLEEP_RTS_LOW_WAKE_ON_RX_EDGE);
254307a4fe3SMatthias Ringwald                 }
255307a4fe3SMatthias Ringwald             }
256307a4fe3SMatthias Ringwald             if (hci_transport_h4_ehcill_outgoing_packet_ready()){
257307a4fe3SMatthias Ringwald                 // already packet ready? then start wakeup
258307a4fe3SMatthias Ringwald                 btstack_uart->set_sleep(BTSTACK_UART_SLEEP_OFF);
259307a4fe3SMatthias Ringwald                 hci_transport_h4_ehcill_reactivate_rx();
260307a4fe3SMatthias Ringwald                 hci_transport_h4_echill_send_wakeup_ind();
261307a4fe3SMatthias Ringwald             }
262307a4fe3SMatthias Ringwald             // TODO: trigger run loop
263307a4fe3SMatthias Ringwald             // btstack_run_loop_embedded_trigger();
264307a4fe3SMatthias Ringwald             break;
265307a4fe3SMatthias Ringwald         }
266307a4fe3SMatthias Ringwald #endif
267307a4fe3SMatthias Ringwald 
268307a4fe3SMatthias Ringwald         default:
269307a4fe3SMatthias Ringwald             break;
270307a4fe3SMatthias Ringwald     }
271307a4fe3SMatthias Ringwald }
272307a4fe3SMatthias Ringwald 
273307a4fe3SMatthias Ringwald static int hci_transport_h4_can_send_now(uint8_t packet_type){
274307a4fe3SMatthias Ringwald     return tx_state == TX_IDLE;
275307a4fe3SMatthias Ringwald }
276307a4fe3SMatthias Ringwald 
277307a4fe3SMatthias Ringwald static int hci_transport_h4_send_packet(uint8_t packet_type, uint8_t * packet, int size){
278307a4fe3SMatthias Ringwald     // store packet type before actual data and increase size
279307a4fe3SMatthias Ringwald     size++;
280307a4fe3SMatthias Ringwald     packet--;
281307a4fe3SMatthias Ringwald     *packet = packet_type;
282307a4fe3SMatthias Ringwald 
283307a4fe3SMatthias Ringwald     tx_state = TX_W4_PACKET_SENT;
284307a4fe3SMatthias Ringwald 
285307a4fe3SMatthias Ringwald     btstack_uart->send_block(packet, size);
286307a4fe3SMatthias Ringwald     return 0;
287307a4fe3SMatthias Ringwald }
288307a4fe3SMatthias Ringwald 
289bd021c4eSMatthias Ringwald static void hci_transport_h4_init(const void * transport_config){
290bd021c4eSMatthias Ringwald     // check for hci_transport_config_uart_t
291bd021c4eSMatthias Ringwald     if (!transport_config) {
292bd021c4eSMatthias Ringwald         log_error("hci_transport_h4: no config!");
293bd021c4eSMatthias Ringwald         return;
294bd021c4eSMatthias Ringwald     }
295bd021c4eSMatthias Ringwald     if (((hci_transport_config_t*)transport_config)->type != HCI_TRANSPORT_CONFIG_UART) {
296bd021c4eSMatthias Ringwald         log_error("hci_transport_h4: config not of type != HCI_TRANSPORT_CONFIG_UART!");
297bd021c4eSMatthias Ringwald         return;
298bd021c4eSMatthias Ringwald     }
299bd021c4eSMatthias Ringwald 
300bd021c4eSMatthias Ringwald     // extract UART config from transport config
301bd021c4eSMatthias Ringwald     hci_transport_config_uart_t * hci_transport_config_uart = (hci_transport_config_uart_t*) transport_config;
302bd021c4eSMatthias Ringwald     uart_config.baudrate    = hci_transport_config_uart->baudrate_init;
303bd021c4eSMatthias Ringwald     uart_config.flowcontrol = hci_transport_config_uart->flowcontrol;
304bd021c4eSMatthias Ringwald     uart_config.device_name = hci_transport_config_uart->device_name;
305bd021c4eSMatthias Ringwald 
306bd021c4eSMatthias Ringwald     // setup UART driver
307bd021c4eSMatthias Ringwald     btstack_uart->init(&uart_config);
308bd021c4eSMatthias Ringwald     btstack_uart->set_block_received(&hci_transport_h4_block_read);
309bd021c4eSMatthias Ringwald     btstack_uart->set_block_sent(&hci_transport_h4_block_sent);
310bd021c4eSMatthias Ringwald }
311bd021c4eSMatthias Ringwald 
312bd021c4eSMatthias Ringwald static int hci_transport_h4_open(void){
313bd021c4eSMatthias Ringwald     int res = btstack_uart->open();
314bd021c4eSMatthias Ringwald     if (res){
315bd021c4eSMatthias Ringwald         return res;
316bd021c4eSMatthias Ringwald     }
317bd021c4eSMatthias Ringwald     hci_transport_h4_reset_statemachine();
318bd021c4eSMatthias Ringwald     hci_transport_h4_trigger_next_read();
319307a4fe3SMatthias Ringwald 
320307a4fe3SMatthias Ringwald     tx_state = TX_IDLE;
321307a4fe3SMatthias Ringwald 
322307a4fe3SMatthias Ringwald #ifdef HAVE_EHCILL
323307a4fe3SMatthias Ringwald     hci_transport_h4_ehcill_reset_statemachine();
324307a4fe3SMatthias Ringwald #endif
325bd021c4eSMatthias Ringwald     return 0;
326bd021c4eSMatthias Ringwald }
327bd021c4eSMatthias Ringwald 
328bd021c4eSMatthias Ringwald static int hci_transport_h4_close(void){
329bd021c4eSMatthias Ringwald     return btstack_uart->close();
330bd021c4eSMatthias Ringwald }
331bd021c4eSMatthias Ringwald 
332bd021c4eSMatthias Ringwald static void hci_transport_h4_register_packet_handler(void (*handler)(uint8_t packet_type, uint8_t *packet, uint16_t size)){
333bd021c4eSMatthias Ringwald     packet_handler = handler;
334bd021c4eSMatthias Ringwald }
335bd021c4eSMatthias Ringwald 
336bd021c4eSMatthias Ringwald static void dummy_handler(uint8_t packet_type, uint8_t *packet, uint16_t size){
337bd021c4eSMatthias Ringwald }
338bd021c4eSMatthias Ringwald 
339307a4fe3SMatthias Ringwald // --- main part of eHCILL implementation ---
340307a4fe3SMatthias Ringwald 
341307a4fe3SMatthias Ringwald #ifdef HAVE_EHCILL
342307a4fe3SMatthias Ringwald 
343307a4fe3SMatthias Ringwald static void hci_transport_h4_ehcill_reactivate_rx(void){
344307a4fe3SMatthias Ringwald     if (!ehcill_defer_rx_size){
345307a4fe3SMatthias Ringwald         log_error("EHCILL: NO RX REQUEST PENDING");
346307a4fe3SMatthias Ringwald         return;
347307a4fe3SMatthias Ringwald     }
348307a4fe3SMatthias Ringwald     log_info ("EHCILL: Re-activate rx");
349307a4fe3SMatthias Ringwald     // receive request, clears RTS
350307a4fe3SMatthias Ringwald     int rx_size = ehcill_defer_rx_size;
351307a4fe3SMatthias Ringwald     ehcill_defer_rx_size = 0;
352307a4fe3SMatthias Ringwald     btstack_uart->receive_block(ehcill_defer_rx_buffer, rx_size);
353307a4fe3SMatthias Ringwald }
354307a4fe3SMatthias Ringwald 
355307a4fe3SMatthias Ringwald static void hci_transport_h4_echill_send_wakeup_ind(void){
356307a4fe3SMatthias Ringwald     // update state
357307a4fe3SMatthias Ringwald     tx_state     = TX_W4_WAKEUP;
358307a4fe3SMatthias Ringwald     ehcill_state = EHCILL_STATE_W4_ACK;
359307a4fe3SMatthias Ringwald     ehcill_command_to_send = EHCILL_WAKE_UP_IND;
360307a4fe3SMatthias Ringwald     btstack_uart->send_block(&ehcill_command_to_send, 1);
361307a4fe3SMatthias Ringwald }
362307a4fe3SMatthias Ringwald 
363307a4fe3SMatthias Ringwald static int hci_transport_h4_ehcill_outgoing_packet_ready(void){
364307a4fe3SMatthias Ringwald     return tx_len != 0;
365307a4fe3SMatthias Ringwald }
366307a4fe3SMatthias Ringwald 
367307a4fe3SMatthias Ringwald // static int  ehcill_sleep_mode_active(void){
368307a4fe3SMatthias Ringwald //     return ehcill_state == EHCILL_STATE_SLEEP;
369307a4fe3SMatthias Ringwald // }
370307a4fe3SMatthias Ringwald 
371307a4fe3SMatthias Ringwald static void hci_transport_h4_ehcill_reset_statemachine(void){
372307a4fe3SMatthias Ringwald     ehcill_state = EHCILL_STATE_AWAKE;
373307a4fe3SMatthias Ringwald }
374307a4fe3SMatthias Ringwald 
375307a4fe3SMatthias Ringwald static void hci_transport_h4_ehcill_send_ehcill_command(void){
376307a4fe3SMatthias Ringwald     tx_state = TX_W4_EHCILL_SENT;
377307a4fe3SMatthias Ringwald     btstack_uart->send_block(&ehcill_command_to_send, 1);
378307a4fe3SMatthias Ringwald }
379307a4fe3SMatthias Ringwald 
380307a4fe3SMatthias Ringwald static void hci_transport_h4_ehcill_sleep_ack_timer_handler(btstack_timer_source_t * timer){
381307a4fe3SMatthias Ringwald     hci_transport_h4_ehcill_send_ehcill_command();
382307a4fe3SMatthias Ringwald }
383307a4fe3SMatthias Ringwald 
384307a4fe3SMatthias Ringwald static void hci_transport_h4_ehcill_sleep_ack_timer_setup(void){
385307a4fe3SMatthias Ringwald     // setup timer
386307a4fe3SMatthias Ringwald     ehcill_sleep_ack_timer.process = &hci_transport_h4_ehcill_sleep_ack_timer_handler;
387307a4fe3SMatthias Ringwald     btstack_run_loop_set_timer(&ehcill_sleep_ack_timer, 50);
388307a4fe3SMatthias Ringwald     btstack_run_loop_add_timer(&ehcill_sleep_ack_timer);
389307a4fe3SMatthias Ringwald     // TODO: trigger run loop
390307a4fe3SMatthias Ringwald     // btstack_run_loop_embedded_trigger();
391307a4fe3SMatthias Ringwald }
392307a4fe3SMatthias Ringwald 
393307a4fe3SMatthias Ringwald static void hci_transport_h4_ehcill_schedule_ecill_command(uint8_t command){
394307a4fe3SMatthias Ringwald     ehcill_command_to_send = command;
395307a4fe3SMatthias Ringwald     switch (tx_state){
396307a4fe3SMatthias Ringwald         case TX_IDLE:
397307a4fe3SMatthias Ringwald             if (ehcill_command_to_send == EHCILL_WAKE_UP_ACK){
398307a4fe3SMatthias Ringwald                 // send right away
399307a4fe3SMatthias Ringwald                 hci_transport_h4_ehcill_send_ehcill_command();
400307a4fe3SMatthias Ringwald             } else {
401307a4fe3SMatthias Ringwald                 // change state so BTstack cannot send and setup timer
402307a4fe3SMatthias Ringwald                 tx_state = TX_W2_EHCILL_SEND;
403307a4fe3SMatthias Ringwald                 hci_transport_h4_ehcill_sleep_ack_timer_setup();
404307a4fe3SMatthias Ringwald             }
405307a4fe3SMatthias Ringwald             break;
406307a4fe3SMatthias Ringwald         default:
407307a4fe3SMatthias Ringwald             break;
408307a4fe3SMatthias Ringwald     }
409307a4fe3SMatthias Ringwald }
410307a4fe3SMatthias Ringwald 
411307a4fe3SMatthias Ringwald static void hci_transport_h4_ehcill_handle(uint8_t action){
412307a4fe3SMatthias Ringwald     // log_info("hci_transport_h4_ehcill_handle: %x, state %u, defer_rx %u", action, ehcill_state, ehcill_defer_rx_size);
413307a4fe3SMatthias Ringwald     switch(ehcill_state){
414307a4fe3SMatthias Ringwald         case EHCILL_STATE_AWAKE:
415307a4fe3SMatthias Ringwald             switch(action){
416307a4fe3SMatthias Ringwald                 case EHCILL_GO_TO_SLEEP_IND:
417307a4fe3SMatthias Ringwald                     // 1. set RTS high - already done by BT RX ISR
418307a4fe3SMatthias Ringwald                     // 2. enable CTS IRQ  - CTS always enabled
419307a4fe3SMatthias Ringwald                     ehcill_state = EHCILL_STATE_SLEEP;
420307a4fe3SMatthias Ringwald                     log_info("EHCILL: GO_TO_SLEEP_IND RX");
421307a4fe3SMatthias Ringwald                     hci_transport_h4_ehcill_schedule_ecill_command(EHCILL_GO_TO_SLEEP_ACK);
422307a4fe3SMatthias Ringwald                     break;
423307a4fe3SMatthias Ringwald                 default:
424307a4fe3SMatthias Ringwald                     break;
425307a4fe3SMatthias Ringwald             }
426307a4fe3SMatthias Ringwald             break;
427307a4fe3SMatthias Ringwald 
428307a4fe3SMatthias Ringwald         case EHCILL_STATE_SLEEP:
429307a4fe3SMatthias Ringwald             switch(action){
430307a4fe3SMatthias Ringwald                 case EHCILL_WAKE_UP_IND:
431307a4fe3SMatthias Ringwald                     ehcill_state = EHCILL_STATE_AWAKE;
432307a4fe3SMatthias Ringwald                     log_info("EHCILL: WAKE_UP_IND RX");
433307a4fe3SMatthias Ringwald                     hci_transport_h4_ehcill_schedule_ecill_command(EHCILL_WAKE_UP_ACK);
434307a4fe3SMatthias Ringwald                     break;
435307a4fe3SMatthias Ringwald 
436307a4fe3SMatthias Ringwald                 default:
437307a4fe3SMatthias Ringwald                     break;
438307a4fe3SMatthias Ringwald             }
439307a4fe3SMatthias Ringwald             break;
440307a4fe3SMatthias Ringwald 
441307a4fe3SMatthias Ringwald         case EHCILL_STATE_W4_ACK:
442307a4fe3SMatthias Ringwald             switch(action){
443307a4fe3SMatthias Ringwald                 case EHCILL_WAKE_UP_IND:
444307a4fe3SMatthias Ringwald                 case EHCILL_WAKE_UP_ACK:
445307a4fe3SMatthias Ringwald                     log_info("EHCILL: WAKE_UP_IND or ACK");
446307a4fe3SMatthias Ringwald                     tx_state = TX_W4_PACKET_SENT;
447307a4fe3SMatthias Ringwald                     ehcill_state = EHCILL_STATE_AWAKE;
448307a4fe3SMatthias Ringwald                     btstack_uart->send_block(tx_data, tx_len);
449307a4fe3SMatthias Ringwald                     break;
450307a4fe3SMatthias Ringwald                 default:
451307a4fe3SMatthias Ringwald                     break;
452307a4fe3SMatthias Ringwald             }
453307a4fe3SMatthias Ringwald             break;
454307a4fe3SMatthias Ringwald     }
455307a4fe3SMatthias Ringwald }
456307a4fe3SMatthias Ringwald #endif
457307a4fe3SMatthias Ringwald // --- end of eHCILL implementation ---------
458307a4fe3SMatthias Ringwald 
459bd021c4eSMatthias Ringwald static const hci_transport_t hci_transport_h4 = {
460bd021c4eSMatthias Ringwald     /* const char * name; */                                        "H4",
461bd021c4eSMatthias Ringwald     /* void   (*init) (const void *transport_config); */            &hci_transport_h4_init,
462bd021c4eSMatthias Ringwald     /* int    (*open)(void); */                                     &hci_transport_h4_open,
463bd021c4eSMatthias Ringwald     /* int    (*close)(void); */                                    &hci_transport_h4_close,
464bd021c4eSMatthias Ringwald     /* void   (*register_packet_handler)(void (*handler)(...); */   &hci_transport_h4_register_packet_handler,
465bd021c4eSMatthias Ringwald     /* int    (*can_send_packet_now)(uint8_t packet_type); */       &hci_transport_h4_can_send_now,
466bd021c4eSMatthias Ringwald     /* int    (*send_packet)(...); */                               &hci_transport_h4_send_packet,
467bd021c4eSMatthias Ringwald     /* int    (*set_baudrate)(uint32_t baudrate); */                &hci_transport_h4_set_baudrate,
468bd021c4eSMatthias Ringwald     /* void   (*reset_link)(void); */                               NULL,
469bd021c4eSMatthias Ringwald };
470bd021c4eSMatthias Ringwald 
471bd021c4eSMatthias Ringwald // configure and return h4 singleton
472bd021c4eSMatthias Ringwald const hci_transport_t * hci_transport_h4_instance(const btstack_uart_block_t * uart_driver) {
473bd021c4eSMatthias Ringwald     btstack_uart = uart_driver;
474bd021c4eSMatthias Ringwald     return &hci_transport_h4;
475bd021c4eSMatthias Ringwald }
476