1161a5569SMatthias Ringwald /* 2161a5569SMatthias Ringwald * Copyright (C) 2014 BlueKitchen GmbH 3161a5569SMatthias Ringwald * 4161a5569SMatthias Ringwald * Redistribution and use in source and binary forms, with or without 5161a5569SMatthias Ringwald * modification, are permitted provided that the following conditions 6161a5569SMatthias Ringwald * are met: 7161a5569SMatthias Ringwald * 8161a5569SMatthias Ringwald * 1. Redistributions of source code must retain the above copyright 9161a5569SMatthias Ringwald * notice, this list of conditions and the following disclaimer. 10161a5569SMatthias Ringwald * 2. Redistributions in binary form must reproduce the above copyright 11161a5569SMatthias Ringwald * notice, this list of conditions and the following disclaimer in the 12161a5569SMatthias Ringwald * documentation and/or other materials provided with the distribution. 13161a5569SMatthias Ringwald * 3. Neither the name of the copyright holders nor the names of 14161a5569SMatthias Ringwald * contributors may be used to endorse or promote products derived 15161a5569SMatthias Ringwald * from this software without specific prior written permission. 16161a5569SMatthias Ringwald * 4. Any redistribution, use, or modification is done solely for 17161a5569SMatthias Ringwald * personal benefit and not for any commercial purpose or for 18161a5569SMatthias Ringwald * monetary gain. 19161a5569SMatthias Ringwald * 20161a5569SMatthias Ringwald * THIS SOFTWARE IS PROVIDED BY BLUEKITCHEN GMBH AND CONTRIBUTORS 21161a5569SMatthias Ringwald * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 22161a5569SMatthias Ringwald * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 23161a5569SMatthias Ringwald * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL MATTHIAS 24161a5569SMatthias Ringwald * RINGWALD OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 25161a5569SMatthias Ringwald * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 26161a5569SMatthias Ringwald * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS 27161a5569SMatthias Ringwald * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 28161a5569SMatthias Ringwald * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 29161a5569SMatthias Ringwald * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF 30161a5569SMatthias Ringwald * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31161a5569SMatthias Ringwald * SUCH DAMAGE. 32161a5569SMatthias Ringwald * 33161a5569SMatthias Ringwald * Please inquire about commercial licensing options at 34161a5569SMatthias Ringwald * [email protected] 35161a5569SMatthias Ringwald * 36161a5569SMatthias Ringwald */ 37161a5569SMatthias Ringwald 38161a5569SMatthias Ringwald #define __BTSTACK_FILE__ "hci_transport_em9304_spi.c" 39161a5569SMatthias Ringwald 40161a5569SMatthias Ringwald #include "btstack_config.h" 41161a5569SMatthias Ringwald #include "btstack_em9304_spi.h" 42161a5569SMatthias Ringwald 43161a5569SMatthias Ringwald // EM9304 SPI Driver 44161a5569SMatthias Ringwald static const btstack_em9304_spi_t * btstack_em9304_spi; 45161a5569SMatthias Ringwald 46161a5569SMatthias Ringwald ///////////////////////// 47161a5569SMatthias Ringwald // em9304 engine 48161a5569SMatthias Ringwald #include "btstack_ring_buffer.h" 49161a5569SMatthias Ringwald #include "btstack_debug.h" 50161a5569SMatthias Ringwald #include "btstack_util.h" 51161a5569SMatthias Ringwald #include "hci.h" 52161a5569SMatthias Ringwald #include "hci_transport.h" 53161a5569SMatthias Ringwald 54*fc46bba0SMatthias Ringwald static void em9304_spi_engine_run(void); 55161a5569SMatthias Ringwald 56161a5569SMatthias Ringwald #define STS_SLAVE_READY 0xc0 57161a5569SMatthias Ringwald 58161a5569SMatthias Ringwald #define EM9304_SPI_HEADER_TX 0x42 59161a5569SMatthias Ringwald #define EM9304_SPI_HEADER_RX 0x81 60161a5569SMatthias Ringwald 61161a5569SMatthias Ringwald #define SPI_EM9304_RX_BUFFER_SIZE 64 62161a5569SMatthias Ringwald #define SPI_EM9304_TX_BUFFER_SIZE 64 63161a5569SMatthias Ringwald #define SPI_EM9304_RING_BUFFER_SIZE 128 64161a5569SMatthias Ringwald 65161a5569SMatthias Ringwald // state 66161a5569SMatthias Ringwald static volatile enum { 67*fc46bba0SMatthias Ringwald SPI_EM9304_READY_FOR_TX, 68*fc46bba0SMatthias Ringwald SPI_EM9304_READY_FOR_TX_AND_RX, 69161a5569SMatthias Ringwald SPI_EM9304_RX_W4_READ_COMMAND_SENT, 70161a5569SMatthias Ringwald SPI_EM9304_RX_READ_COMMAND_SENT, 71161a5569SMatthias Ringwald SPI_EM9304_RX_W4_STS2_RECEIVED, 72161a5569SMatthias Ringwald SPI_EM9304_RX_STS2_RECEIVED, 73161a5569SMatthias Ringwald SPI_EM9304_RX_W4_DATA_RECEIVED, 74161a5569SMatthias Ringwald SPI_EM9304_RX_DATA_RECEIVED, 75161a5569SMatthias Ringwald SPI_EM9304_TX_W4_RDY, 76161a5569SMatthias Ringwald SPI_EM9304_TX_W4_WRITE_COMMAND_SENT, 77161a5569SMatthias Ringwald SPI_EM9304_TX_WRITE_COMMAND_SENT, 78161a5569SMatthias Ringwald SPI_EM9304_TX_W4_STS2_RECEIVED, 79161a5569SMatthias Ringwald SPI_EM9304_TX_STS2_RECEIVED, 80161a5569SMatthias Ringwald SPI_EM9304_TX_W4_DATA_SENT, 81161a5569SMatthias Ringwald SPI_EM9304_TX_DATA_SENT, 82*fc46bba0SMatthias Ringwald SPI_EM9304_DONE, 83161a5569SMatthias Ringwald } em9304_spi_engine_state; 84161a5569SMatthias Ringwald 85161a5569SMatthias Ringwald static uint16_t em9304_spi_engine_rx_request_len; 86161a5569SMatthias Ringwald static uint16_t em9304_spi_engine_tx_request_len; 87161a5569SMatthias Ringwald 88161a5569SMatthias Ringwald static btstack_ring_buffer_t em9304_spi_engine_rx_ring_buffer; 89161a5569SMatthias Ringwald static uint8_t em9304_spi_engine_rx_ring_buffer_storage[SPI_EM9304_RING_BUFFER_SIZE]; 90161a5569SMatthias Ringwald 91161a5569SMatthias Ringwald static const uint8_t * em9304_spi_engine_tx_data; 92161a5569SMatthias Ringwald static uint16_t em9304_spi_engine_tx_size; 93161a5569SMatthias Ringwald 94161a5569SMatthias Ringwald // handlers 95f2e99339SMatthias Ringwald static void (*em9304_spi_engine_rx_available_handler)(void); 96161a5569SMatthias Ringwald static void (*em9304_spi_engine_tx_done_handler)(void); 97161a5569SMatthias Ringwald 98161a5569SMatthias Ringwald // TODO: get rid of alignment requirement 99161a5569SMatthias Ringwald union { 100161a5569SMatthias Ringwald uint32_t words[1]; 101161a5569SMatthias Ringwald uint8_t bytes[1]; 102161a5569SMatthias Ringwald } sCommand; 103161a5569SMatthias Ringwald 104161a5569SMatthias Ringwald union { 105161a5569SMatthias Ringwald uint32_t words[1]; 106161a5569SMatthias Ringwald uint8_t bytes[1]; 107161a5569SMatthias Ringwald } sStas; 108161a5569SMatthias Ringwald 109161a5569SMatthias Ringwald union { 110161a5569SMatthias Ringwald uint32_t words[SPI_EM9304_RX_BUFFER_SIZE/4]; 111161a5569SMatthias Ringwald uint8_t bytes[SPI_EM9304_RX_BUFFER_SIZE]; 112161a5569SMatthias Ringwald } em9304_spi_engine_spi_rx_buffer; 113161a5569SMatthias Ringwald 114161a5569SMatthias Ringwald static void em9304_spi_engine_ready_callback(void){ 115*fc46bba0SMatthias Ringwald // TODO: collect states 116*fc46bba0SMatthias Ringwald em9304_spi_engine_run(); 117161a5569SMatthias Ringwald } 118161a5569SMatthias Ringwald 119161a5569SMatthias Ringwald static void em9304_spi_engine_transfer_done(void){ 120161a5569SMatthias Ringwald switch (em9304_spi_engine_state){ 121161a5569SMatthias Ringwald case SPI_EM9304_RX_W4_READ_COMMAND_SENT: 122161a5569SMatthias Ringwald em9304_spi_engine_state = SPI_EM9304_RX_READ_COMMAND_SENT; 123161a5569SMatthias Ringwald break; 124161a5569SMatthias Ringwald case SPI_EM9304_RX_W4_STS2_RECEIVED: 125161a5569SMatthias Ringwald em9304_spi_engine_state = SPI_EM9304_RX_STS2_RECEIVED; 126161a5569SMatthias Ringwald break; 127161a5569SMatthias Ringwald case SPI_EM9304_RX_W4_DATA_RECEIVED: 128161a5569SMatthias Ringwald em9304_spi_engine_state = SPI_EM9304_RX_DATA_RECEIVED; 129161a5569SMatthias Ringwald break; 130161a5569SMatthias Ringwald case SPI_EM9304_TX_W4_WRITE_COMMAND_SENT: 131161a5569SMatthias Ringwald em9304_spi_engine_state = SPI_EM9304_TX_WRITE_COMMAND_SENT; 132161a5569SMatthias Ringwald break; 133161a5569SMatthias Ringwald case SPI_EM9304_TX_W4_STS2_RECEIVED: 134161a5569SMatthias Ringwald em9304_spi_engine_state = SPI_EM9304_TX_STS2_RECEIVED; 135161a5569SMatthias Ringwald break; 136161a5569SMatthias Ringwald case SPI_EM9304_TX_W4_DATA_SENT: 137161a5569SMatthias Ringwald em9304_spi_engine_state = SPI_EM9304_TX_DATA_SENT; 138161a5569SMatthias Ringwald break; 139161a5569SMatthias Ringwald default: 140161a5569SMatthias Ringwald return; 141161a5569SMatthias Ringwald } 142*fc46bba0SMatthias Ringwald em9304_spi_engine_run(); 143161a5569SMatthias Ringwald } 144161a5569SMatthias Ringwald 145161a5569SMatthias Ringwald static void em9304_spi_engine_start_tx_transaction(void){ 146161a5569SMatthias Ringwald // state = wait for RDY 147161a5569SMatthias Ringwald em9304_spi_engine_state = SPI_EM9304_TX_W4_RDY; 148161a5569SMatthias Ringwald 149161a5569SMatthias Ringwald // chip select 150161a5569SMatthias Ringwald btstack_em9304_spi->set_chip_select(1); 151161a5569SMatthias Ringwald 152161a5569SMatthias Ringwald // enable IRQ 153161a5569SMatthias Ringwald btstack_em9304_spi->set_ready_callback(&em9304_spi_engine_ready_callback); 154161a5569SMatthias Ringwald } 155161a5569SMatthias Ringwald 156f2e99339SMatthias Ringwald static inline int em9304_engine_space_in_rx_buffer(void){ 157f2e99339SMatthias Ringwald return btstack_ring_buffer_bytes_free(&em9304_spi_engine_rx_ring_buffer) >= SPI_EM9304_RX_BUFFER_SIZE; 158f2e99339SMatthias Ringwald } 159161a5569SMatthias Ringwald 160*fc46bba0SMatthias Ringwald static void em9304_engine_receive_buffer_ready(void){ 161*fc46bba0SMatthias Ringwald // no data ready for receive or transmit, but space in rx ringbuffer -> enable READY IRQ 162*fc46bba0SMatthias Ringwald em9304_spi_engine_state = SPI_EM9304_READY_FOR_TX_AND_RX; 163*fc46bba0SMatthias Ringwald btstack_em9304_spi->set_ready_callback(&em9304_spi_engine_ready_callback); 164*fc46bba0SMatthias Ringwald } 165f2e99339SMatthias Ringwald 166*fc46bba0SMatthias Ringwald static void em9304_engine_start_next_transaction(void){ 167*fc46bba0SMatthias Ringwald 168*fc46bba0SMatthias Ringwald if (em9304_spi_engine_state != SPI_EM9304_DONE) return; 169f2e99339SMatthias Ringwald 170161a5569SMatthias Ringwald if (btstack_em9304_spi->get_ready()){ 171161a5569SMatthias Ringwald // RDY -> data available 172f2e99339SMatthias Ringwald if (em9304_engine_space_in_rx_buffer()) { 173161a5569SMatthias Ringwald // disable interrupt again 174161a5569SMatthias Ringwald btstack_em9304_spi->set_ready_callback(NULL); 175f2e99339SMatthias Ringwald 176161a5569SMatthias Ringwald // enable chip select 177161a5569SMatthias Ringwald btstack_em9304_spi->set_chip_select(1); 178161a5569SMatthias Ringwald 179161a5569SMatthias Ringwald // send read command 180161a5569SMatthias Ringwald em9304_spi_engine_state = SPI_EM9304_RX_W4_READ_COMMAND_SENT; 181161a5569SMatthias Ringwald sCommand.bytes[0] = EM9304_SPI_HEADER_RX; 182161a5569SMatthias Ringwald btstack_em9304_spi->transmit(sCommand.bytes, 1); 183161a5569SMatthias Ringwald } 184161a5569SMatthias Ringwald } else if (em9304_spi_engine_tx_size){ 185161a5569SMatthias Ringwald em9304_spi_engine_start_tx_transaction(); 186f2e99339SMatthias Ringwald } else if (em9304_engine_space_in_rx_buffer()){ 187*fc46bba0SMatthias Ringwald em9304_engine_receive_buffer_ready(); 188161a5569SMatthias Ringwald } 189f2e99339SMatthias Ringwald } 190f2e99339SMatthias Ringwald 191*fc46bba0SMatthias Ringwald static void em9304_engine_action_done(void){ 192*fc46bba0SMatthias Ringwald // chip deselect & done 193*fc46bba0SMatthias Ringwald btstack_em9304_spi->set_chip_select(0); 194*fc46bba0SMatthias Ringwald em9304_spi_engine_state = SPI_EM9304_DONE; 195*fc46bba0SMatthias Ringwald } 196*fc46bba0SMatthias Ringwald 197*fc46bba0SMatthias Ringwald static void em9304_spi_engine_run(void){ 198f2e99339SMatthias Ringwald uint16_t max_bytes_to_send; 199f2e99339SMatthias Ringwald switch (em9304_spi_engine_state){ 200161a5569SMatthias Ringwald 201161a5569SMatthias Ringwald case SPI_EM9304_RX_READ_COMMAND_SENT: 202161a5569SMatthias Ringwald em9304_spi_engine_state = SPI_EM9304_RX_W4_STS2_RECEIVED; 203161a5569SMatthias Ringwald btstack_em9304_spi->receive(sStas.bytes, 1); 204161a5569SMatthias Ringwald break; 205161a5569SMatthias Ringwald 206161a5569SMatthias Ringwald case SPI_EM9304_RX_STS2_RECEIVED: 207161a5569SMatthias Ringwald // check slave status 208161a5569SMatthias Ringwald log_debug("RX: STS2 0x%02X", sStas.bytes[0]); 209161a5569SMatthias Ringwald 210*fc46bba0SMatthias Ringwald // read data 211161a5569SMatthias Ringwald em9304_spi_engine_state = SPI_EM9304_RX_W4_DATA_RECEIVED; 212161a5569SMatthias Ringwald em9304_spi_engine_rx_request_len = sStas.bytes[0]; 213161a5569SMatthias Ringwald btstack_em9304_spi->receive(em9304_spi_engine_spi_rx_buffer.bytes, em9304_spi_engine_rx_request_len); 214161a5569SMatthias Ringwald break; 215161a5569SMatthias Ringwald 216161a5569SMatthias Ringwald case SPI_EM9304_RX_DATA_RECEIVED: 217*fc46bba0SMatthias Ringwald // done 218*fc46bba0SMatthias Ringwald em9304_engine_action_done(); 219161a5569SMatthias Ringwald 220161a5569SMatthias Ringwald // move data into ring buffer 221161a5569SMatthias Ringwald btstack_ring_buffer_write(&em9304_spi_engine_rx_ring_buffer, em9304_spi_engine_spi_rx_buffer.bytes, em9304_spi_engine_rx_request_len); 222161a5569SMatthias Ringwald em9304_spi_engine_rx_request_len = 0; 223161a5569SMatthias Ringwald 224*fc46bba0SMatthias Ringwald // notify about new data available -- assume empty 225f2e99339SMatthias Ringwald (*em9304_spi_engine_rx_available_handler)(); 226f2e99339SMatthias Ringwald 227*fc46bba0SMatthias Ringwald // next 228*fc46bba0SMatthias Ringwald em9304_engine_start_next_transaction(); 229161a5569SMatthias Ringwald break; 230161a5569SMatthias Ringwald 231161a5569SMatthias Ringwald case SPI_EM9304_TX_W4_RDY: 232161a5569SMatthias Ringwald // check if ready 233161a5569SMatthias Ringwald if (!btstack_em9304_spi->get_ready()) break; 234161a5569SMatthias Ringwald 235161a5569SMatthias Ringwald // disable interrupt again 236161a5569SMatthias Ringwald btstack_em9304_spi->set_ready_callback(NULL); 237161a5569SMatthias Ringwald 238161a5569SMatthias Ringwald // send write command 239161a5569SMatthias Ringwald em9304_spi_engine_state = SPI_EM9304_TX_W4_WRITE_COMMAND_SENT; 240161a5569SMatthias Ringwald sCommand.bytes[0] = EM9304_SPI_HEADER_TX; 241161a5569SMatthias Ringwald btstack_em9304_spi->transmit(sCommand.bytes, 1); 242161a5569SMatthias Ringwald break; 243161a5569SMatthias Ringwald 244161a5569SMatthias Ringwald case SPI_EM9304_TX_WRITE_COMMAND_SENT: 245161a5569SMatthias Ringwald em9304_spi_engine_state = SPI_EM9304_TX_W4_STS2_RECEIVED; 246161a5569SMatthias Ringwald btstack_em9304_spi->receive(sStas.bytes, 1); 247161a5569SMatthias Ringwald break; 248161a5569SMatthias Ringwald 249161a5569SMatthias Ringwald case SPI_EM9304_TX_STS2_RECEIVED: 250161a5569SMatthias Ringwald // check slave status and em9304 rx buffer space 251161a5569SMatthias Ringwald log_debug("TX: STS2 0x%02X", sStas.bytes[0]); 252161a5569SMatthias Ringwald max_bytes_to_send = sStas.bytes[0]; 253161a5569SMatthias Ringwald if (max_bytes_to_send == 0){ 254*fc46bba0SMatthias Ringwald // done 255*fc46bba0SMatthias Ringwald em9304_engine_action_done(); 256*fc46bba0SMatthias Ringwald // next 257*fc46bba0SMatthias Ringwald em9304_engine_start_next_transaction(); 258161a5569SMatthias Ringwald break; 259161a5569SMatthias Ringwald } 260161a5569SMatthias Ringwald 261161a5569SMatthias Ringwald // number bytes to send 262161a5569SMatthias Ringwald em9304_spi_engine_tx_request_len = btstack_min(em9304_spi_engine_tx_size, max_bytes_to_send); 263161a5569SMatthias Ringwald 264161a5569SMatthias Ringwald // send command 265161a5569SMatthias Ringwald em9304_spi_engine_state = SPI_EM9304_TX_W4_DATA_SENT; 266161a5569SMatthias Ringwald btstack_em9304_spi->transmit( (uint8_t*) em9304_spi_engine_tx_data, em9304_spi_engine_tx_request_len); 267161a5569SMatthias Ringwald break; 268161a5569SMatthias Ringwald 269161a5569SMatthias Ringwald case SPI_EM9304_TX_DATA_SENT: 270*fc46bba0SMatthias Ringwald // done 271*fc46bba0SMatthias Ringwald em9304_engine_action_done(); 272161a5569SMatthias Ringwald 273*fc46bba0SMatthias Ringwald // chunk sent 274161a5569SMatthias Ringwald em9304_spi_engine_tx_size -= em9304_spi_engine_tx_request_len; 275161a5569SMatthias Ringwald em9304_spi_engine_tx_data += em9304_spi_engine_tx_request_len; 276161a5569SMatthias Ringwald em9304_spi_engine_tx_request_len = 0; 277161a5569SMatthias Ringwald 278*fc46bba0SMatthias Ringwald // notify higher layer when complete 279*fc46bba0SMatthias Ringwald if (em9304_spi_engine_tx_size == 0){ 280161a5569SMatthias Ringwald (*em9304_spi_engine_tx_done_handler)(); 281161a5569SMatthias Ringwald } 282*fc46bba0SMatthias Ringwald 283*fc46bba0SMatthias Ringwald // next 284*fc46bba0SMatthias Ringwald em9304_engine_start_next_transaction(); 285161a5569SMatthias Ringwald break; 286161a5569SMatthias Ringwald 287161a5569SMatthias Ringwald default: 288161a5569SMatthias Ringwald break; 289161a5569SMatthias Ringwald } 290161a5569SMatthias Ringwald } 291161a5569SMatthias Ringwald 292161a5569SMatthias Ringwald static void em9304_spi_engine_init(void){ 293161a5569SMatthias Ringwald btstack_em9304_spi->open(); 294161a5569SMatthias Ringwald btstack_em9304_spi->set_transfer_done_callback(&em9304_spi_engine_transfer_done); 295161a5569SMatthias Ringwald btstack_ring_buffer_init(&em9304_spi_engine_rx_ring_buffer, &em9304_spi_engine_rx_ring_buffer_storage[0], SPI_EM9304_RING_BUFFER_SIZE); 296*fc46bba0SMatthias Ringwald em9304_spi_engine_state = SPI_EM9304_DONE; 297*fc46bba0SMatthias Ringwald em9304_engine_start_next_transaction(); 298161a5569SMatthias Ringwald } 299161a5569SMatthias Ringwald 300161a5569SMatthias Ringwald static void em9304_spi_engine_close(void){ 301161a5569SMatthias Ringwald btstack_em9304_spi->close(); 302161a5569SMatthias Ringwald } 303161a5569SMatthias Ringwald 304f2e99339SMatthias Ringwald static void em9304_spi_engine_set_data_available( void (*the_block_handler)(void)){ 305f2e99339SMatthias Ringwald em9304_spi_engine_rx_available_handler = the_block_handler; 306161a5569SMatthias Ringwald } 307161a5569SMatthias Ringwald 308161a5569SMatthias Ringwald static void em9304_spi_engine_set_block_sent( void (*the_block_handler)(void)){ 309161a5569SMatthias Ringwald em9304_spi_engine_tx_done_handler = the_block_handler; 310161a5569SMatthias Ringwald } 311161a5569SMatthias Ringwald 312161a5569SMatthias Ringwald static void em9304_spi_engine_send_block(const uint8_t *buffer, uint16_t length){ 313161a5569SMatthias Ringwald em9304_spi_engine_tx_data = buffer; 314161a5569SMatthias Ringwald em9304_spi_engine_tx_size = length; 315*fc46bba0SMatthias Ringwald em9304_engine_start_next_transaction(); 316161a5569SMatthias Ringwald } 317161a5569SMatthias Ringwald 318*fc46bba0SMatthias Ringwald static uint16_t em9304_engine_num_bytes_available(void){ 319f2e99339SMatthias Ringwald return btstack_ring_buffer_bytes_available(&em9304_spi_engine_rx_ring_buffer); 320161a5569SMatthias Ringwald } 321161a5569SMatthias Ringwald 322f2e99339SMatthias Ringwald static void em9304_engine_get_bytes(uint8_t * buffer, uint16_t num_bytes){ 323f2e99339SMatthias Ringwald uint32_t bytes_read; 324f2e99339SMatthias Ringwald btstack_ring_buffer_read(&em9304_spi_engine_rx_ring_buffer, buffer, num_bytes, &bytes_read); 325f2e99339SMatthias Ringwald } 326f2e99339SMatthias Ringwald 327161a5569SMatthias Ringwald ////////////////////////////////////////////////////////////////////////////// 328161a5569SMatthias Ringwald 329161a5569SMatthias Ringwald // assert pre-buffer for packet type is available 330161a5569SMatthias Ringwald #if !defined(HCI_OUTGOING_PRE_BUFFER_SIZE) || (HCI_OUTGOING_PRE_BUFFER_SIZE == 0) 331161a5569SMatthias Ringwald #error HCI_OUTGOING_PRE_BUFFER_SIZE not defined. Please update hci.h 332161a5569SMatthias Ringwald #endif 333161a5569SMatthias Ringwald 334161a5569SMatthias Ringwald static void dummy_handler(uint8_t packet_type, uint8_t *packet, uint16_t size); 335161a5569SMatthias Ringwald 336161a5569SMatthias Ringwald typedef enum { 337161a5569SMatthias Ringwald H4_W4_PACKET_TYPE, 338161a5569SMatthias Ringwald H4_W4_EVENT_HEADER, 339161a5569SMatthias Ringwald H4_W4_ACL_HEADER, 340161a5569SMatthias Ringwald H4_W4_PAYLOAD, 341161a5569SMatthias Ringwald } H4_STATE; 342161a5569SMatthias Ringwald 343161a5569SMatthias Ringwald typedef enum { 344161a5569SMatthias Ringwald TX_IDLE = 1, 345161a5569SMatthias Ringwald TX_W4_PACKET_SENT, 346161a5569SMatthias Ringwald } TX_STATE; 347161a5569SMatthias Ringwald 348161a5569SMatthias Ringwald // write state 349161a5569SMatthias Ringwald static TX_STATE tx_state; 350161a5569SMatthias Ringwald 351161a5569SMatthias Ringwald static uint8_t packet_sent_event[] = { HCI_EVENT_TRANSPORT_PACKET_SENT, 0}; 352161a5569SMatthias Ringwald 353161a5569SMatthias Ringwald static void (*packet_handler)(uint8_t packet_type, uint8_t *packet, uint16_t size) = dummy_handler; 354161a5569SMatthias Ringwald 355161a5569SMatthias Ringwald // packet reader state machine 356*fc46bba0SMatthias Ringwald static H4_STATE hci_transport_em9304_h4_state; 357*fc46bba0SMatthias Ringwald static uint16_t hci_transport_em9304_spi_bytes_to_read; 358*fc46bba0SMatthias Ringwald static uint16_t hci_transport_em9304_spi_read_pos; 359161a5569SMatthias Ringwald 360161a5569SMatthias Ringwald // incoming packet buffer 361161a5569SMatthias Ringwald static uint8_t hci_packet_with_pre_buffer[HCI_INCOMING_PRE_BUFFER_SIZE + 1 + HCI_PACKET_BUFFER_SIZE]; // packet type + max(acl header + acl payload, event header + event data) 362161a5569SMatthias Ringwald static uint8_t * hci_packet = &hci_packet_with_pre_buffer[HCI_INCOMING_PRE_BUFFER_SIZE]; 363161a5569SMatthias Ringwald 364f2e99339SMatthias Ringwald static void hci_transport_em9304_spi_block_read(void); 365f2e99339SMatthias Ringwald 366161a5569SMatthias Ringwald static void hci_transport_em9304_spi_reset_statemachine(void){ 367*fc46bba0SMatthias Ringwald hci_transport_em9304_h4_state = H4_W4_PACKET_TYPE; 368*fc46bba0SMatthias Ringwald hci_transport_em9304_spi_read_pos = 0; 369*fc46bba0SMatthias Ringwald hci_transport_em9304_spi_bytes_to_read = 1; 370161a5569SMatthias Ringwald } 371161a5569SMatthias Ringwald 372f2e99339SMatthias Ringwald static void hci_transport_em9304_spi_process_data(void){ 373f2e99339SMatthias Ringwald while (1){ 374*fc46bba0SMatthias Ringwald 375*fc46bba0SMatthias Ringwald uint16_t bytes_available = em9304_engine_num_bytes_available(); 376*fc46bba0SMatthias Ringwald log_debug("transfer_rx_data: ring buffer has %u -> hci wants %u", bytes_available, hci_transport_em9304_spi_bytes_to_read); 377f2e99339SMatthias Ringwald 378f2e99339SMatthias Ringwald if (!bytes_available) break; 379*fc46bba0SMatthias Ringwald if (!hci_transport_em9304_spi_bytes_to_read) break; 380f2e99339SMatthias Ringwald 381*fc46bba0SMatthias Ringwald uint16_t bytes_to_copy = btstack_min(bytes_available, hci_transport_em9304_spi_bytes_to_read); 382*fc46bba0SMatthias Ringwald em9304_engine_get_bytes(&hci_packet[hci_transport_em9304_spi_read_pos], bytes_to_copy); 383f2e99339SMatthias Ringwald 384*fc46bba0SMatthias Ringwald hci_transport_em9304_spi_read_pos += bytes_to_copy; 385*fc46bba0SMatthias Ringwald hci_transport_em9304_spi_bytes_to_read -= bytes_to_copy; 386f2e99339SMatthias Ringwald 387*fc46bba0SMatthias Ringwald if (hci_transport_em9304_spi_bytes_to_read == 0){ 388*fc46bba0SMatthias Ringwald hci_transport_em9304_spi_block_read(); 389f2e99339SMatthias Ringwald } 390f2e99339SMatthias Ringwald } 391f2e99339SMatthias Ringwald } 392f2e99339SMatthias Ringwald 393161a5569SMatthias Ringwald static void hci_transport_em9304_spi_block_read(void){ 394*fc46bba0SMatthias Ringwald switch (hci_transport_em9304_h4_state) { 395161a5569SMatthias Ringwald case H4_W4_PACKET_TYPE: 396161a5569SMatthias Ringwald switch (hci_packet[0]){ 397161a5569SMatthias Ringwald case HCI_EVENT_PACKET: 398*fc46bba0SMatthias Ringwald hci_transport_em9304_spi_bytes_to_read = HCI_EVENT_HEADER_SIZE; 399*fc46bba0SMatthias Ringwald hci_transport_em9304_h4_state = H4_W4_EVENT_HEADER; 400161a5569SMatthias Ringwald break; 401161a5569SMatthias Ringwald case HCI_ACL_DATA_PACKET: 402*fc46bba0SMatthias Ringwald hci_transport_em9304_spi_bytes_to_read = HCI_ACL_HEADER_SIZE; 403*fc46bba0SMatthias Ringwald hci_transport_em9304_h4_state = H4_W4_ACL_HEADER; 404161a5569SMatthias Ringwald break; 405161a5569SMatthias Ringwald default: 406*fc46bba0SMatthias Ringwald log_error("invalid packet type 0x%02x", hci_packet[0]); 407161a5569SMatthias Ringwald hci_transport_em9304_spi_reset_statemachine(); 408161a5569SMatthias Ringwald break; 409161a5569SMatthias Ringwald } 410161a5569SMatthias Ringwald break; 411161a5569SMatthias Ringwald 412161a5569SMatthias Ringwald case H4_W4_EVENT_HEADER: 413*fc46bba0SMatthias Ringwald hci_transport_em9304_spi_bytes_to_read = hci_packet[2]; 414*fc46bba0SMatthias Ringwald hci_transport_em9304_h4_state = H4_W4_PAYLOAD; 415161a5569SMatthias Ringwald break; 416161a5569SMatthias Ringwald 417161a5569SMatthias Ringwald case H4_W4_ACL_HEADER: 418*fc46bba0SMatthias Ringwald hci_transport_em9304_spi_bytes_to_read = little_endian_read_16( hci_packet, 3); 419161a5569SMatthias Ringwald // check ACL length 420*fc46bba0SMatthias Ringwald if (HCI_ACL_HEADER_SIZE + hci_transport_em9304_spi_bytes_to_read > HCI_PACKET_BUFFER_SIZE){ 421*fc46bba0SMatthias Ringwald log_error("invalid ACL payload len %d - only space for %u", hci_transport_em9304_spi_bytes_to_read, HCI_PACKET_BUFFER_SIZE - HCI_ACL_HEADER_SIZE); 422161a5569SMatthias Ringwald hci_transport_em9304_spi_reset_statemachine(); 423161a5569SMatthias Ringwald break; 424161a5569SMatthias Ringwald } 425*fc46bba0SMatthias Ringwald hci_transport_em9304_h4_state = H4_W4_PAYLOAD; 426161a5569SMatthias Ringwald break; 427161a5569SMatthias Ringwald 428161a5569SMatthias Ringwald case H4_W4_PAYLOAD: 429*fc46bba0SMatthias Ringwald packet_handler(hci_packet[0], &hci_packet[1], hci_transport_em9304_spi_read_pos-1); 430161a5569SMatthias Ringwald hci_transport_em9304_spi_reset_statemachine(); 431161a5569SMatthias Ringwald break; 432161a5569SMatthias Ringwald default: 433161a5569SMatthias Ringwald break; 434161a5569SMatthias Ringwald } 435161a5569SMatthias Ringwald } 436161a5569SMatthias Ringwald 437161a5569SMatthias Ringwald static void hci_transport_em9304_spi_block_sent(void){ 438161a5569SMatthias Ringwald switch (tx_state){ 439161a5569SMatthias Ringwald case TX_W4_PACKET_SENT: 440161a5569SMatthias Ringwald // packet fully sent, reset state 441161a5569SMatthias Ringwald tx_state = TX_IDLE; 442161a5569SMatthias Ringwald // notify upper stack that it can send again 443161a5569SMatthias Ringwald packet_handler(HCI_EVENT_PACKET, &packet_sent_event[0], sizeof(packet_sent_event)); 444161a5569SMatthias Ringwald break; 445161a5569SMatthias Ringwald default: 446161a5569SMatthias Ringwald break; 447161a5569SMatthias Ringwald } 448161a5569SMatthias Ringwald } 449161a5569SMatthias Ringwald 450161a5569SMatthias Ringwald static int hci_transport_em9304_spi_can_send_now(uint8_t packet_type){ 451161a5569SMatthias Ringwald return tx_state == TX_IDLE; 452161a5569SMatthias Ringwald } 453161a5569SMatthias Ringwald 454161a5569SMatthias Ringwald static int hci_transport_em9304_spi_send_packet(uint8_t packet_type, uint8_t * packet, int size){ 455161a5569SMatthias Ringwald 456161a5569SMatthias Ringwald // store packet type before actual data and increase size 457161a5569SMatthias Ringwald size++; 458161a5569SMatthias Ringwald packet--; 459161a5569SMatthias Ringwald *packet = packet_type; 460161a5569SMatthias Ringwald 461161a5569SMatthias Ringwald // start sending 462161a5569SMatthias Ringwald tx_state = TX_W4_PACKET_SENT; 463161a5569SMatthias Ringwald em9304_spi_engine_send_block(packet, size); 464161a5569SMatthias Ringwald return 0; 465161a5569SMatthias Ringwald } 466161a5569SMatthias Ringwald 467161a5569SMatthias Ringwald static void hci_transport_em9304_spi_init(const void * transport_config){ 468161a5569SMatthias Ringwald } 469161a5569SMatthias Ringwald 470161a5569SMatthias Ringwald static int hci_transport_em9304_spi_open(void){ 471161a5569SMatthias Ringwald 472161a5569SMatthias Ringwald // setup UART driver 473161a5569SMatthias Ringwald em9304_spi_engine_init(); 474f2e99339SMatthias Ringwald em9304_spi_engine_set_data_available(&hci_transport_em9304_spi_process_data); 475161a5569SMatthias Ringwald em9304_spi_engine_set_block_sent(&hci_transport_em9304_spi_block_sent); 476161a5569SMatthias Ringwald // setup H4 RX 477161a5569SMatthias Ringwald hci_transport_em9304_spi_reset_statemachine(); 478161a5569SMatthias Ringwald // setup H4 TX 479161a5569SMatthias Ringwald tx_state = TX_IDLE; 480161a5569SMatthias Ringwald return 0; 481161a5569SMatthias Ringwald } 482161a5569SMatthias Ringwald 483161a5569SMatthias Ringwald static int hci_transport_em9304_spi_close(void){ 484161a5569SMatthias Ringwald em9304_spi_engine_close(); 485161a5569SMatthias Ringwald return 0; 486161a5569SMatthias Ringwald } 487161a5569SMatthias Ringwald 488161a5569SMatthias Ringwald static void hci_transport_em9304_spi_register_packet_handler(void (*handler)(uint8_t packet_type, uint8_t *packet, uint16_t size)){ 489161a5569SMatthias Ringwald packet_handler = handler; 490161a5569SMatthias Ringwald } 491161a5569SMatthias Ringwald 492161a5569SMatthias Ringwald static void dummy_handler(uint8_t packet_type, uint8_t *packet, uint16_t size){ 493161a5569SMatthias Ringwald } 494161a5569SMatthias Ringwald 495161a5569SMatthias Ringwald // --- end of eHCILL implementation --------- 496161a5569SMatthias Ringwald 497161a5569SMatthias Ringwald static const hci_transport_t hci_transport_em9304_spi = { 498161a5569SMatthias Ringwald /* const char * name; */ "H4", 499161a5569SMatthias Ringwald /* void (*init) (const void *transport_config); */ &hci_transport_em9304_spi_init, 500161a5569SMatthias Ringwald /* int (*open)(void); */ &hci_transport_em9304_spi_open, 501161a5569SMatthias Ringwald /* int (*close)(void); */ &hci_transport_em9304_spi_close, 502161a5569SMatthias Ringwald /* void (*register_packet_handler)(void (*handler)(...); */ &hci_transport_em9304_spi_register_packet_handler, 503161a5569SMatthias Ringwald /* int (*can_send_packet_now)(uint8_t packet_type); */ &hci_transport_em9304_spi_can_send_now, 504161a5569SMatthias Ringwald /* int (*send_packet)(...); */ &hci_transport_em9304_spi_send_packet, 505161a5569SMatthias Ringwald /* int (*set_baudrate)(uint32_t baudrate); */ NULL, 506161a5569SMatthias Ringwald /* void (*reset_link)(void); */ NULL, 507161a5569SMatthias Ringwald /* void (*set_sco_config)(uint16_t voice_setting, int num_connections); */ NULL, 508161a5569SMatthias Ringwald }; 509161a5569SMatthias Ringwald 510161a5569SMatthias Ringwald // configure and return h4 singleton 511161a5569SMatthias Ringwald const hci_transport_t * hci_transport_em9304_spi_instance(const btstack_em9304_spi_t * em9304_spi_driver) { 512161a5569SMatthias Ringwald btstack_em9304_spi = em9304_spi_driver; 513161a5569SMatthias Ringwald return &hci_transport_em9304_spi; 514161a5569SMatthias Ringwald } 515