xref: /btstack/src/hci_transport_em9304_spi.c (revision cebe3e9ef6f6ce0d36310f60f7b83c0285e9b5b4)
1161a5569SMatthias Ringwald /*
2161a5569SMatthias Ringwald  * Copyright (C) 2014 BlueKitchen GmbH
3161a5569SMatthias Ringwald  *
4161a5569SMatthias Ringwald  * Redistribution and use in source and binary forms, with or without
5161a5569SMatthias Ringwald  * modification, are permitted provided that the following conditions
6161a5569SMatthias Ringwald  * are met:
7161a5569SMatthias Ringwald  *
8161a5569SMatthias Ringwald  * 1. Redistributions of source code must retain the above copyright
9161a5569SMatthias Ringwald  *    notice, this list of conditions and the following disclaimer.
10161a5569SMatthias Ringwald  * 2. Redistributions in binary form must reproduce the above copyright
11161a5569SMatthias Ringwald  *    notice, this list of conditions and the following disclaimer in the
12161a5569SMatthias Ringwald  *    documentation and/or other materials provided with the distribution.
13161a5569SMatthias Ringwald  * 3. Neither the name of the copyright holders nor the names of
14161a5569SMatthias Ringwald  *    contributors may be used to endorse or promote products derived
15161a5569SMatthias Ringwald  *    from this software without specific prior written permission.
16161a5569SMatthias Ringwald  * 4. Any redistribution, use, or modification is done solely for
17161a5569SMatthias Ringwald  *    personal benefit and not for any commercial purpose or for
18161a5569SMatthias Ringwald  *    monetary gain.
19161a5569SMatthias Ringwald  *
20161a5569SMatthias Ringwald  * THIS SOFTWARE IS PROVIDED BY BLUEKITCHEN GMBH AND CONTRIBUTORS
21161a5569SMatthias Ringwald  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22161a5569SMatthias Ringwald  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
23161a5569SMatthias Ringwald  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL MATTHIAS
24161a5569SMatthias Ringwald  * RINGWALD OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
25161a5569SMatthias Ringwald  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
26161a5569SMatthias Ringwald  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
27161a5569SMatthias Ringwald  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
28161a5569SMatthias Ringwald  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29161a5569SMatthias Ringwald  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
30161a5569SMatthias Ringwald  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31161a5569SMatthias Ringwald  * SUCH DAMAGE.
32161a5569SMatthias Ringwald  *
33161a5569SMatthias Ringwald  * Please inquire about commercial licensing options at
34161a5569SMatthias Ringwald  * [email protected]
35161a5569SMatthias Ringwald  *
36161a5569SMatthias Ringwald  */
37161a5569SMatthias Ringwald 
38e501bae0SMatthias Ringwald #define BTSTACK_FILE__ "hci_transport_em9304_spi.c"
39161a5569SMatthias Ringwald 
40161a5569SMatthias Ringwald #include "btstack_config.h"
41161a5569SMatthias Ringwald #include "btstack_em9304_spi.h"
42161a5569SMatthias Ringwald 
43161a5569SMatthias Ringwald // EM9304 SPI Driver
44161a5569SMatthias Ringwald static const btstack_em9304_spi_t * btstack_em9304_spi;
45161a5569SMatthias Ringwald 
46161a5569SMatthias Ringwald /////////////////////////
47161a5569SMatthias Ringwald // em9304 engine
48161a5569SMatthias Ringwald #include "btstack_ring_buffer.h"
49161a5569SMatthias Ringwald #include "btstack_debug.h"
50161a5569SMatthias Ringwald #include "btstack_util.h"
51161a5569SMatthias Ringwald #include "hci.h"
52161a5569SMatthias Ringwald #include "hci_transport.h"
53161a5569SMatthias Ringwald 
54fc46bba0SMatthias Ringwald static void em9304_spi_engine_run(void);
55161a5569SMatthias Ringwald 
56161a5569SMatthias Ringwald #define STS_SLAVE_READY 0xc0
57161a5569SMatthias Ringwald 
58161a5569SMatthias Ringwald #define EM9304_SPI_HEADER_TX        0x42
59161a5569SMatthias Ringwald #define EM9304_SPI_HEADER_RX        0x81
60161a5569SMatthias Ringwald 
6124b2b71bSMatthias Ringwald #define SPI_EM9304_BUFFER_SIZE        64
62161a5569SMatthias Ringwald #define SPI_EM9304_RING_BUFFER_SIZE  128
63161a5569SMatthias Ringwald 
64161a5569SMatthias Ringwald // state
65161a5569SMatthias Ringwald static volatile enum {
66c682b8ecSMatthias Ringwald     SPI_EM9304_OFF,
67fc46bba0SMatthias Ringwald     SPI_EM9304_READY_FOR_TX,
68fc46bba0SMatthias Ringwald     SPI_EM9304_READY_FOR_TX_AND_RX,
69161a5569SMatthias Ringwald     SPI_EM9304_RX_W4_READ_COMMAND_SENT,
70161a5569SMatthias Ringwald     SPI_EM9304_RX_READ_COMMAND_SENT,
71161a5569SMatthias Ringwald     SPI_EM9304_RX_W4_STS2_RECEIVED,
72161a5569SMatthias Ringwald     SPI_EM9304_RX_STS2_RECEIVED,
73161a5569SMatthias Ringwald     SPI_EM9304_RX_W4_DATA_RECEIVED,
74161a5569SMatthias Ringwald     SPI_EM9304_RX_DATA_RECEIVED,
75161a5569SMatthias Ringwald     SPI_EM9304_TX_W4_RDY,
76161a5569SMatthias Ringwald     SPI_EM9304_TX_W4_WRITE_COMMAND_SENT,
77161a5569SMatthias Ringwald     SPI_EM9304_TX_WRITE_COMMAND_SENT,
78161a5569SMatthias Ringwald     SPI_EM9304_TX_W4_STS2_RECEIVED,
79161a5569SMatthias Ringwald     SPI_EM9304_TX_STS2_RECEIVED,
80161a5569SMatthias Ringwald     SPI_EM9304_TX_W4_DATA_SENT,
81161a5569SMatthias Ringwald     SPI_EM9304_TX_DATA_SENT,
82fc46bba0SMatthias Ringwald     SPI_EM9304_DONE,
83161a5569SMatthias Ringwald } em9304_spi_engine_state;
84161a5569SMatthias Ringwald 
85161a5569SMatthias Ringwald static uint16_t em9304_spi_engine_rx_request_len;
86161a5569SMatthias Ringwald static uint16_t em9304_spi_engine_tx_request_len;
87161a5569SMatthias Ringwald 
88161a5569SMatthias Ringwald static btstack_ring_buffer_t em9304_spi_engine_rx_ring_buffer;
8924b2b71bSMatthias Ringwald 
90161a5569SMatthias Ringwald static uint8_t em9304_spi_engine_rx_ring_buffer_storage[SPI_EM9304_RING_BUFFER_SIZE];
91161a5569SMatthias Ringwald 
92161a5569SMatthias Ringwald static const uint8_t  * em9304_spi_engine_tx_data;
93161a5569SMatthias Ringwald static uint16_t         em9304_spi_engine_tx_size;
94161a5569SMatthias Ringwald 
95161a5569SMatthias Ringwald // handlers
96f2e99339SMatthias Ringwald static void (*em9304_spi_engine_rx_available_handler)(void);
97161a5569SMatthias Ringwald static void (*em9304_spi_engine_tx_done_handler)(void);
98161a5569SMatthias Ringwald 
99161a5569SMatthias Ringwald // TODO: get rid of alignment requirement
100161a5569SMatthias Ringwald union {
101161a5569SMatthias Ringwald     uint32_t words[1];
102161a5569SMatthias Ringwald     uint8_t  bytes[1];
103161a5569SMatthias Ringwald } sCommand;
104161a5569SMatthias Ringwald 
105161a5569SMatthias Ringwald union {
106161a5569SMatthias Ringwald     uint32_t words[1];
107161a5569SMatthias Ringwald     uint8_t  bytes[1];
108161a5569SMatthias Ringwald } sStas;
109161a5569SMatthias Ringwald 
110161a5569SMatthias Ringwald union {
11124b2b71bSMatthias Ringwald     uint32_t words[SPI_EM9304_BUFFER_SIZE/4];
11224b2b71bSMatthias Ringwald     uint8_t  bytes[SPI_EM9304_BUFFER_SIZE];
11324b2b71bSMatthias Ringwald } em9304_spi_engine_spi_buffer;
114161a5569SMatthias Ringwald 
115161a5569SMatthias Ringwald static void em9304_spi_engine_ready_callback(void){
116fc46bba0SMatthias Ringwald     // TODO: collect states
117fc46bba0SMatthias Ringwald     em9304_spi_engine_run();
118161a5569SMatthias Ringwald }
119161a5569SMatthias Ringwald 
120161a5569SMatthias Ringwald static void em9304_spi_engine_transfer_done(void){
121161a5569SMatthias Ringwald     switch (em9304_spi_engine_state){
122161a5569SMatthias Ringwald         case SPI_EM9304_RX_W4_READ_COMMAND_SENT:
123161a5569SMatthias Ringwald             em9304_spi_engine_state = SPI_EM9304_RX_READ_COMMAND_SENT;
124161a5569SMatthias Ringwald             break;
125161a5569SMatthias Ringwald         case SPI_EM9304_RX_W4_STS2_RECEIVED:
126161a5569SMatthias Ringwald             em9304_spi_engine_state = SPI_EM9304_RX_STS2_RECEIVED;
127161a5569SMatthias Ringwald             break;
128161a5569SMatthias Ringwald         case SPI_EM9304_RX_W4_DATA_RECEIVED:
129161a5569SMatthias Ringwald             em9304_spi_engine_state = SPI_EM9304_RX_DATA_RECEIVED;
130161a5569SMatthias Ringwald             break;
131161a5569SMatthias Ringwald         case SPI_EM9304_TX_W4_WRITE_COMMAND_SENT:
132161a5569SMatthias Ringwald             em9304_spi_engine_state = SPI_EM9304_TX_WRITE_COMMAND_SENT;
133161a5569SMatthias Ringwald             break;
134161a5569SMatthias Ringwald         case SPI_EM9304_TX_W4_STS2_RECEIVED:
135161a5569SMatthias Ringwald             em9304_spi_engine_state = SPI_EM9304_TX_STS2_RECEIVED;
136161a5569SMatthias Ringwald             break;
137161a5569SMatthias Ringwald         case SPI_EM9304_TX_W4_DATA_SENT:
138161a5569SMatthias Ringwald             em9304_spi_engine_state = SPI_EM9304_TX_DATA_SENT;
139161a5569SMatthias Ringwald             break;
140161a5569SMatthias Ringwald         default:
141161a5569SMatthias Ringwald             return;
142161a5569SMatthias Ringwald     }
143fc46bba0SMatthias Ringwald     em9304_spi_engine_run();
144161a5569SMatthias Ringwald }
145161a5569SMatthias Ringwald 
146161a5569SMatthias Ringwald static void em9304_spi_engine_start_tx_transaction(void){
147161a5569SMatthias Ringwald     // state = wait for RDY
148161a5569SMatthias Ringwald     em9304_spi_engine_state = SPI_EM9304_TX_W4_RDY;
149161a5569SMatthias Ringwald 
150161a5569SMatthias Ringwald     // chip select
151161a5569SMatthias Ringwald     btstack_em9304_spi->set_chip_select(1);
152161a5569SMatthias Ringwald 
153161a5569SMatthias Ringwald     // enable IRQ
154161a5569SMatthias Ringwald     btstack_em9304_spi->set_ready_callback(&em9304_spi_engine_ready_callback);
155161a5569SMatthias Ringwald }
156161a5569SMatthias Ringwald 
157aed1d832SMatthias Ringwald static void em9304_spi_engine_start_rx_transaction(void){
158161a5569SMatthias Ringwald     // disable interrupt again
159161a5569SMatthias Ringwald     btstack_em9304_spi->set_ready_callback(NULL);
160f2e99339SMatthias Ringwald 
161161a5569SMatthias Ringwald     // enable chip select
162161a5569SMatthias Ringwald     btstack_em9304_spi->set_chip_select(1);
163161a5569SMatthias Ringwald 
164161a5569SMatthias Ringwald     // send read command
165161a5569SMatthias Ringwald     em9304_spi_engine_state = SPI_EM9304_RX_W4_READ_COMMAND_SENT;
166161a5569SMatthias Ringwald     sCommand.bytes[0] = EM9304_SPI_HEADER_RX;
167161a5569SMatthias Ringwald     btstack_em9304_spi->transmit(sCommand.bytes, 1);
168161a5569SMatthias Ringwald }
169aed1d832SMatthias Ringwald 
170aed1d832SMatthias Ringwald static inline int em9304_engine_space_in_rx_buffer(void){
171aed1d832SMatthias Ringwald     return btstack_ring_buffer_bytes_free(&em9304_spi_engine_rx_ring_buffer) >= SPI_EM9304_BUFFER_SIZE;
172aed1d832SMatthias Ringwald }
173aed1d832SMatthias Ringwald 
174aed1d832SMatthias Ringwald static void em9304_engine_receive_buffer_ready(void){
175aed1d832SMatthias Ringwald     // no data ready for receive or transmit, but space in rx ringbuffer  -> enable READY IRQ
176aed1d832SMatthias Ringwald     em9304_spi_engine_state = SPI_EM9304_READY_FOR_TX_AND_RX;
177aed1d832SMatthias Ringwald     btstack_em9304_spi->set_ready_callback(&em9304_spi_engine_ready_callback);
178aed1d832SMatthias Ringwald     // avoid dead lock, check READY again
179aed1d832SMatthias Ringwald     if (btstack_em9304_spi->get_ready()){
180aed1d832SMatthias Ringwald         em9304_spi_engine_start_rx_transaction();
181aed1d832SMatthias Ringwald     }
182aed1d832SMatthias Ringwald }
183aed1d832SMatthias Ringwald 
184aed1d832SMatthias Ringwald static void em9304_engine_start_next_transaction(void){
185aed1d832SMatthias Ringwald 
186aed1d832SMatthias Ringwald     switch (em9304_spi_engine_state){
187aed1d832SMatthias Ringwald         case SPI_EM9304_READY_FOR_TX:
188aed1d832SMatthias Ringwald         case SPI_EM9304_READY_FOR_TX_AND_RX:
189aed1d832SMatthias Ringwald         case SPI_EM9304_DONE:
190aed1d832SMatthias Ringwald             break;
191aed1d832SMatthias Ringwald         default:
192aed1d832SMatthias Ringwald             return;
193aed1d832SMatthias Ringwald     }
194aed1d832SMatthias Ringwald 
195aed1d832SMatthias Ringwald     if (btstack_em9304_spi->get_ready() && em9304_engine_space_in_rx_buffer()) {
196aed1d832SMatthias Ringwald         em9304_spi_engine_start_rx_transaction();
197161a5569SMatthias Ringwald     } else if (em9304_spi_engine_tx_size){
198161a5569SMatthias Ringwald         em9304_spi_engine_start_tx_transaction();
199f2e99339SMatthias Ringwald     } else if (em9304_engine_space_in_rx_buffer()){
200fc46bba0SMatthias Ringwald         em9304_engine_receive_buffer_ready();
201161a5569SMatthias Ringwald     }
202f2e99339SMatthias Ringwald }
203f2e99339SMatthias Ringwald 
204fc46bba0SMatthias Ringwald static void em9304_engine_action_done(void){
205fc46bba0SMatthias Ringwald     // chip deselect & done
206fc46bba0SMatthias Ringwald     btstack_em9304_spi->set_chip_select(0);
207fc46bba0SMatthias Ringwald     em9304_spi_engine_state = SPI_EM9304_DONE;
208fc46bba0SMatthias Ringwald }
209fc46bba0SMatthias Ringwald 
210fc46bba0SMatthias Ringwald static void em9304_spi_engine_run(void){
211f2e99339SMatthias Ringwald     uint16_t max_bytes_to_send;
212f2e99339SMatthias Ringwald     switch (em9304_spi_engine_state){
213161a5569SMatthias Ringwald 
214aed1d832SMatthias Ringwald         case SPI_EM9304_READY_FOR_TX_AND_RX:
215aed1d832SMatthias Ringwald             // check if ready
216aed1d832SMatthias Ringwald             if (!btstack_em9304_spi->get_ready()) break;
217aed1d832SMatthias Ringwald             em9304_spi_engine_start_rx_transaction();
218aed1d832SMatthias Ringwald             break;
219aed1d832SMatthias Ringwald 
220161a5569SMatthias Ringwald         case SPI_EM9304_RX_READ_COMMAND_SENT:
221161a5569SMatthias Ringwald             em9304_spi_engine_state = SPI_EM9304_RX_W4_STS2_RECEIVED;
222161a5569SMatthias Ringwald             btstack_em9304_spi->receive(sStas.bytes, 1);
223161a5569SMatthias Ringwald             break;
224161a5569SMatthias Ringwald 
225161a5569SMatthias Ringwald         case SPI_EM9304_RX_STS2_RECEIVED:
226161a5569SMatthias Ringwald             // check slave status
227161a5569SMatthias Ringwald             log_debug("RX: STS2 0x%02X", sStas.bytes[0]);
228161a5569SMatthias Ringwald 
229fc46bba0SMatthias Ringwald             // read data
230161a5569SMatthias Ringwald             em9304_spi_engine_state = SPI_EM9304_RX_W4_DATA_RECEIVED;
231161a5569SMatthias Ringwald             em9304_spi_engine_rx_request_len = sStas.bytes[0];
23224b2b71bSMatthias Ringwald             btstack_em9304_spi->receive(em9304_spi_engine_spi_buffer.bytes, em9304_spi_engine_rx_request_len);
233161a5569SMatthias Ringwald             break;
234161a5569SMatthias Ringwald 
235161a5569SMatthias Ringwald         case SPI_EM9304_RX_DATA_RECEIVED:
236fc46bba0SMatthias Ringwald             // done
237fc46bba0SMatthias Ringwald             em9304_engine_action_done();
238161a5569SMatthias Ringwald 
239161a5569SMatthias Ringwald             // move data into ring buffer
24024b2b71bSMatthias Ringwald             btstack_ring_buffer_write(&em9304_spi_engine_rx_ring_buffer, em9304_spi_engine_spi_buffer.bytes, em9304_spi_engine_rx_request_len);
241161a5569SMatthias Ringwald             em9304_spi_engine_rx_request_len = 0;
242161a5569SMatthias Ringwald 
243fc46bba0SMatthias Ringwald             // notify about new data available -- assume empty
244f2e99339SMatthias Ringwald             (*em9304_spi_engine_rx_available_handler)();
245f2e99339SMatthias Ringwald 
246fc46bba0SMatthias Ringwald             // next
247fc46bba0SMatthias Ringwald             em9304_engine_start_next_transaction();
248161a5569SMatthias Ringwald             break;
249161a5569SMatthias Ringwald 
250161a5569SMatthias Ringwald         case SPI_EM9304_TX_W4_RDY:
251161a5569SMatthias Ringwald             // check if ready
252161a5569SMatthias Ringwald             if (!btstack_em9304_spi->get_ready()) break;
253161a5569SMatthias Ringwald 
254161a5569SMatthias Ringwald             // disable interrupt again
255161a5569SMatthias Ringwald             btstack_em9304_spi->set_ready_callback(NULL);
256161a5569SMatthias Ringwald 
257161a5569SMatthias Ringwald             // send write command
258161a5569SMatthias Ringwald             em9304_spi_engine_state = SPI_EM9304_TX_W4_WRITE_COMMAND_SENT;
259161a5569SMatthias Ringwald             sCommand.bytes[0] = EM9304_SPI_HEADER_TX;
260161a5569SMatthias Ringwald             btstack_em9304_spi->transmit(sCommand.bytes, 1);
261161a5569SMatthias Ringwald             break;
262161a5569SMatthias Ringwald 
263161a5569SMatthias Ringwald         case SPI_EM9304_TX_WRITE_COMMAND_SENT:
264161a5569SMatthias Ringwald             em9304_spi_engine_state = SPI_EM9304_TX_W4_STS2_RECEIVED;
265161a5569SMatthias Ringwald             btstack_em9304_spi->receive(sStas.bytes, 1);
266161a5569SMatthias Ringwald             break;
267161a5569SMatthias Ringwald 
268161a5569SMatthias Ringwald         case SPI_EM9304_TX_STS2_RECEIVED:
269161a5569SMatthias Ringwald             // check slave status and em9304 rx buffer space
270161a5569SMatthias Ringwald             log_debug("TX: STS2 0x%02X", sStas.bytes[0]);
271161a5569SMatthias Ringwald             max_bytes_to_send = sStas.bytes[0];
272161a5569SMatthias Ringwald             if (max_bytes_to_send == 0){
273fc46bba0SMatthias Ringwald                 // done
274fc46bba0SMatthias Ringwald                 em9304_engine_action_done();
275fc46bba0SMatthias Ringwald                 // next
276fc46bba0SMatthias Ringwald                 em9304_engine_start_next_transaction();
277161a5569SMatthias Ringwald                 break;
278161a5569SMatthias Ringwald             }
279161a5569SMatthias Ringwald 
280161a5569SMatthias Ringwald             // number bytes to send
281161a5569SMatthias Ringwald             em9304_spi_engine_tx_request_len = btstack_min(em9304_spi_engine_tx_size, max_bytes_to_send);
282161a5569SMatthias Ringwald 
283161a5569SMatthias Ringwald             // send command
284161a5569SMatthias Ringwald             em9304_spi_engine_state = SPI_EM9304_TX_W4_DATA_SENT;
28524b2b71bSMatthias Ringwald             if ( (((uintptr_t) em9304_spi_engine_tx_data) & 0x03) == 0){
28624b2b71bSMatthias Ringwald                 // 4-byte aligned
287161a5569SMatthias Ringwald                 btstack_em9304_spi->transmit( (uint8_t*) em9304_spi_engine_tx_data, em9304_spi_engine_tx_request_len);
28824b2b71bSMatthias Ringwald             } else {
28924b2b71bSMatthias Ringwald                 // TODO: get rid of alignment requirement
29024b2b71bSMatthias Ringwald                 // enforce alignment by copying to spi buffer first
29124b2b71bSMatthias Ringwald                 memcpy(em9304_spi_engine_spi_buffer.bytes, em9304_spi_engine_tx_data, em9304_spi_engine_tx_request_len);
29224b2b71bSMatthias Ringwald                 btstack_em9304_spi->transmit( (uint8_t*) em9304_spi_engine_spi_buffer.bytes, em9304_spi_engine_tx_request_len);
29324b2b71bSMatthias Ringwald             }
294161a5569SMatthias Ringwald             break;
295161a5569SMatthias Ringwald 
296161a5569SMatthias Ringwald         case SPI_EM9304_TX_DATA_SENT:
297fc46bba0SMatthias Ringwald             // done
298fc46bba0SMatthias Ringwald             em9304_engine_action_done();
299161a5569SMatthias Ringwald 
300fc46bba0SMatthias Ringwald             // chunk sent
301161a5569SMatthias Ringwald             em9304_spi_engine_tx_size -= em9304_spi_engine_tx_request_len;
302161a5569SMatthias Ringwald             em9304_spi_engine_tx_data += em9304_spi_engine_tx_request_len;
303161a5569SMatthias Ringwald             em9304_spi_engine_tx_request_len = 0;
304161a5569SMatthias Ringwald 
305fc46bba0SMatthias Ringwald             // notify higher layer when complete
306fc46bba0SMatthias Ringwald             if (em9304_spi_engine_tx_size == 0){
307161a5569SMatthias Ringwald                 (*em9304_spi_engine_tx_done_handler)();
308161a5569SMatthias Ringwald             }
309fc46bba0SMatthias Ringwald 
310fc46bba0SMatthias Ringwald             // next
311fc46bba0SMatthias Ringwald             em9304_engine_start_next_transaction();
312161a5569SMatthias Ringwald             break;
313161a5569SMatthias Ringwald 
314161a5569SMatthias Ringwald         default:
315161a5569SMatthias Ringwald             break;
316161a5569SMatthias Ringwald     }
317161a5569SMatthias Ringwald }
318161a5569SMatthias Ringwald 
319161a5569SMatthias Ringwald static void em9304_spi_engine_init(void){
320161a5569SMatthias Ringwald     btstack_em9304_spi->open();
321161a5569SMatthias Ringwald     btstack_em9304_spi->set_transfer_done_callback(&em9304_spi_engine_transfer_done);
322161a5569SMatthias Ringwald     btstack_ring_buffer_init(&em9304_spi_engine_rx_ring_buffer, &em9304_spi_engine_rx_ring_buffer_storage[0], SPI_EM9304_RING_BUFFER_SIZE);
323fc46bba0SMatthias Ringwald     em9304_spi_engine_state = SPI_EM9304_DONE;
324fc46bba0SMatthias Ringwald     em9304_engine_start_next_transaction();
325161a5569SMatthias Ringwald }
326161a5569SMatthias Ringwald 
327161a5569SMatthias Ringwald static void em9304_spi_engine_close(void){
328c682b8ecSMatthias Ringwald     em9304_spi_engine_state = SPI_EM9304_OFF;
329161a5569SMatthias Ringwald     btstack_em9304_spi->close();
330161a5569SMatthias Ringwald }
331161a5569SMatthias Ringwald 
332f2e99339SMatthias Ringwald static void em9304_spi_engine_set_data_available( void (*the_block_handler)(void)){
333f2e99339SMatthias Ringwald     em9304_spi_engine_rx_available_handler = the_block_handler;
334161a5569SMatthias Ringwald }
335161a5569SMatthias Ringwald 
336161a5569SMatthias Ringwald static void em9304_spi_engine_set_block_sent( void (*the_block_handler)(void)){
337161a5569SMatthias Ringwald     em9304_spi_engine_tx_done_handler = the_block_handler;
338161a5569SMatthias Ringwald }
339161a5569SMatthias Ringwald 
340161a5569SMatthias Ringwald static void em9304_spi_engine_send_block(const uint8_t *buffer, uint16_t length){
341161a5569SMatthias Ringwald     em9304_spi_engine_tx_data = buffer;
342161a5569SMatthias Ringwald     em9304_spi_engine_tx_size = length;
343fc46bba0SMatthias Ringwald     em9304_engine_start_next_transaction();
344161a5569SMatthias Ringwald }
345161a5569SMatthias Ringwald 
346fc46bba0SMatthias Ringwald static uint16_t em9304_engine_num_bytes_available(void){
347f2e99339SMatthias Ringwald     return btstack_ring_buffer_bytes_available(&em9304_spi_engine_rx_ring_buffer);
348161a5569SMatthias Ringwald }
349161a5569SMatthias Ringwald 
350f2e99339SMatthias Ringwald static void em9304_engine_get_bytes(uint8_t * buffer, uint16_t num_bytes){
351f2e99339SMatthias Ringwald     uint32_t bytes_read;
352f2e99339SMatthias Ringwald     btstack_ring_buffer_read(&em9304_spi_engine_rx_ring_buffer, buffer, num_bytes, &bytes_read);
353f2e99339SMatthias Ringwald }
354f2e99339SMatthias Ringwald 
355161a5569SMatthias Ringwald //////////////////////////////////////////////////////////////////////////////
356161a5569SMatthias Ringwald 
357161a5569SMatthias Ringwald // assert pre-buffer for packet type is available
358161a5569SMatthias Ringwald #if !defined(HCI_OUTGOING_PRE_BUFFER_SIZE) || (HCI_OUTGOING_PRE_BUFFER_SIZE == 0)
359161a5569SMatthias Ringwald #error HCI_OUTGOING_PRE_BUFFER_SIZE not defined. Please update hci.h
360161a5569SMatthias Ringwald #endif
361161a5569SMatthias Ringwald 
362161a5569SMatthias Ringwald static void dummy_handler(uint8_t packet_type, uint8_t *packet, uint16_t size);
363161a5569SMatthias Ringwald 
364161a5569SMatthias Ringwald typedef enum {
365161a5569SMatthias Ringwald     H4_W4_PACKET_TYPE,
366161a5569SMatthias Ringwald     H4_W4_EVENT_HEADER,
367161a5569SMatthias Ringwald     H4_W4_ACL_HEADER,
368161a5569SMatthias Ringwald     H4_W4_PAYLOAD,
369161a5569SMatthias Ringwald } H4_STATE;
370161a5569SMatthias Ringwald 
371161a5569SMatthias Ringwald typedef enum {
372161a5569SMatthias Ringwald     TX_IDLE = 1,
373161a5569SMatthias Ringwald     TX_W4_PACKET_SENT,
374161a5569SMatthias Ringwald } TX_STATE;
375161a5569SMatthias Ringwald 
376161a5569SMatthias Ringwald // write state
377161a5569SMatthias Ringwald static TX_STATE tx_state;
378161a5569SMatthias Ringwald 
379161a5569SMatthias Ringwald static uint8_t packet_sent_event[] = { HCI_EVENT_TRANSPORT_PACKET_SENT, 0};
380161a5569SMatthias Ringwald 
381161a5569SMatthias Ringwald static  void (*packet_handler)(uint8_t packet_type, uint8_t *packet, uint16_t size) = dummy_handler;
382161a5569SMatthias Ringwald 
383161a5569SMatthias Ringwald // packet reader state machine
384fc46bba0SMatthias Ringwald static H4_STATE hci_transport_em9304_h4_state;
385fc46bba0SMatthias Ringwald static uint16_t hci_transport_em9304_spi_bytes_to_read;
386fc46bba0SMatthias Ringwald static uint16_t hci_transport_em9304_spi_read_pos;
387161a5569SMatthias Ringwald 
388161a5569SMatthias Ringwald // incoming packet buffer
389fc6cde64SMatthias Ringwald static uint8_t hci_packet_with_pre_buffer[HCI_INCOMING_PRE_BUFFER_SIZE + HCI_INCOMING_PACKET_BUFFER_SIZE + 1]; // packet type + max(acl header + acl payload, event header + event data)
390161a5569SMatthias Ringwald static uint8_t * hci_packet = &hci_packet_with_pre_buffer[HCI_INCOMING_PRE_BUFFER_SIZE];
391161a5569SMatthias Ringwald 
392f2e99339SMatthias Ringwald static void hci_transport_em9304_spi_block_read(void);
393f2e99339SMatthias Ringwald 
394161a5569SMatthias Ringwald static void hci_transport_em9304_spi_reset_statemachine(void){
395fc46bba0SMatthias Ringwald     hci_transport_em9304_h4_state = H4_W4_PACKET_TYPE;
396fc46bba0SMatthias Ringwald     hci_transport_em9304_spi_read_pos = 0;
397fc46bba0SMatthias Ringwald     hci_transport_em9304_spi_bytes_to_read = 1;
398161a5569SMatthias Ringwald }
399161a5569SMatthias Ringwald 
400f2e99339SMatthias Ringwald static void hci_transport_em9304_spi_process_data(void){
401f2e99339SMatthias Ringwald     while (1){
402fc46bba0SMatthias Ringwald 
403fc46bba0SMatthias Ringwald         uint16_t bytes_available = em9304_engine_num_bytes_available();
404fc46bba0SMatthias Ringwald         log_debug("transfer_rx_data: ring buffer has %u -> hci wants %u", bytes_available, hci_transport_em9304_spi_bytes_to_read);
405f2e99339SMatthias Ringwald 
406f2e99339SMatthias Ringwald         if (!bytes_available) break;
407fc46bba0SMatthias Ringwald         if (!hci_transport_em9304_spi_bytes_to_read) break;
408f2e99339SMatthias Ringwald 
409fc46bba0SMatthias Ringwald         uint16_t bytes_to_copy = btstack_min(bytes_available, hci_transport_em9304_spi_bytes_to_read);
410fc46bba0SMatthias Ringwald         em9304_engine_get_bytes(&hci_packet[hci_transport_em9304_spi_read_pos], bytes_to_copy);
411f2e99339SMatthias Ringwald 
412fc46bba0SMatthias Ringwald         hci_transport_em9304_spi_read_pos      += bytes_to_copy;
413fc46bba0SMatthias Ringwald         hci_transport_em9304_spi_bytes_to_read -= bytes_to_copy;
414f2e99339SMatthias Ringwald 
415fc46bba0SMatthias Ringwald         if (hci_transport_em9304_spi_bytes_to_read == 0){
416fc46bba0SMatthias Ringwald             hci_transport_em9304_spi_block_read();
417f2e99339SMatthias Ringwald         }
418f2e99339SMatthias Ringwald     }
419f2e99339SMatthias Ringwald }
420f2e99339SMatthias Ringwald 
421161a5569SMatthias Ringwald static void hci_transport_em9304_spi_block_read(void){
422fc46bba0SMatthias Ringwald     switch (hci_transport_em9304_h4_state) {
423161a5569SMatthias Ringwald         case H4_W4_PACKET_TYPE:
424161a5569SMatthias Ringwald             switch (hci_packet[0]){
425161a5569SMatthias Ringwald                 case HCI_EVENT_PACKET:
426fc46bba0SMatthias Ringwald                     hci_transport_em9304_spi_bytes_to_read = HCI_EVENT_HEADER_SIZE;
427fc46bba0SMatthias Ringwald                     hci_transport_em9304_h4_state = H4_W4_EVENT_HEADER;
428161a5569SMatthias Ringwald                     break;
429161a5569SMatthias Ringwald                 case HCI_ACL_DATA_PACKET:
430fc46bba0SMatthias Ringwald                     hci_transport_em9304_spi_bytes_to_read = HCI_ACL_HEADER_SIZE;
431fc46bba0SMatthias Ringwald                     hci_transport_em9304_h4_state = H4_W4_ACL_HEADER;
432161a5569SMatthias Ringwald                     break;
433161a5569SMatthias Ringwald                 default:
434fc46bba0SMatthias Ringwald                     log_error("invalid packet type 0x%02x", hci_packet[0]);
435161a5569SMatthias Ringwald                     hci_transport_em9304_spi_reset_statemachine();
436161a5569SMatthias Ringwald                     break;
437161a5569SMatthias Ringwald             }
438161a5569SMatthias Ringwald             break;
439161a5569SMatthias Ringwald 
440161a5569SMatthias Ringwald         case H4_W4_EVENT_HEADER:
441fc46bba0SMatthias Ringwald             hci_transport_em9304_spi_bytes_to_read = hci_packet[2];
442ea374553SMatthias Ringwald             // check Event length
443b06dfe1fSMatthias Ringwald             if (hci_transport_em9304_spi_bytes_to_read > (HCI_INCOMING_PACKET_BUFFER_SIZE - HCI_EVENT_HEADER_SIZE)){
444e8b81068SMatthias Ringwald                 log_error("invalid Event len %d - only space for %u", hci_transport_em9304_spi_bytes_to_read, HCI_INCOMING_PACKET_BUFFER_SIZE - HCI_EVENT_HEADER_SIZE);
445e8b81068SMatthias Ringwald                 hci_transport_em9304_spi_reset_statemachine();
446e8b81068SMatthias Ringwald                 break;
447e8b81068SMatthias Ringwald             }
448fc46bba0SMatthias Ringwald             hci_transport_em9304_h4_state = H4_W4_PAYLOAD;
449161a5569SMatthias Ringwald             break;
450161a5569SMatthias Ringwald 
451161a5569SMatthias Ringwald         case H4_W4_ACL_HEADER:
452fc46bba0SMatthias Ringwald             hci_transport_em9304_spi_bytes_to_read = little_endian_read_16( hci_packet, 3);
453161a5569SMatthias Ringwald             // check ACL length
454b06dfe1fSMatthias Ringwald             if (hci_transport_em9304_spi_bytes_to_read > (HCI_INCOMING_PACKET_BUFFER_SIZE - HCI_ACL_HEADER_SIZE)){
455fc6cde64SMatthias Ringwald                 log_error("invalid ACL payload len %d - only space for %u", hci_transport_em9304_spi_bytes_to_read, HCI_INCOMING_PACKET_BUFFER_SIZE - HCI_ACL_HEADER_SIZE);
456161a5569SMatthias Ringwald                 hci_transport_em9304_spi_reset_statemachine();
457161a5569SMatthias Ringwald                 break;
458161a5569SMatthias Ringwald             }
459fc46bba0SMatthias Ringwald             hci_transport_em9304_h4_state = H4_W4_PAYLOAD;
460161a5569SMatthias Ringwald             break;
461161a5569SMatthias Ringwald 
462161a5569SMatthias Ringwald         case H4_W4_PAYLOAD:
463fc46bba0SMatthias Ringwald             packet_handler(hci_packet[0], &hci_packet[1], hci_transport_em9304_spi_read_pos-1);
464161a5569SMatthias Ringwald             hci_transport_em9304_spi_reset_statemachine();
465161a5569SMatthias Ringwald             break;
466161a5569SMatthias Ringwald         default:
467161a5569SMatthias Ringwald             break;
468161a5569SMatthias Ringwald     }
469161a5569SMatthias Ringwald }
470161a5569SMatthias Ringwald 
471161a5569SMatthias Ringwald static void hci_transport_em9304_spi_block_sent(void){
472161a5569SMatthias Ringwald     switch (tx_state){
473161a5569SMatthias Ringwald         case TX_W4_PACKET_SENT:
474161a5569SMatthias Ringwald             // packet fully sent, reset state
475161a5569SMatthias Ringwald             tx_state = TX_IDLE;
476161a5569SMatthias Ringwald             // notify upper stack that it can send again
477161a5569SMatthias Ringwald             packet_handler(HCI_EVENT_PACKET, &packet_sent_event[0], sizeof(packet_sent_event));
478161a5569SMatthias Ringwald             break;
479161a5569SMatthias Ringwald         default:
480161a5569SMatthias Ringwald             break;
481161a5569SMatthias Ringwald     }
482161a5569SMatthias Ringwald }
483161a5569SMatthias Ringwald 
484161a5569SMatthias Ringwald static int hci_transport_em9304_spi_can_send_now(uint8_t packet_type){
485*cebe3e9eSMatthias Ringwald     UNUSED(packet_type);
486161a5569SMatthias Ringwald     return tx_state == TX_IDLE;
487161a5569SMatthias Ringwald }
488161a5569SMatthias Ringwald 
489161a5569SMatthias Ringwald static int hci_transport_em9304_spi_send_packet(uint8_t packet_type, uint8_t * packet, int size){
490161a5569SMatthias Ringwald 
491161a5569SMatthias Ringwald     // store packet type before actual data and increase size
492161a5569SMatthias Ringwald     size++;
493161a5569SMatthias Ringwald     packet--;
494161a5569SMatthias Ringwald     *packet = packet_type;
495161a5569SMatthias Ringwald 
496161a5569SMatthias Ringwald     // start sending
497161a5569SMatthias Ringwald     tx_state = TX_W4_PACKET_SENT;
498161a5569SMatthias Ringwald     em9304_spi_engine_send_block(packet, size);
499161a5569SMatthias Ringwald     return 0;
500161a5569SMatthias Ringwald }
501161a5569SMatthias Ringwald 
502161a5569SMatthias Ringwald static void hci_transport_em9304_spi_init(const void * transport_config){
503*cebe3e9eSMatthias Ringwald     UNUSED(transport_config);
504161a5569SMatthias Ringwald }
505161a5569SMatthias Ringwald 
506161a5569SMatthias Ringwald static int hci_transport_em9304_spi_open(void){
507161a5569SMatthias Ringwald 
508161a5569SMatthias Ringwald     // setup UART driver
509161a5569SMatthias Ringwald     em9304_spi_engine_init();
510f2e99339SMatthias Ringwald     em9304_spi_engine_set_data_available(&hci_transport_em9304_spi_process_data);
511161a5569SMatthias Ringwald     em9304_spi_engine_set_block_sent(&hci_transport_em9304_spi_block_sent);
512161a5569SMatthias Ringwald     // setup H4 RX
513161a5569SMatthias Ringwald     hci_transport_em9304_spi_reset_statemachine();
514161a5569SMatthias Ringwald     // setup H4 TX
515161a5569SMatthias Ringwald     tx_state = TX_IDLE;
516161a5569SMatthias Ringwald     return 0;
517161a5569SMatthias Ringwald }
518161a5569SMatthias Ringwald 
519161a5569SMatthias Ringwald static int hci_transport_em9304_spi_close(void){
520161a5569SMatthias Ringwald     em9304_spi_engine_close();
521161a5569SMatthias Ringwald     return 0;
522161a5569SMatthias Ringwald }
523161a5569SMatthias Ringwald 
524161a5569SMatthias Ringwald static void hci_transport_em9304_spi_register_packet_handler(void (*handler)(uint8_t packet_type, uint8_t *packet, uint16_t size)){
525161a5569SMatthias Ringwald     packet_handler = handler;
526161a5569SMatthias Ringwald }
527161a5569SMatthias Ringwald 
528161a5569SMatthias Ringwald static void dummy_handler(uint8_t packet_type, uint8_t *packet, uint16_t size){
529*cebe3e9eSMatthias Ringwald     UNUSED(packet_type);
530*cebe3e9eSMatthias Ringwald     UNUSED(packet);
531*cebe3e9eSMatthias Ringwald     UNUSED(size);
532161a5569SMatthias Ringwald }
533161a5569SMatthias Ringwald 
534161a5569SMatthias Ringwald // --- end of eHCILL implementation ---------
535161a5569SMatthias Ringwald 
536161a5569SMatthias Ringwald static const hci_transport_t hci_transport_em9304_spi = {
537161a5569SMatthias Ringwald     /* const char * name; */                                        "H4",
538161a5569SMatthias Ringwald     /* void   (*init) (const void *transport_config); */            &hci_transport_em9304_spi_init,
539161a5569SMatthias Ringwald     /* int    (*open)(void); */                                     &hci_transport_em9304_spi_open,
540161a5569SMatthias Ringwald     /* int    (*close)(void); */                                    &hci_transport_em9304_spi_close,
541161a5569SMatthias Ringwald     /* void   (*register_packet_handler)(void (*handler)(...); */   &hci_transport_em9304_spi_register_packet_handler,
542161a5569SMatthias Ringwald     /* int    (*can_send_packet_now)(uint8_t packet_type); */       &hci_transport_em9304_spi_can_send_now,
543161a5569SMatthias Ringwald     /* int    (*send_packet)(...); */                               &hci_transport_em9304_spi_send_packet,
544161a5569SMatthias Ringwald     /* int    (*set_baudrate)(uint32_t baudrate); */                NULL,
545161a5569SMatthias Ringwald     /* void   (*reset_link)(void); */                               NULL,
546161a5569SMatthias Ringwald     /* void   (*set_sco_config)(uint16_t voice_setting, int num_connections); */ NULL,
547161a5569SMatthias Ringwald };
548161a5569SMatthias Ringwald 
549161a5569SMatthias Ringwald // configure and return h4 singleton
550161a5569SMatthias Ringwald const hci_transport_t * hci_transport_em9304_spi_instance(const btstack_em9304_spi_t * em9304_spi_driver) {
551161a5569SMatthias Ringwald     btstack_em9304_spi = em9304_spi_driver;
552161a5569SMatthias Ringwald     return &hci_transport_em9304_spi;
553161a5569SMatthias Ringwald }
554