xref: /btstack/src/hci_transport_em9304_spi.c (revision aed1d832fad0868bfbfa9c9a0266951c0a74f7d9)
1161a5569SMatthias Ringwald /*
2161a5569SMatthias Ringwald  * Copyright (C) 2014 BlueKitchen GmbH
3161a5569SMatthias Ringwald  *
4161a5569SMatthias Ringwald  * Redistribution and use in source and binary forms, with or without
5161a5569SMatthias Ringwald  * modification, are permitted provided that the following conditions
6161a5569SMatthias Ringwald  * are met:
7161a5569SMatthias Ringwald  *
8161a5569SMatthias Ringwald  * 1. Redistributions of source code must retain the above copyright
9161a5569SMatthias Ringwald  *    notice, this list of conditions and the following disclaimer.
10161a5569SMatthias Ringwald  * 2. Redistributions in binary form must reproduce the above copyright
11161a5569SMatthias Ringwald  *    notice, this list of conditions and the following disclaimer in the
12161a5569SMatthias Ringwald  *    documentation and/or other materials provided with the distribution.
13161a5569SMatthias Ringwald  * 3. Neither the name of the copyright holders nor the names of
14161a5569SMatthias Ringwald  *    contributors may be used to endorse or promote products derived
15161a5569SMatthias Ringwald  *    from this software without specific prior written permission.
16161a5569SMatthias Ringwald  * 4. Any redistribution, use, or modification is done solely for
17161a5569SMatthias Ringwald  *    personal benefit and not for any commercial purpose or for
18161a5569SMatthias Ringwald  *    monetary gain.
19161a5569SMatthias Ringwald  *
20161a5569SMatthias Ringwald  * THIS SOFTWARE IS PROVIDED BY BLUEKITCHEN GMBH AND CONTRIBUTORS
21161a5569SMatthias Ringwald  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22161a5569SMatthias Ringwald  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
23161a5569SMatthias Ringwald  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL MATTHIAS
24161a5569SMatthias Ringwald  * RINGWALD OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
25161a5569SMatthias Ringwald  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
26161a5569SMatthias Ringwald  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
27161a5569SMatthias Ringwald  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
28161a5569SMatthias Ringwald  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29161a5569SMatthias Ringwald  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
30161a5569SMatthias Ringwald  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31161a5569SMatthias Ringwald  * SUCH DAMAGE.
32161a5569SMatthias Ringwald  *
33161a5569SMatthias Ringwald  * Please inquire about commercial licensing options at
34161a5569SMatthias Ringwald  * [email protected]
35161a5569SMatthias Ringwald  *
36161a5569SMatthias Ringwald  */
37161a5569SMatthias Ringwald 
38161a5569SMatthias Ringwald #define __BTSTACK_FILE__ "hci_transport_em9304_spi.c"
39161a5569SMatthias Ringwald 
40161a5569SMatthias Ringwald #include "btstack_config.h"
41161a5569SMatthias Ringwald #include "btstack_em9304_spi.h"
42161a5569SMatthias Ringwald 
43161a5569SMatthias Ringwald // EM9304 SPI Driver
44161a5569SMatthias Ringwald static const btstack_em9304_spi_t * btstack_em9304_spi;
45161a5569SMatthias Ringwald 
46161a5569SMatthias Ringwald /////////////////////////
47161a5569SMatthias Ringwald // em9304 engine
48161a5569SMatthias Ringwald #include "btstack_ring_buffer.h"
49161a5569SMatthias Ringwald #include "btstack_debug.h"
50161a5569SMatthias Ringwald #include "btstack_util.h"
51161a5569SMatthias Ringwald #include "hci.h"
52161a5569SMatthias Ringwald #include "hci_transport.h"
53161a5569SMatthias Ringwald 
54fc46bba0SMatthias Ringwald static void em9304_spi_engine_run(void);
55161a5569SMatthias Ringwald 
56161a5569SMatthias Ringwald #define STS_SLAVE_READY 0xc0
57161a5569SMatthias Ringwald 
58161a5569SMatthias Ringwald #define EM9304_SPI_HEADER_TX        0x42
59161a5569SMatthias Ringwald #define EM9304_SPI_HEADER_RX        0x81
60161a5569SMatthias Ringwald 
6124b2b71bSMatthias Ringwald #define SPI_EM9304_BUFFER_SIZE        64
62161a5569SMatthias Ringwald #define SPI_EM9304_RING_BUFFER_SIZE  128
63161a5569SMatthias Ringwald 
64161a5569SMatthias Ringwald // state
65161a5569SMatthias Ringwald static volatile enum {
66fc46bba0SMatthias Ringwald     SPI_EM9304_READY_FOR_TX,
67fc46bba0SMatthias Ringwald     SPI_EM9304_READY_FOR_TX_AND_RX,
68161a5569SMatthias Ringwald     SPI_EM9304_RX_W4_READ_COMMAND_SENT,
69161a5569SMatthias Ringwald     SPI_EM9304_RX_READ_COMMAND_SENT,
70161a5569SMatthias Ringwald     SPI_EM9304_RX_W4_STS2_RECEIVED,
71161a5569SMatthias Ringwald     SPI_EM9304_RX_STS2_RECEIVED,
72161a5569SMatthias Ringwald     SPI_EM9304_RX_W4_DATA_RECEIVED,
73161a5569SMatthias Ringwald     SPI_EM9304_RX_DATA_RECEIVED,
74161a5569SMatthias Ringwald     SPI_EM9304_TX_W4_RDY,
75161a5569SMatthias Ringwald     SPI_EM9304_TX_W4_WRITE_COMMAND_SENT,
76161a5569SMatthias Ringwald     SPI_EM9304_TX_WRITE_COMMAND_SENT,
77161a5569SMatthias Ringwald     SPI_EM9304_TX_W4_STS2_RECEIVED,
78161a5569SMatthias Ringwald     SPI_EM9304_TX_STS2_RECEIVED,
79161a5569SMatthias Ringwald     SPI_EM9304_TX_W4_DATA_SENT,
80161a5569SMatthias Ringwald     SPI_EM9304_TX_DATA_SENT,
81fc46bba0SMatthias Ringwald     SPI_EM9304_DONE,
82161a5569SMatthias Ringwald } em9304_spi_engine_state;
83161a5569SMatthias Ringwald 
84161a5569SMatthias Ringwald static uint16_t em9304_spi_engine_rx_request_len;
85161a5569SMatthias Ringwald static uint16_t em9304_spi_engine_tx_request_len;
86161a5569SMatthias Ringwald 
87161a5569SMatthias Ringwald static btstack_ring_buffer_t em9304_spi_engine_rx_ring_buffer;
8824b2b71bSMatthias Ringwald 
89161a5569SMatthias Ringwald static uint8_t em9304_spi_engine_rx_ring_buffer_storage[SPI_EM9304_RING_BUFFER_SIZE];
90161a5569SMatthias Ringwald 
91161a5569SMatthias Ringwald static const uint8_t  * em9304_spi_engine_tx_data;
92161a5569SMatthias Ringwald static uint16_t         em9304_spi_engine_tx_size;
93161a5569SMatthias Ringwald 
94161a5569SMatthias Ringwald // handlers
95f2e99339SMatthias Ringwald static void (*em9304_spi_engine_rx_available_handler)(void);
96161a5569SMatthias Ringwald static void (*em9304_spi_engine_tx_done_handler)(void);
97161a5569SMatthias Ringwald 
98161a5569SMatthias Ringwald // TODO: get rid of alignment requirement
99161a5569SMatthias Ringwald union {
100161a5569SMatthias Ringwald     uint32_t words[1];
101161a5569SMatthias Ringwald     uint8_t  bytes[1];
102161a5569SMatthias Ringwald } sCommand;
103161a5569SMatthias Ringwald 
104161a5569SMatthias Ringwald union {
105161a5569SMatthias Ringwald     uint32_t words[1];
106161a5569SMatthias Ringwald     uint8_t  bytes[1];
107161a5569SMatthias Ringwald } sStas;
108161a5569SMatthias Ringwald 
109161a5569SMatthias Ringwald union {
11024b2b71bSMatthias Ringwald     uint32_t words[SPI_EM9304_BUFFER_SIZE/4];
11124b2b71bSMatthias Ringwald     uint8_t  bytes[SPI_EM9304_BUFFER_SIZE];
11224b2b71bSMatthias Ringwald } em9304_spi_engine_spi_buffer;
113161a5569SMatthias Ringwald 
114161a5569SMatthias Ringwald static void em9304_spi_engine_ready_callback(void){
115fc46bba0SMatthias Ringwald     // TODO: collect states
116fc46bba0SMatthias Ringwald     em9304_spi_engine_run();
117161a5569SMatthias Ringwald }
118161a5569SMatthias Ringwald 
119161a5569SMatthias Ringwald static void em9304_spi_engine_transfer_done(void){
120161a5569SMatthias Ringwald     switch (em9304_spi_engine_state){
121161a5569SMatthias Ringwald         case SPI_EM9304_RX_W4_READ_COMMAND_SENT:
122161a5569SMatthias Ringwald             em9304_spi_engine_state = SPI_EM9304_RX_READ_COMMAND_SENT;
123161a5569SMatthias Ringwald             break;
124161a5569SMatthias Ringwald         case SPI_EM9304_RX_W4_STS2_RECEIVED:
125161a5569SMatthias Ringwald             em9304_spi_engine_state = SPI_EM9304_RX_STS2_RECEIVED;
126161a5569SMatthias Ringwald             break;
127161a5569SMatthias Ringwald         case SPI_EM9304_RX_W4_DATA_RECEIVED:
128161a5569SMatthias Ringwald             em9304_spi_engine_state = SPI_EM9304_RX_DATA_RECEIVED;
129161a5569SMatthias Ringwald             break;
130161a5569SMatthias Ringwald         case SPI_EM9304_TX_W4_WRITE_COMMAND_SENT:
131161a5569SMatthias Ringwald             em9304_spi_engine_state = SPI_EM9304_TX_WRITE_COMMAND_SENT;
132161a5569SMatthias Ringwald             break;
133161a5569SMatthias Ringwald         case SPI_EM9304_TX_W4_STS2_RECEIVED:
134161a5569SMatthias Ringwald             em9304_spi_engine_state = SPI_EM9304_TX_STS2_RECEIVED;
135161a5569SMatthias Ringwald             break;
136161a5569SMatthias Ringwald         case SPI_EM9304_TX_W4_DATA_SENT:
137161a5569SMatthias Ringwald             em9304_spi_engine_state = SPI_EM9304_TX_DATA_SENT;
138161a5569SMatthias Ringwald             break;
139161a5569SMatthias Ringwald         default:
140161a5569SMatthias Ringwald             return;
141161a5569SMatthias Ringwald     }
142fc46bba0SMatthias Ringwald     em9304_spi_engine_run();
143161a5569SMatthias Ringwald }
144161a5569SMatthias Ringwald 
145161a5569SMatthias Ringwald static void em9304_spi_engine_start_tx_transaction(void){
146161a5569SMatthias Ringwald     // state = wait for RDY
147161a5569SMatthias Ringwald     em9304_spi_engine_state = SPI_EM9304_TX_W4_RDY;
148161a5569SMatthias Ringwald 
149161a5569SMatthias Ringwald     // chip select
150161a5569SMatthias Ringwald     btstack_em9304_spi->set_chip_select(1);
151161a5569SMatthias Ringwald 
152161a5569SMatthias Ringwald     // enable IRQ
153161a5569SMatthias Ringwald     btstack_em9304_spi->set_ready_callback(&em9304_spi_engine_ready_callback);
154161a5569SMatthias Ringwald }
155161a5569SMatthias Ringwald 
156*aed1d832SMatthias Ringwald static void em9304_spi_engine_start_rx_transaction(void){
157161a5569SMatthias Ringwald     // disable interrupt again
158161a5569SMatthias Ringwald     btstack_em9304_spi->set_ready_callback(NULL);
159f2e99339SMatthias Ringwald 
160161a5569SMatthias Ringwald     // enable chip select
161161a5569SMatthias Ringwald     btstack_em9304_spi->set_chip_select(1);
162161a5569SMatthias Ringwald 
163161a5569SMatthias Ringwald     // send read command
164161a5569SMatthias Ringwald     em9304_spi_engine_state = SPI_EM9304_RX_W4_READ_COMMAND_SENT;
165161a5569SMatthias Ringwald     sCommand.bytes[0] = EM9304_SPI_HEADER_RX;
166161a5569SMatthias Ringwald     btstack_em9304_spi->transmit(sCommand.bytes, 1);
167161a5569SMatthias Ringwald }
168*aed1d832SMatthias Ringwald 
169*aed1d832SMatthias Ringwald static inline int em9304_engine_space_in_rx_buffer(void){
170*aed1d832SMatthias Ringwald     return btstack_ring_buffer_bytes_free(&em9304_spi_engine_rx_ring_buffer) >= SPI_EM9304_BUFFER_SIZE;
171*aed1d832SMatthias Ringwald }
172*aed1d832SMatthias Ringwald 
173*aed1d832SMatthias Ringwald static void em9304_engine_receive_buffer_ready(void){
174*aed1d832SMatthias Ringwald     // no data ready for receive or transmit, but space in rx ringbuffer  -> enable READY IRQ
175*aed1d832SMatthias Ringwald     em9304_spi_engine_state = SPI_EM9304_READY_FOR_TX_AND_RX;
176*aed1d832SMatthias Ringwald     btstack_em9304_spi->set_ready_callback(&em9304_spi_engine_ready_callback);
177*aed1d832SMatthias Ringwald     // avoid dead lock, check READY again
178*aed1d832SMatthias Ringwald     if (btstack_em9304_spi->get_ready()){
179*aed1d832SMatthias Ringwald         em9304_spi_engine_start_rx_transaction();
180*aed1d832SMatthias Ringwald     }
181*aed1d832SMatthias Ringwald }
182*aed1d832SMatthias Ringwald 
183*aed1d832SMatthias Ringwald static void em9304_engine_start_next_transaction(void){
184*aed1d832SMatthias Ringwald 
185*aed1d832SMatthias Ringwald     switch (em9304_spi_engine_state){
186*aed1d832SMatthias Ringwald         case SPI_EM9304_READY_FOR_TX:
187*aed1d832SMatthias Ringwald         case SPI_EM9304_READY_FOR_TX_AND_RX:
188*aed1d832SMatthias Ringwald         case SPI_EM9304_DONE:
189*aed1d832SMatthias Ringwald             break;
190*aed1d832SMatthias Ringwald         default:
191*aed1d832SMatthias Ringwald             return;
192*aed1d832SMatthias Ringwald     }
193*aed1d832SMatthias Ringwald 
194*aed1d832SMatthias Ringwald     if (btstack_em9304_spi->get_ready() && em9304_engine_space_in_rx_buffer()) {
195*aed1d832SMatthias Ringwald         em9304_spi_engine_start_rx_transaction();
196161a5569SMatthias Ringwald     } else if (em9304_spi_engine_tx_size){
197161a5569SMatthias Ringwald         em9304_spi_engine_start_tx_transaction();
198f2e99339SMatthias Ringwald     } else if (em9304_engine_space_in_rx_buffer()){
199fc46bba0SMatthias Ringwald         em9304_engine_receive_buffer_ready();
200161a5569SMatthias Ringwald     }
201f2e99339SMatthias Ringwald }
202f2e99339SMatthias Ringwald 
203fc46bba0SMatthias Ringwald static void em9304_engine_action_done(void){
204fc46bba0SMatthias Ringwald     // chip deselect & done
205fc46bba0SMatthias Ringwald     btstack_em9304_spi->set_chip_select(0);
206fc46bba0SMatthias Ringwald     em9304_spi_engine_state = SPI_EM9304_DONE;
207fc46bba0SMatthias Ringwald }
208fc46bba0SMatthias Ringwald 
209fc46bba0SMatthias Ringwald static void em9304_spi_engine_run(void){
210f2e99339SMatthias Ringwald     uint16_t max_bytes_to_send;
211f2e99339SMatthias Ringwald     switch (em9304_spi_engine_state){
212161a5569SMatthias Ringwald 
213*aed1d832SMatthias Ringwald         case SPI_EM9304_READY_FOR_TX_AND_RX:
214*aed1d832SMatthias Ringwald             // check if ready
215*aed1d832SMatthias Ringwald             if (!btstack_em9304_spi->get_ready()) break;
216*aed1d832SMatthias Ringwald             em9304_spi_engine_start_rx_transaction();
217*aed1d832SMatthias Ringwald             break;
218*aed1d832SMatthias Ringwald 
219161a5569SMatthias Ringwald         case SPI_EM9304_RX_READ_COMMAND_SENT:
220161a5569SMatthias Ringwald             em9304_spi_engine_state = SPI_EM9304_RX_W4_STS2_RECEIVED;
221161a5569SMatthias Ringwald             btstack_em9304_spi->receive(sStas.bytes, 1);
222161a5569SMatthias Ringwald             break;
223161a5569SMatthias Ringwald 
224161a5569SMatthias Ringwald         case SPI_EM9304_RX_STS2_RECEIVED:
225161a5569SMatthias Ringwald             // check slave status
226161a5569SMatthias Ringwald             log_debug("RX: STS2 0x%02X", sStas.bytes[0]);
227161a5569SMatthias Ringwald 
228fc46bba0SMatthias Ringwald             // read data
229161a5569SMatthias Ringwald             em9304_spi_engine_state = SPI_EM9304_RX_W4_DATA_RECEIVED;
230161a5569SMatthias Ringwald             em9304_spi_engine_rx_request_len = sStas.bytes[0];
23124b2b71bSMatthias Ringwald             btstack_em9304_spi->receive(em9304_spi_engine_spi_buffer.bytes, em9304_spi_engine_rx_request_len);
232161a5569SMatthias Ringwald             break;
233161a5569SMatthias Ringwald 
234161a5569SMatthias Ringwald         case SPI_EM9304_RX_DATA_RECEIVED:
235fc46bba0SMatthias Ringwald             // done
236fc46bba0SMatthias Ringwald             em9304_engine_action_done();
237161a5569SMatthias Ringwald 
238161a5569SMatthias Ringwald             // move data into ring buffer
23924b2b71bSMatthias Ringwald             btstack_ring_buffer_write(&em9304_spi_engine_rx_ring_buffer, em9304_spi_engine_spi_buffer.bytes, em9304_spi_engine_rx_request_len);
240161a5569SMatthias Ringwald             em9304_spi_engine_rx_request_len = 0;
241161a5569SMatthias Ringwald 
242fc46bba0SMatthias Ringwald             // notify about new data available -- assume empty
243f2e99339SMatthias Ringwald             (*em9304_spi_engine_rx_available_handler)();
244f2e99339SMatthias Ringwald 
245fc46bba0SMatthias Ringwald             // next
246fc46bba0SMatthias Ringwald             em9304_engine_start_next_transaction();
247161a5569SMatthias Ringwald             break;
248161a5569SMatthias Ringwald 
249161a5569SMatthias Ringwald         case SPI_EM9304_TX_W4_RDY:
250161a5569SMatthias Ringwald             // check if ready
251161a5569SMatthias Ringwald             if (!btstack_em9304_spi->get_ready()) break;
252161a5569SMatthias Ringwald 
253161a5569SMatthias Ringwald             // disable interrupt again
254161a5569SMatthias Ringwald             btstack_em9304_spi->set_ready_callback(NULL);
255161a5569SMatthias Ringwald 
256161a5569SMatthias Ringwald             // send write command
257161a5569SMatthias Ringwald             em9304_spi_engine_state = SPI_EM9304_TX_W4_WRITE_COMMAND_SENT;
258161a5569SMatthias Ringwald             sCommand.bytes[0] = EM9304_SPI_HEADER_TX;
259161a5569SMatthias Ringwald             btstack_em9304_spi->transmit(sCommand.bytes, 1);
260161a5569SMatthias Ringwald             break;
261161a5569SMatthias Ringwald 
262161a5569SMatthias Ringwald         case SPI_EM9304_TX_WRITE_COMMAND_SENT:
263161a5569SMatthias Ringwald             em9304_spi_engine_state = SPI_EM9304_TX_W4_STS2_RECEIVED;
264161a5569SMatthias Ringwald             btstack_em9304_spi->receive(sStas.bytes, 1);
265161a5569SMatthias Ringwald             break;
266161a5569SMatthias Ringwald 
267161a5569SMatthias Ringwald         case SPI_EM9304_TX_STS2_RECEIVED:
268161a5569SMatthias Ringwald             // check slave status and em9304 rx buffer space
269161a5569SMatthias Ringwald             log_debug("TX: STS2 0x%02X", sStas.bytes[0]);
270161a5569SMatthias Ringwald             max_bytes_to_send = sStas.bytes[0];
271161a5569SMatthias Ringwald             if (max_bytes_to_send == 0){
272fc46bba0SMatthias Ringwald                 // done
273fc46bba0SMatthias Ringwald                 em9304_engine_action_done();
274fc46bba0SMatthias Ringwald                 // next
275fc46bba0SMatthias Ringwald                 em9304_engine_start_next_transaction();
276161a5569SMatthias Ringwald                 break;
277161a5569SMatthias Ringwald             }
278161a5569SMatthias Ringwald 
279161a5569SMatthias Ringwald             // number bytes to send
280161a5569SMatthias Ringwald             em9304_spi_engine_tx_request_len = btstack_min(em9304_spi_engine_tx_size, max_bytes_to_send);
281161a5569SMatthias Ringwald 
282161a5569SMatthias Ringwald             // send command
283161a5569SMatthias Ringwald             em9304_spi_engine_state = SPI_EM9304_TX_W4_DATA_SENT;
28424b2b71bSMatthias Ringwald             if ( (((uintptr_t) em9304_spi_engine_tx_data) & 0x03) == 0){
28524b2b71bSMatthias Ringwald                 // 4-byte aligned
286161a5569SMatthias Ringwald                 btstack_em9304_spi->transmit( (uint8_t*) em9304_spi_engine_tx_data, em9304_spi_engine_tx_request_len);
28724b2b71bSMatthias Ringwald             } else {
28824b2b71bSMatthias Ringwald                 // TODO: get rid of alignment requirement
28924b2b71bSMatthias Ringwald                 // enforce alignment by copying to spi buffer first
29024b2b71bSMatthias Ringwald                 memcpy(em9304_spi_engine_spi_buffer.bytes, em9304_spi_engine_tx_data, em9304_spi_engine_tx_request_len);
29124b2b71bSMatthias Ringwald                 btstack_em9304_spi->transmit( (uint8_t*) em9304_spi_engine_spi_buffer.bytes, em9304_spi_engine_tx_request_len);
29224b2b71bSMatthias Ringwald             }
293161a5569SMatthias Ringwald             break;
294161a5569SMatthias Ringwald 
295161a5569SMatthias Ringwald         case SPI_EM9304_TX_DATA_SENT:
296fc46bba0SMatthias Ringwald             // done
297fc46bba0SMatthias Ringwald             em9304_engine_action_done();
298161a5569SMatthias Ringwald 
299fc46bba0SMatthias Ringwald             // chunk sent
300161a5569SMatthias Ringwald             em9304_spi_engine_tx_size -= em9304_spi_engine_tx_request_len;
301161a5569SMatthias Ringwald             em9304_spi_engine_tx_data += em9304_spi_engine_tx_request_len;
302161a5569SMatthias Ringwald             em9304_spi_engine_tx_request_len = 0;
303161a5569SMatthias Ringwald 
304fc46bba0SMatthias Ringwald             // notify higher layer when complete
305fc46bba0SMatthias Ringwald             if (em9304_spi_engine_tx_size == 0){
306161a5569SMatthias Ringwald                 (*em9304_spi_engine_tx_done_handler)();
307161a5569SMatthias Ringwald             }
308fc46bba0SMatthias Ringwald 
309fc46bba0SMatthias Ringwald             // next
310fc46bba0SMatthias Ringwald             em9304_engine_start_next_transaction();
311161a5569SMatthias Ringwald             break;
312161a5569SMatthias Ringwald 
313161a5569SMatthias Ringwald         default:
314161a5569SMatthias Ringwald             break;
315161a5569SMatthias Ringwald     }
316161a5569SMatthias Ringwald }
317161a5569SMatthias Ringwald 
318161a5569SMatthias Ringwald static void em9304_spi_engine_init(void){
319161a5569SMatthias Ringwald     btstack_em9304_spi->open();
320161a5569SMatthias Ringwald     btstack_em9304_spi->set_transfer_done_callback(&em9304_spi_engine_transfer_done);
321161a5569SMatthias Ringwald     btstack_ring_buffer_init(&em9304_spi_engine_rx_ring_buffer, &em9304_spi_engine_rx_ring_buffer_storage[0], SPI_EM9304_RING_BUFFER_SIZE);
322fc46bba0SMatthias Ringwald     em9304_spi_engine_state = SPI_EM9304_DONE;
323fc46bba0SMatthias Ringwald     em9304_engine_start_next_transaction();
324161a5569SMatthias Ringwald }
325161a5569SMatthias Ringwald 
326161a5569SMatthias Ringwald static void em9304_spi_engine_close(void){
327161a5569SMatthias Ringwald     btstack_em9304_spi->close();
328161a5569SMatthias Ringwald }
329161a5569SMatthias Ringwald 
330f2e99339SMatthias Ringwald static void em9304_spi_engine_set_data_available( void (*the_block_handler)(void)){
331f2e99339SMatthias Ringwald     em9304_spi_engine_rx_available_handler = the_block_handler;
332161a5569SMatthias Ringwald }
333161a5569SMatthias Ringwald 
334161a5569SMatthias Ringwald static void em9304_spi_engine_set_block_sent( void (*the_block_handler)(void)){
335161a5569SMatthias Ringwald     em9304_spi_engine_tx_done_handler = the_block_handler;
336161a5569SMatthias Ringwald }
337161a5569SMatthias Ringwald 
338161a5569SMatthias Ringwald static void em9304_spi_engine_send_block(const uint8_t *buffer, uint16_t length){
339161a5569SMatthias Ringwald     em9304_spi_engine_tx_data = buffer;
340161a5569SMatthias Ringwald     em9304_spi_engine_tx_size = length;
341fc46bba0SMatthias Ringwald     em9304_engine_start_next_transaction();
342161a5569SMatthias Ringwald }
343161a5569SMatthias Ringwald 
344fc46bba0SMatthias Ringwald static uint16_t em9304_engine_num_bytes_available(void){
345f2e99339SMatthias Ringwald     return btstack_ring_buffer_bytes_available(&em9304_spi_engine_rx_ring_buffer);
346161a5569SMatthias Ringwald }
347161a5569SMatthias Ringwald 
348f2e99339SMatthias Ringwald static void em9304_engine_get_bytes(uint8_t * buffer, uint16_t num_bytes){
349f2e99339SMatthias Ringwald     uint32_t bytes_read;
350f2e99339SMatthias Ringwald     btstack_ring_buffer_read(&em9304_spi_engine_rx_ring_buffer, buffer, num_bytes, &bytes_read);
351f2e99339SMatthias Ringwald }
352f2e99339SMatthias Ringwald 
353161a5569SMatthias Ringwald //////////////////////////////////////////////////////////////////////////////
354161a5569SMatthias Ringwald 
355161a5569SMatthias Ringwald // assert pre-buffer for packet type is available
356161a5569SMatthias Ringwald #if !defined(HCI_OUTGOING_PRE_BUFFER_SIZE) || (HCI_OUTGOING_PRE_BUFFER_SIZE == 0)
357161a5569SMatthias Ringwald #error HCI_OUTGOING_PRE_BUFFER_SIZE not defined. Please update hci.h
358161a5569SMatthias Ringwald #endif
359161a5569SMatthias Ringwald 
360161a5569SMatthias Ringwald static void dummy_handler(uint8_t packet_type, uint8_t *packet, uint16_t size);
361161a5569SMatthias Ringwald 
362161a5569SMatthias Ringwald typedef enum {
363161a5569SMatthias Ringwald     H4_W4_PACKET_TYPE,
364161a5569SMatthias Ringwald     H4_W4_EVENT_HEADER,
365161a5569SMatthias Ringwald     H4_W4_ACL_HEADER,
366161a5569SMatthias Ringwald     H4_W4_PAYLOAD,
367161a5569SMatthias Ringwald } H4_STATE;
368161a5569SMatthias Ringwald 
369161a5569SMatthias Ringwald typedef enum {
370161a5569SMatthias Ringwald     TX_IDLE = 1,
371161a5569SMatthias Ringwald     TX_W4_PACKET_SENT,
372161a5569SMatthias Ringwald } TX_STATE;
373161a5569SMatthias Ringwald 
374161a5569SMatthias Ringwald // write state
375161a5569SMatthias Ringwald static TX_STATE tx_state;
376161a5569SMatthias Ringwald 
377161a5569SMatthias Ringwald static uint8_t packet_sent_event[] = { HCI_EVENT_TRANSPORT_PACKET_SENT, 0};
378161a5569SMatthias Ringwald 
379161a5569SMatthias Ringwald static  void (*packet_handler)(uint8_t packet_type, uint8_t *packet, uint16_t size) = dummy_handler;
380161a5569SMatthias Ringwald 
381161a5569SMatthias Ringwald // packet reader state machine
382fc46bba0SMatthias Ringwald static H4_STATE hci_transport_em9304_h4_state;
383fc46bba0SMatthias Ringwald static uint16_t hci_transport_em9304_spi_bytes_to_read;
384fc46bba0SMatthias Ringwald static uint16_t hci_transport_em9304_spi_read_pos;
385161a5569SMatthias Ringwald 
386161a5569SMatthias Ringwald // incoming packet buffer
387161a5569SMatthias Ringwald static uint8_t hci_packet_with_pre_buffer[HCI_INCOMING_PRE_BUFFER_SIZE + 1 + HCI_PACKET_BUFFER_SIZE]; // packet type + max(acl header + acl payload, event header + event data)
388161a5569SMatthias Ringwald static uint8_t * hci_packet = &hci_packet_with_pre_buffer[HCI_INCOMING_PRE_BUFFER_SIZE];
389161a5569SMatthias Ringwald 
390f2e99339SMatthias Ringwald static void hci_transport_em9304_spi_block_read(void);
391f2e99339SMatthias Ringwald 
392161a5569SMatthias Ringwald static void hci_transport_em9304_spi_reset_statemachine(void){
393fc46bba0SMatthias Ringwald     hci_transport_em9304_h4_state = H4_W4_PACKET_TYPE;
394fc46bba0SMatthias Ringwald     hci_transport_em9304_spi_read_pos = 0;
395fc46bba0SMatthias Ringwald     hci_transport_em9304_spi_bytes_to_read = 1;
396161a5569SMatthias Ringwald }
397161a5569SMatthias Ringwald 
398f2e99339SMatthias Ringwald static void hci_transport_em9304_spi_process_data(void){
399f2e99339SMatthias Ringwald     while (1){
400fc46bba0SMatthias Ringwald 
401fc46bba0SMatthias Ringwald         uint16_t bytes_available = em9304_engine_num_bytes_available();
402fc46bba0SMatthias Ringwald         log_debug("transfer_rx_data: ring buffer has %u -> hci wants %u", bytes_available, hci_transport_em9304_spi_bytes_to_read);
403f2e99339SMatthias Ringwald 
404f2e99339SMatthias Ringwald         if (!bytes_available) break;
405fc46bba0SMatthias Ringwald         if (!hci_transport_em9304_spi_bytes_to_read) break;
406f2e99339SMatthias Ringwald 
407fc46bba0SMatthias Ringwald         uint16_t bytes_to_copy = btstack_min(bytes_available, hci_transport_em9304_spi_bytes_to_read);
408fc46bba0SMatthias Ringwald         em9304_engine_get_bytes(&hci_packet[hci_transport_em9304_spi_read_pos], bytes_to_copy);
409f2e99339SMatthias Ringwald 
410fc46bba0SMatthias Ringwald         hci_transport_em9304_spi_read_pos      += bytes_to_copy;
411fc46bba0SMatthias Ringwald         hci_transport_em9304_spi_bytes_to_read -= bytes_to_copy;
412f2e99339SMatthias Ringwald 
413fc46bba0SMatthias Ringwald         if (hci_transport_em9304_spi_bytes_to_read == 0){
414fc46bba0SMatthias Ringwald             hci_transport_em9304_spi_block_read();
415f2e99339SMatthias Ringwald         }
416f2e99339SMatthias Ringwald     }
417f2e99339SMatthias Ringwald }
418f2e99339SMatthias Ringwald 
419161a5569SMatthias Ringwald static void hci_transport_em9304_spi_block_read(void){
420fc46bba0SMatthias Ringwald     switch (hci_transport_em9304_h4_state) {
421161a5569SMatthias Ringwald         case H4_W4_PACKET_TYPE:
422161a5569SMatthias Ringwald             switch (hci_packet[0]){
423161a5569SMatthias Ringwald                 case HCI_EVENT_PACKET:
424fc46bba0SMatthias Ringwald                     hci_transport_em9304_spi_bytes_to_read = HCI_EVENT_HEADER_SIZE;
425fc46bba0SMatthias Ringwald                     hci_transport_em9304_h4_state = H4_W4_EVENT_HEADER;
426161a5569SMatthias Ringwald                     break;
427161a5569SMatthias Ringwald                 case HCI_ACL_DATA_PACKET:
428fc46bba0SMatthias Ringwald                     hci_transport_em9304_spi_bytes_to_read = HCI_ACL_HEADER_SIZE;
429fc46bba0SMatthias Ringwald                     hci_transport_em9304_h4_state = H4_W4_ACL_HEADER;
430161a5569SMatthias Ringwald                     break;
431161a5569SMatthias Ringwald                 default:
432fc46bba0SMatthias Ringwald                     log_error("invalid packet type 0x%02x", hci_packet[0]);
433161a5569SMatthias Ringwald                     hci_transport_em9304_spi_reset_statemachine();
434161a5569SMatthias Ringwald                     break;
435161a5569SMatthias Ringwald             }
436161a5569SMatthias Ringwald             break;
437161a5569SMatthias Ringwald 
438161a5569SMatthias Ringwald         case H4_W4_EVENT_HEADER:
439fc46bba0SMatthias Ringwald             hci_transport_em9304_spi_bytes_to_read = hci_packet[2];
440fc46bba0SMatthias Ringwald             hci_transport_em9304_h4_state = H4_W4_PAYLOAD;
441161a5569SMatthias Ringwald             break;
442161a5569SMatthias Ringwald 
443161a5569SMatthias Ringwald         case H4_W4_ACL_HEADER:
444fc46bba0SMatthias Ringwald             hci_transport_em9304_spi_bytes_to_read = little_endian_read_16( hci_packet, 3);
445161a5569SMatthias Ringwald             // check ACL length
446fc46bba0SMatthias Ringwald             if (HCI_ACL_HEADER_SIZE + hci_transport_em9304_spi_bytes_to_read >  HCI_PACKET_BUFFER_SIZE){
447fc46bba0SMatthias Ringwald                 log_error("invalid ACL payload len %d - only space for %u", hci_transport_em9304_spi_bytes_to_read, HCI_PACKET_BUFFER_SIZE - HCI_ACL_HEADER_SIZE);
448161a5569SMatthias Ringwald                 hci_transport_em9304_spi_reset_statemachine();
449161a5569SMatthias Ringwald                 break;
450161a5569SMatthias Ringwald             }
451fc46bba0SMatthias Ringwald             hci_transport_em9304_h4_state = H4_W4_PAYLOAD;
452161a5569SMatthias Ringwald             break;
453161a5569SMatthias Ringwald 
454161a5569SMatthias Ringwald         case H4_W4_PAYLOAD:
455fc46bba0SMatthias Ringwald             packet_handler(hci_packet[0], &hci_packet[1], hci_transport_em9304_spi_read_pos-1);
456161a5569SMatthias Ringwald             hci_transport_em9304_spi_reset_statemachine();
457161a5569SMatthias Ringwald             break;
458161a5569SMatthias Ringwald         default:
459161a5569SMatthias Ringwald             break;
460161a5569SMatthias Ringwald     }
461161a5569SMatthias Ringwald }
462161a5569SMatthias Ringwald 
463161a5569SMatthias Ringwald static void hci_transport_em9304_spi_block_sent(void){
464161a5569SMatthias Ringwald     switch (tx_state){
465161a5569SMatthias Ringwald         case TX_W4_PACKET_SENT:
466161a5569SMatthias Ringwald             // packet fully sent, reset state
467161a5569SMatthias Ringwald             tx_state = TX_IDLE;
468161a5569SMatthias Ringwald             // notify upper stack that it can send again
469161a5569SMatthias Ringwald             packet_handler(HCI_EVENT_PACKET, &packet_sent_event[0], sizeof(packet_sent_event));
470161a5569SMatthias Ringwald             break;
471161a5569SMatthias Ringwald         default:
472161a5569SMatthias Ringwald             break;
473161a5569SMatthias Ringwald     }
474161a5569SMatthias Ringwald }
475161a5569SMatthias Ringwald 
476161a5569SMatthias Ringwald static int hci_transport_em9304_spi_can_send_now(uint8_t packet_type){
477161a5569SMatthias Ringwald     return tx_state == TX_IDLE;
478161a5569SMatthias Ringwald }
479161a5569SMatthias Ringwald 
480161a5569SMatthias Ringwald static int hci_transport_em9304_spi_send_packet(uint8_t packet_type, uint8_t * packet, int size){
481161a5569SMatthias Ringwald 
482161a5569SMatthias Ringwald     // store packet type before actual data and increase size
483161a5569SMatthias Ringwald     size++;
484161a5569SMatthias Ringwald     packet--;
485161a5569SMatthias Ringwald     *packet = packet_type;
486161a5569SMatthias Ringwald 
487161a5569SMatthias Ringwald     // start sending
488161a5569SMatthias Ringwald     tx_state = TX_W4_PACKET_SENT;
489161a5569SMatthias Ringwald     em9304_spi_engine_send_block(packet, size);
490161a5569SMatthias Ringwald     return 0;
491161a5569SMatthias Ringwald }
492161a5569SMatthias Ringwald 
493161a5569SMatthias Ringwald static void hci_transport_em9304_spi_init(const void * transport_config){
494161a5569SMatthias Ringwald }
495161a5569SMatthias Ringwald 
496161a5569SMatthias Ringwald static int hci_transport_em9304_spi_open(void){
497161a5569SMatthias Ringwald 
498161a5569SMatthias Ringwald     // setup UART driver
499161a5569SMatthias Ringwald     em9304_spi_engine_init();
500f2e99339SMatthias Ringwald     em9304_spi_engine_set_data_available(&hci_transport_em9304_spi_process_data);
501161a5569SMatthias Ringwald     em9304_spi_engine_set_block_sent(&hci_transport_em9304_spi_block_sent);
502161a5569SMatthias Ringwald     // setup H4 RX
503161a5569SMatthias Ringwald     hci_transport_em9304_spi_reset_statemachine();
504161a5569SMatthias Ringwald     // setup H4 TX
505161a5569SMatthias Ringwald     tx_state = TX_IDLE;
506161a5569SMatthias Ringwald     return 0;
507161a5569SMatthias Ringwald }
508161a5569SMatthias Ringwald 
509161a5569SMatthias Ringwald static int hci_transport_em9304_spi_close(void){
510161a5569SMatthias Ringwald     em9304_spi_engine_close();
511161a5569SMatthias Ringwald     return 0;
512161a5569SMatthias Ringwald }
513161a5569SMatthias Ringwald 
514161a5569SMatthias Ringwald static void hci_transport_em9304_spi_register_packet_handler(void (*handler)(uint8_t packet_type, uint8_t *packet, uint16_t size)){
515161a5569SMatthias Ringwald     packet_handler = handler;
516161a5569SMatthias Ringwald }
517161a5569SMatthias Ringwald 
518161a5569SMatthias Ringwald static void dummy_handler(uint8_t packet_type, uint8_t *packet, uint16_t size){
519161a5569SMatthias Ringwald }
520161a5569SMatthias Ringwald 
521161a5569SMatthias Ringwald // --- end of eHCILL implementation ---------
522161a5569SMatthias Ringwald 
523161a5569SMatthias Ringwald static const hci_transport_t hci_transport_em9304_spi = {
524161a5569SMatthias Ringwald     /* const char * name; */                                        "H4",
525161a5569SMatthias Ringwald     /* void   (*init) (const void *transport_config); */            &hci_transport_em9304_spi_init,
526161a5569SMatthias Ringwald     /* int    (*open)(void); */                                     &hci_transport_em9304_spi_open,
527161a5569SMatthias Ringwald     /* int    (*close)(void); */                                    &hci_transport_em9304_spi_close,
528161a5569SMatthias Ringwald     /* void   (*register_packet_handler)(void (*handler)(...); */   &hci_transport_em9304_spi_register_packet_handler,
529161a5569SMatthias Ringwald     /* int    (*can_send_packet_now)(uint8_t packet_type); */       &hci_transport_em9304_spi_can_send_now,
530161a5569SMatthias Ringwald     /* int    (*send_packet)(...); */                               &hci_transport_em9304_spi_send_packet,
531161a5569SMatthias Ringwald     /* int    (*set_baudrate)(uint32_t baudrate); */                NULL,
532161a5569SMatthias Ringwald     /* void   (*reset_link)(void); */                               NULL,
533161a5569SMatthias Ringwald     /* void   (*set_sco_config)(uint16_t voice_setting, int num_connections); */ NULL,
534161a5569SMatthias Ringwald };
535161a5569SMatthias Ringwald 
536161a5569SMatthias Ringwald // configure and return h4 singleton
537161a5569SMatthias Ringwald const hci_transport_t * hci_transport_em9304_spi_instance(const btstack_em9304_spi_t * em9304_spi_driver) {
538161a5569SMatthias Ringwald     btstack_em9304_spi = em9304_spi_driver;
539161a5569SMatthias Ringwald     return &hci_transport_em9304_spi;
540161a5569SMatthias Ringwald }
541