1*6b8177c5SMatthias Ringwald /* USER CODE BEGIN Header */ 2*6b8177c5SMatthias Ringwald /** 3*6b8177c5SMatthias Ringwald ****************************************************************************** 4*6b8177c5SMatthias Ringwald * @file stm32l4xx_it.c 5*6b8177c5SMatthias Ringwald * @brief Interrupt Service Routines. 6*6b8177c5SMatthias Ringwald ****************************************************************************** 7*6b8177c5SMatthias Ringwald * @attention 8*6b8177c5SMatthias Ringwald * 9*6b8177c5SMatthias Ringwald * <h2><center>© Copyright (c) 2020 STMicroelectronics. 10*6b8177c5SMatthias Ringwald * All rights reserved.</center></h2> 11*6b8177c5SMatthias Ringwald * 12*6b8177c5SMatthias Ringwald * This software component is licensed by ST under BSD 3-Clause license, 13*6b8177c5SMatthias Ringwald * the "License"; You may not use this file except in compliance with the 14*6b8177c5SMatthias Ringwald * License. You may obtain a copy of the License at: 15*6b8177c5SMatthias Ringwald * opensource.org/licenses/BSD-3-Clause 16*6b8177c5SMatthias Ringwald * 17*6b8177c5SMatthias Ringwald ****************************************************************************** 18*6b8177c5SMatthias Ringwald */ 19*6b8177c5SMatthias Ringwald /* USER CODE END Header */ 20*6b8177c5SMatthias Ringwald 21*6b8177c5SMatthias Ringwald /* Includes ------------------------------------------------------------------*/ 22*6b8177c5SMatthias Ringwald #include "main.h" 23*6b8177c5SMatthias Ringwald #include "stm32l4xx_it.h" 24*6b8177c5SMatthias Ringwald /* Private includes ----------------------------------------------------------*/ 25*6b8177c5SMatthias Ringwald /* USER CODE BEGIN Includes */ 26*6b8177c5SMatthias Ringwald /* USER CODE END Includes */ 27*6b8177c5SMatthias Ringwald 28*6b8177c5SMatthias Ringwald /* Private typedef -----------------------------------------------------------*/ 29*6b8177c5SMatthias Ringwald /* USER CODE BEGIN TD */ 30*6b8177c5SMatthias Ringwald 31*6b8177c5SMatthias Ringwald /* USER CODE END TD */ 32*6b8177c5SMatthias Ringwald 33*6b8177c5SMatthias Ringwald /* Private define ------------------------------------------------------------*/ 34*6b8177c5SMatthias Ringwald /* USER CODE BEGIN PD */ 35*6b8177c5SMatthias Ringwald 36*6b8177c5SMatthias Ringwald /* USER CODE END PD */ 37*6b8177c5SMatthias Ringwald 38*6b8177c5SMatthias Ringwald /* Private macro -------------------------------------------------------------*/ 39*6b8177c5SMatthias Ringwald /* USER CODE BEGIN PM */ 40*6b8177c5SMatthias Ringwald 41*6b8177c5SMatthias Ringwald /* USER CODE END PM */ 42*6b8177c5SMatthias Ringwald 43*6b8177c5SMatthias Ringwald /* Private variables ---------------------------------------------------------*/ 44*6b8177c5SMatthias Ringwald /* USER CODE BEGIN PV */ 45*6b8177c5SMatthias Ringwald 46*6b8177c5SMatthias Ringwald /* USER CODE END PV */ 47*6b8177c5SMatthias Ringwald 48*6b8177c5SMatthias Ringwald /* Private function prototypes -----------------------------------------------*/ 49*6b8177c5SMatthias Ringwald /* USER CODE BEGIN PFP */ 50*6b8177c5SMatthias Ringwald 51*6b8177c5SMatthias Ringwald /* USER CODE END PFP */ 52*6b8177c5SMatthias Ringwald 53*6b8177c5SMatthias Ringwald /* Private user code ---------------------------------------------------------*/ 54*6b8177c5SMatthias Ringwald /* USER CODE BEGIN 0 */ 55*6b8177c5SMatthias Ringwald 56*6b8177c5SMatthias Ringwald /* USER CODE END 0 */ 57*6b8177c5SMatthias Ringwald 58*6b8177c5SMatthias Ringwald /* External variables --------------------------------------------------------*/ 59*6b8177c5SMatthias Ringwald extern LPTIM_HandleTypeDef hlptim1; 60*6b8177c5SMatthias Ringwald extern DMA_HandleTypeDef hdma_spi1_rx; 61*6b8177c5SMatthias Ringwald extern DMA_HandleTypeDef hdma_spi1_tx; 62*6b8177c5SMatthias Ringwald /* USER CODE BEGIN EV */ 63*6b8177c5SMatthias Ringwald 64*6b8177c5SMatthias Ringwald /* USER CODE END EV */ 65*6b8177c5SMatthias Ringwald 66*6b8177c5SMatthias Ringwald /******************************************************************************/ 67*6b8177c5SMatthias Ringwald /* Cortex-M4 Processor Interruption and Exception Handlers */ 68*6b8177c5SMatthias Ringwald /******************************************************************************/ 69*6b8177c5SMatthias Ringwald /** 70*6b8177c5SMatthias Ringwald * @brief This function handles Non maskable interrupt. 71*6b8177c5SMatthias Ringwald */ NMI_Handler(void)72*6b8177c5SMatthias Ringwaldvoid NMI_Handler(void) 73*6b8177c5SMatthias Ringwald { 74*6b8177c5SMatthias Ringwald /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ 75*6b8177c5SMatthias Ringwald 76*6b8177c5SMatthias Ringwald /* USER CODE END NonMaskableInt_IRQn 0 */ 77*6b8177c5SMatthias Ringwald /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ 78*6b8177c5SMatthias Ringwald 79*6b8177c5SMatthias Ringwald /* USER CODE END NonMaskableInt_IRQn 1 */ 80*6b8177c5SMatthias Ringwald } 81*6b8177c5SMatthias Ringwald 82*6b8177c5SMatthias Ringwald /** 83*6b8177c5SMatthias Ringwald * @brief This function handles Hard fault interrupt. 84*6b8177c5SMatthias Ringwald */ HardFault_Handler(void)85*6b8177c5SMatthias Ringwaldvoid HardFault_Handler(void) 86*6b8177c5SMatthias Ringwald { 87*6b8177c5SMatthias Ringwald /* USER CODE BEGIN HardFault_IRQn 0 */ 88*6b8177c5SMatthias Ringwald 89*6b8177c5SMatthias Ringwald /* USER CODE END HardFault_IRQn 0 */ 90*6b8177c5SMatthias Ringwald while (1) 91*6b8177c5SMatthias Ringwald { 92*6b8177c5SMatthias Ringwald /* USER CODE BEGIN W1_HardFault_IRQn 0 */ 93*6b8177c5SMatthias Ringwald /* USER CODE END W1_HardFault_IRQn 0 */ 94*6b8177c5SMatthias Ringwald } 95*6b8177c5SMatthias Ringwald } 96*6b8177c5SMatthias Ringwald 97*6b8177c5SMatthias Ringwald /** 98*6b8177c5SMatthias Ringwald * @brief This function handles Memory management fault. 99*6b8177c5SMatthias Ringwald */ MemManage_Handler(void)100*6b8177c5SMatthias Ringwaldvoid MemManage_Handler(void) 101*6b8177c5SMatthias Ringwald { 102*6b8177c5SMatthias Ringwald /* USER CODE BEGIN MemoryManagement_IRQn 0 */ 103*6b8177c5SMatthias Ringwald 104*6b8177c5SMatthias Ringwald /* USER CODE END MemoryManagement_IRQn 0 */ 105*6b8177c5SMatthias Ringwald while (1) 106*6b8177c5SMatthias Ringwald { 107*6b8177c5SMatthias Ringwald /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */ 108*6b8177c5SMatthias Ringwald /* USER CODE END W1_MemoryManagement_IRQn 0 */ 109*6b8177c5SMatthias Ringwald } 110*6b8177c5SMatthias Ringwald } 111*6b8177c5SMatthias Ringwald 112*6b8177c5SMatthias Ringwald /** 113*6b8177c5SMatthias Ringwald * @brief This function handles Prefetch fault, memory access fault. 114*6b8177c5SMatthias Ringwald */ BusFault_Handler(void)115*6b8177c5SMatthias Ringwaldvoid BusFault_Handler(void) 116*6b8177c5SMatthias Ringwald { 117*6b8177c5SMatthias Ringwald /* USER CODE BEGIN BusFault_IRQn 0 */ 118*6b8177c5SMatthias Ringwald 119*6b8177c5SMatthias Ringwald /* USER CODE END BusFault_IRQn 0 */ 120*6b8177c5SMatthias Ringwald while (1) 121*6b8177c5SMatthias Ringwald { 122*6b8177c5SMatthias Ringwald /* USER CODE BEGIN W1_BusFault_IRQn 0 */ 123*6b8177c5SMatthias Ringwald /* USER CODE END W1_BusFault_IRQn 0 */ 124*6b8177c5SMatthias Ringwald } 125*6b8177c5SMatthias Ringwald } 126*6b8177c5SMatthias Ringwald 127*6b8177c5SMatthias Ringwald /** 128*6b8177c5SMatthias Ringwald * @brief This function handles Undefined instruction or illegal state. 129*6b8177c5SMatthias Ringwald */ UsageFault_Handler(void)130*6b8177c5SMatthias Ringwaldvoid UsageFault_Handler(void) 131*6b8177c5SMatthias Ringwald { 132*6b8177c5SMatthias Ringwald /* USER CODE BEGIN UsageFault_IRQn 0 */ 133*6b8177c5SMatthias Ringwald 134*6b8177c5SMatthias Ringwald /* USER CODE END UsageFault_IRQn 0 */ 135*6b8177c5SMatthias Ringwald while (1) 136*6b8177c5SMatthias Ringwald { 137*6b8177c5SMatthias Ringwald /* USER CODE BEGIN W1_UsageFault_IRQn 0 */ 138*6b8177c5SMatthias Ringwald /* USER CODE END W1_UsageFault_IRQn 0 */ 139*6b8177c5SMatthias Ringwald } 140*6b8177c5SMatthias Ringwald } 141*6b8177c5SMatthias Ringwald 142*6b8177c5SMatthias Ringwald /** 143*6b8177c5SMatthias Ringwald * @brief This function handles System service call via SWI instruction. 144*6b8177c5SMatthias Ringwald */ SVC_Handler(void)145*6b8177c5SMatthias Ringwaldvoid SVC_Handler(void) 146*6b8177c5SMatthias Ringwald { 147*6b8177c5SMatthias Ringwald /* USER CODE BEGIN SVCall_IRQn 0 */ 148*6b8177c5SMatthias Ringwald 149*6b8177c5SMatthias Ringwald /* USER CODE END SVCall_IRQn 0 */ 150*6b8177c5SMatthias Ringwald /* USER CODE BEGIN SVCall_IRQn 1 */ 151*6b8177c5SMatthias Ringwald 152*6b8177c5SMatthias Ringwald /* USER CODE END SVCall_IRQn 1 */ 153*6b8177c5SMatthias Ringwald } 154*6b8177c5SMatthias Ringwald 155*6b8177c5SMatthias Ringwald /** 156*6b8177c5SMatthias Ringwald * @brief This function handles Debug monitor. 157*6b8177c5SMatthias Ringwald */ DebugMon_Handler(void)158*6b8177c5SMatthias Ringwaldvoid DebugMon_Handler(void) 159*6b8177c5SMatthias Ringwald { 160*6b8177c5SMatthias Ringwald /* USER CODE BEGIN DebugMonitor_IRQn 0 */ 161*6b8177c5SMatthias Ringwald 162*6b8177c5SMatthias Ringwald /* USER CODE END DebugMonitor_IRQn 0 */ 163*6b8177c5SMatthias Ringwald /* USER CODE BEGIN DebugMonitor_IRQn 1 */ 164*6b8177c5SMatthias Ringwald 165*6b8177c5SMatthias Ringwald /* USER CODE END DebugMonitor_IRQn 1 */ 166*6b8177c5SMatthias Ringwald } 167*6b8177c5SMatthias Ringwald 168*6b8177c5SMatthias Ringwald /** 169*6b8177c5SMatthias Ringwald * @brief This function handles Pendable request for system service. 170*6b8177c5SMatthias Ringwald */ PendSV_Handler(void)171*6b8177c5SMatthias Ringwaldvoid PendSV_Handler(void) 172*6b8177c5SMatthias Ringwald { 173*6b8177c5SMatthias Ringwald /* USER CODE BEGIN PendSV_IRQn 0 */ 174*6b8177c5SMatthias Ringwald 175*6b8177c5SMatthias Ringwald /* USER CODE END PendSV_IRQn 0 */ 176*6b8177c5SMatthias Ringwald /* USER CODE BEGIN PendSV_IRQn 1 */ 177*6b8177c5SMatthias Ringwald 178*6b8177c5SMatthias Ringwald /* USER CODE END PendSV_IRQn 1 */ 179*6b8177c5SMatthias Ringwald } 180*6b8177c5SMatthias Ringwald 181*6b8177c5SMatthias Ringwald /** 182*6b8177c5SMatthias Ringwald * @brief This function handles System tick timer. 183*6b8177c5SMatthias Ringwald */ SysTick_Handler(void)184*6b8177c5SMatthias Ringwaldvoid SysTick_Handler(void) 185*6b8177c5SMatthias Ringwald { 186*6b8177c5SMatthias Ringwald /* USER CODE BEGIN SysTick_IRQn 0 */ 187*6b8177c5SMatthias Ringwald 188*6b8177c5SMatthias Ringwald /* USER CODE END SysTick_IRQn 0 */ 189*6b8177c5SMatthias Ringwald HAL_IncTick(); 190*6b8177c5SMatthias Ringwald /* USER CODE BEGIN SysTick_IRQn 1 */ 191*6b8177c5SMatthias Ringwald 192*6b8177c5SMatthias Ringwald /* USER CODE END SysTick_IRQn 1 */ 193*6b8177c5SMatthias Ringwald } 194*6b8177c5SMatthias Ringwald 195*6b8177c5SMatthias Ringwald /******************************************************************************/ 196*6b8177c5SMatthias Ringwald /* STM32L4xx Peripheral Interrupt Handlers */ 197*6b8177c5SMatthias Ringwald /* Add here the Interrupt Handlers for the used peripherals. */ 198*6b8177c5SMatthias Ringwald /* For the available peripheral interrupt handler names, */ 199*6b8177c5SMatthias Ringwald /* please refer to the startup file (startup_stm32l4xx.s). */ 200*6b8177c5SMatthias Ringwald /******************************************************************************/ 201*6b8177c5SMatthias Ringwald 202*6b8177c5SMatthias Ringwald /** 203*6b8177c5SMatthias Ringwald * @brief This function handles EXTI line4 interrupt. 204*6b8177c5SMatthias Ringwald */ EXTI4_IRQHandler(void)205*6b8177c5SMatthias Ringwaldvoid EXTI4_IRQHandler(void) 206*6b8177c5SMatthias Ringwald { 207*6b8177c5SMatthias Ringwald /* USER CODE BEGIN EXTI4_IRQn 0 */ 208*6b8177c5SMatthias Ringwald 209*6b8177c5SMatthias Ringwald /* USER CODE END EXTI4_IRQn 0 */ 210*6b8177c5SMatthias Ringwald HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_4); 211*6b8177c5SMatthias Ringwald /* USER CODE BEGIN EXTI4_IRQn 1 */ 212*6b8177c5SMatthias Ringwald 213*6b8177c5SMatthias Ringwald /* USER CODE END EXTI4_IRQn 1 */ 214*6b8177c5SMatthias Ringwald } 215*6b8177c5SMatthias Ringwald 216*6b8177c5SMatthias Ringwald /** 217*6b8177c5SMatthias Ringwald * @brief This function handles DMA1 channel2 global interrupt. 218*6b8177c5SMatthias Ringwald */ DMA1_Channel2_IRQHandler(void)219*6b8177c5SMatthias Ringwaldvoid DMA1_Channel2_IRQHandler(void) 220*6b8177c5SMatthias Ringwald { 221*6b8177c5SMatthias Ringwald /* USER CODE BEGIN DMA1_Channel2_IRQn 0 */ 222*6b8177c5SMatthias Ringwald 223*6b8177c5SMatthias Ringwald /* USER CODE END DMA1_Channel2_IRQn 0 */ 224*6b8177c5SMatthias Ringwald HAL_DMA_IRQHandler(&hdma_spi1_rx); 225*6b8177c5SMatthias Ringwald /* USER CODE BEGIN DMA1_Channel2_IRQn 1 */ 226*6b8177c5SMatthias Ringwald 227*6b8177c5SMatthias Ringwald /* USER CODE END DMA1_Channel2_IRQn 1 */ 228*6b8177c5SMatthias Ringwald } 229*6b8177c5SMatthias Ringwald 230*6b8177c5SMatthias Ringwald /** 231*6b8177c5SMatthias Ringwald * @brief This function handles DMA1 channel3 global interrupt. 232*6b8177c5SMatthias Ringwald */ DMA1_Channel3_IRQHandler(void)233*6b8177c5SMatthias Ringwaldvoid DMA1_Channel3_IRQHandler(void) 234*6b8177c5SMatthias Ringwald { 235*6b8177c5SMatthias Ringwald /* USER CODE BEGIN DMA1_Channel3_IRQn 0 */ 236*6b8177c5SMatthias Ringwald 237*6b8177c5SMatthias Ringwald /* USER CODE END DMA1_Channel3_IRQn 0 */ 238*6b8177c5SMatthias Ringwald HAL_DMA_IRQHandler(&hdma_spi1_tx); 239*6b8177c5SMatthias Ringwald /* USER CODE BEGIN DMA1_Channel3_IRQn 1 */ 240*6b8177c5SMatthias Ringwald 241*6b8177c5SMatthias Ringwald /* USER CODE END DMA1_Channel3_IRQn 1 */ 242*6b8177c5SMatthias Ringwald } 243*6b8177c5SMatthias Ringwald 244*6b8177c5SMatthias Ringwald /** 245*6b8177c5SMatthias Ringwald * @brief This function handles LPTIM1 global interrupt. 246*6b8177c5SMatthias Ringwald */ LPTIM1_IRQHandler(void)247*6b8177c5SMatthias Ringwaldvoid LPTIM1_IRQHandler(void) 248*6b8177c5SMatthias Ringwald { 249*6b8177c5SMatthias Ringwald /* USER CODE BEGIN LPTIM1_IRQn 0 */ 250*6b8177c5SMatthias Ringwald 251*6b8177c5SMatthias Ringwald /* USER CODE END LPTIM1_IRQn 0 */ 252*6b8177c5SMatthias Ringwald HAL_LPTIM_IRQHandler(&hlptim1); 253*6b8177c5SMatthias Ringwald /* USER CODE BEGIN LPTIM1_IRQn 1 */ 254*6b8177c5SMatthias Ringwald 255*6b8177c5SMatthias Ringwald /* USER CODE END LPTIM1_IRQn 1 */ 256*6b8177c5SMatthias Ringwald } 257*6b8177c5SMatthias Ringwald 258*6b8177c5SMatthias Ringwald /* USER CODE BEGIN 1 */ 259*6b8177c5SMatthias Ringwald 260*6b8177c5SMatthias Ringwald /* USER CODE END 1 */ 261*6b8177c5SMatthias Ringwald /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 262