xref: /btstack/port/stm32-l451-miromico-sx1280/Src/stm32l4xx_hal_msp.c (revision 2fd737d36a1de5d778cacc671d4b4d8c4f3fed82)
1*2fd737d3SMatthias Ringwald /* USER CODE BEGIN Header */
2*2fd737d3SMatthias Ringwald /**
3*2fd737d3SMatthias Ringwald   ******************************************************************************
4*2fd737d3SMatthias Ringwald   * File Name          : stm32l4xx_hal_msp.c
5*2fd737d3SMatthias Ringwald   * Description        : This file provides code for the MSP Initialization
6*2fd737d3SMatthias Ringwald   *                      and de-Initialization codes.
7*2fd737d3SMatthias Ringwald   ******************************************************************************
8*2fd737d3SMatthias Ringwald   * @attention
9*2fd737d3SMatthias Ringwald   *
10*2fd737d3SMatthias Ringwald   * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
11*2fd737d3SMatthias Ringwald   * All rights reserved.</center></h2>
12*2fd737d3SMatthias Ringwald   *
13*2fd737d3SMatthias Ringwald   * This software component is licensed by ST under BSD 3-Clause license,
14*2fd737d3SMatthias Ringwald   * the "License"; You may not use this file except in compliance with the
15*2fd737d3SMatthias Ringwald   * License. You may obtain a copy of the License at:
16*2fd737d3SMatthias Ringwald   *                        opensource.org/licenses/BSD-3-Clause
17*2fd737d3SMatthias Ringwald   *
18*2fd737d3SMatthias Ringwald   ******************************************************************************
19*2fd737d3SMatthias Ringwald   */
20*2fd737d3SMatthias Ringwald /* USER CODE END Header */
21*2fd737d3SMatthias Ringwald 
22*2fd737d3SMatthias Ringwald /* Includes ------------------------------------------------------------------*/
23*2fd737d3SMatthias Ringwald #include "main.h"
24*2fd737d3SMatthias Ringwald /* USER CODE BEGIN Includes */
25*2fd737d3SMatthias Ringwald 
26*2fd737d3SMatthias Ringwald /* USER CODE END Includes */
27*2fd737d3SMatthias Ringwald extern DMA_HandleTypeDef hdma_spi2_rx;
28*2fd737d3SMatthias Ringwald 
29*2fd737d3SMatthias Ringwald extern DMA_HandleTypeDef hdma_spi2_tx;
30*2fd737d3SMatthias Ringwald 
31*2fd737d3SMatthias Ringwald /* Private typedef -----------------------------------------------------------*/
32*2fd737d3SMatthias Ringwald /* USER CODE BEGIN TD */
33*2fd737d3SMatthias Ringwald 
34*2fd737d3SMatthias Ringwald /* USER CODE END TD */
35*2fd737d3SMatthias Ringwald 
36*2fd737d3SMatthias Ringwald /* Private define ------------------------------------------------------------*/
37*2fd737d3SMatthias Ringwald /* USER CODE BEGIN Define */
38*2fd737d3SMatthias Ringwald 
39*2fd737d3SMatthias Ringwald /* USER CODE END Define */
40*2fd737d3SMatthias Ringwald 
41*2fd737d3SMatthias Ringwald /* Private macro -------------------------------------------------------------*/
42*2fd737d3SMatthias Ringwald /* USER CODE BEGIN Macro */
43*2fd737d3SMatthias Ringwald 
44*2fd737d3SMatthias Ringwald /* USER CODE END Macro */
45*2fd737d3SMatthias Ringwald 
46*2fd737d3SMatthias Ringwald /* Private variables ---------------------------------------------------------*/
47*2fd737d3SMatthias Ringwald /* USER CODE BEGIN PV */
48*2fd737d3SMatthias Ringwald 
49*2fd737d3SMatthias Ringwald /* USER CODE END PV */
50*2fd737d3SMatthias Ringwald 
51*2fd737d3SMatthias Ringwald /* Private function prototypes -----------------------------------------------*/
52*2fd737d3SMatthias Ringwald /* USER CODE BEGIN PFP */
53*2fd737d3SMatthias Ringwald 
54*2fd737d3SMatthias Ringwald /* USER CODE END PFP */
55*2fd737d3SMatthias Ringwald 
56*2fd737d3SMatthias Ringwald /* External functions --------------------------------------------------------*/
57*2fd737d3SMatthias Ringwald /* USER CODE BEGIN ExternalFunctions */
58*2fd737d3SMatthias Ringwald 
59*2fd737d3SMatthias Ringwald /* USER CODE END ExternalFunctions */
60*2fd737d3SMatthias Ringwald 
61*2fd737d3SMatthias Ringwald /* USER CODE BEGIN 0 */
62*2fd737d3SMatthias Ringwald 
63*2fd737d3SMatthias Ringwald /* USER CODE END 0 */
64*2fd737d3SMatthias Ringwald /**
65*2fd737d3SMatthias Ringwald   * Initializes the Global MSP.
66*2fd737d3SMatthias Ringwald   */
HAL_MspInit(void)67*2fd737d3SMatthias Ringwald void HAL_MspInit(void)
68*2fd737d3SMatthias Ringwald {
69*2fd737d3SMatthias Ringwald   /* USER CODE BEGIN MspInit 0 */
70*2fd737d3SMatthias Ringwald 
71*2fd737d3SMatthias Ringwald   /* USER CODE END MspInit 0 */
72*2fd737d3SMatthias Ringwald 
73*2fd737d3SMatthias Ringwald   __HAL_RCC_SYSCFG_CLK_ENABLE();
74*2fd737d3SMatthias Ringwald   __HAL_RCC_PWR_CLK_ENABLE();
75*2fd737d3SMatthias Ringwald 
76*2fd737d3SMatthias Ringwald   /* System interrupt init*/
77*2fd737d3SMatthias Ringwald 
78*2fd737d3SMatthias Ringwald   /* USER CODE BEGIN MspInit 1 */
79*2fd737d3SMatthias Ringwald 
80*2fd737d3SMatthias Ringwald   /* USER CODE END MspInit 1 */
81*2fd737d3SMatthias Ringwald }
82*2fd737d3SMatthias Ringwald 
83*2fd737d3SMatthias Ringwald /**
84*2fd737d3SMatthias Ringwald * @brief LPTIM MSP Initialization
85*2fd737d3SMatthias Ringwald * This function configures the hardware resources used in this example
86*2fd737d3SMatthias Ringwald * @param hlptim: LPTIM handle pointer
87*2fd737d3SMatthias Ringwald * @retval None
88*2fd737d3SMatthias Ringwald */
HAL_LPTIM_MspInit(LPTIM_HandleTypeDef * hlptim)89*2fd737d3SMatthias Ringwald void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef* hlptim)
90*2fd737d3SMatthias Ringwald {
91*2fd737d3SMatthias Ringwald   if(hlptim->Instance==LPTIM1)
92*2fd737d3SMatthias Ringwald   {
93*2fd737d3SMatthias Ringwald   /* USER CODE BEGIN LPTIM1_MspInit 0 */
94*2fd737d3SMatthias Ringwald 
95*2fd737d3SMatthias Ringwald   /* USER CODE END LPTIM1_MspInit 0 */
96*2fd737d3SMatthias Ringwald     /* Peripheral clock enable */
97*2fd737d3SMatthias Ringwald     __HAL_RCC_LPTIM1_CLK_ENABLE();
98*2fd737d3SMatthias Ringwald     /* LPTIM1 interrupt Init */
99*2fd737d3SMatthias Ringwald     HAL_NVIC_SetPriority(LPTIM1_IRQn, 0, 0);
100*2fd737d3SMatthias Ringwald     HAL_NVIC_EnableIRQ(LPTIM1_IRQn);
101*2fd737d3SMatthias Ringwald   /* USER CODE BEGIN LPTIM1_MspInit 1 */
102*2fd737d3SMatthias Ringwald 
103*2fd737d3SMatthias Ringwald   /* USER CODE END LPTIM1_MspInit 1 */
104*2fd737d3SMatthias Ringwald   }
105*2fd737d3SMatthias Ringwald 
106*2fd737d3SMatthias Ringwald }
107*2fd737d3SMatthias Ringwald 
108*2fd737d3SMatthias Ringwald /**
109*2fd737d3SMatthias Ringwald * @brief LPTIM MSP De-Initialization
110*2fd737d3SMatthias Ringwald * This function freeze the hardware resources used in this example
111*2fd737d3SMatthias Ringwald * @param hlptim: LPTIM handle pointer
112*2fd737d3SMatthias Ringwald * @retval None
113*2fd737d3SMatthias Ringwald */
HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef * hlptim)114*2fd737d3SMatthias Ringwald void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef* hlptim)
115*2fd737d3SMatthias Ringwald {
116*2fd737d3SMatthias Ringwald   if(hlptim->Instance==LPTIM1)
117*2fd737d3SMatthias Ringwald   {
118*2fd737d3SMatthias Ringwald   /* USER CODE BEGIN LPTIM1_MspDeInit 0 */
119*2fd737d3SMatthias Ringwald 
120*2fd737d3SMatthias Ringwald   /* USER CODE END LPTIM1_MspDeInit 0 */
121*2fd737d3SMatthias Ringwald     /* Peripheral clock disable */
122*2fd737d3SMatthias Ringwald     __HAL_RCC_LPTIM1_CLK_DISABLE();
123*2fd737d3SMatthias Ringwald 
124*2fd737d3SMatthias Ringwald     /* LPTIM1 interrupt DeInit */
125*2fd737d3SMatthias Ringwald     HAL_NVIC_DisableIRQ(LPTIM1_IRQn);
126*2fd737d3SMatthias Ringwald   /* USER CODE BEGIN LPTIM1_MspDeInit 1 */
127*2fd737d3SMatthias Ringwald 
128*2fd737d3SMatthias Ringwald   /* USER CODE END LPTIM1_MspDeInit 1 */
129*2fd737d3SMatthias Ringwald   }
130*2fd737d3SMatthias Ringwald 
131*2fd737d3SMatthias Ringwald }
132*2fd737d3SMatthias Ringwald 
133*2fd737d3SMatthias Ringwald /**
134*2fd737d3SMatthias Ringwald * @brief SPI MSP Initialization
135*2fd737d3SMatthias Ringwald * This function configures the hardware resources used in this example
136*2fd737d3SMatthias Ringwald * @param hspi: SPI handle pointer
137*2fd737d3SMatthias Ringwald * @retval None
138*2fd737d3SMatthias Ringwald */
HAL_SPI_MspInit(SPI_HandleTypeDef * hspi)139*2fd737d3SMatthias Ringwald void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
140*2fd737d3SMatthias Ringwald {
141*2fd737d3SMatthias Ringwald   GPIO_InitTypeDef GPIO_InitStruct = {0};
142*2fd737d3SMatthias Ringwald   if(hspi->Instance==SPI2)
143*2fd737d3SMatthias Ringwald   {
144*2fd737d3SMatthias Ringwald   /* USER CODE BEGIN SPI2_MspInit 0 */
145*2fd737d3SMatthias Ringwald 
146*2fd737d3SMatthias Ringwald   /* USER CODE END SPI2_MspInit 0 */
147*2fd737d3SMatthias Ringwald     /* Peripheral clock enable */
148*2fd737d3SMatthias Ringwald     __HAL_RCC_SPI2_CLK_ENABLE();
149*2fd737d3SMatthias Ringwald 
150*2fd737d3SMatthias Ringwald     __HAL_RCC_GPIOB_CLK_ENABLE();
151*2fd737d3SMatthias Ringwald     /**SPI2 GPIO Configuration
152*2fd737d3SMatthias Ringwald     PB15     ------> SPI2_MOSI
153*2fd737d3SMatthias Ringwald     PB14     ------> SPI2_MISO
154*2fd737d3SMatthias Ringwald     PB10     ------> SPI2_SCK
155*2fd737d3SMatthias Ringwald     */
156*2fd737d3SMatthias Ringwald     GPIO_InitStruct.Pin = RF_MOSI_Pin|RF_MISO_Pin|RF_SCK_Pin;
157*2fd737d3SMatthias Ringwald     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
158*2fd737d3SMatthias Ringwald     GPIO_InitStruct.Pull = GPIO_NOPULL;
159*2fd737d3SMatthias Ringwald     GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
160*2fd737d3SMatthias Ringwald     GPIO_InitStruct.Alternate = GPIO_AF5_SPI2;
161*2fd737d3SMatthias Ringwald     HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
162*2fd737d3SMatthias Ringwald 
163*2fd737d3SMatthias Ringwald     /* SPI2 DMA Init */
164*2fd737d3SMatthias Ringwald     /* SPI2_RX Init */
165*2fd737d3SMatthias Ringwald     hdma_spi2_rx.Instance = DMA1_Channel4;
166*2fd737d3SMatthias Ringwald     hdma_spi2_rx.Init.Request = DMA_REQUEST_1;
167*2fd737d3SMatthias Ringwald     hdma_spi2_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
168*2fd737d3SMatthias Ringwald     hdma_spi2_rx.Init.PeriphInc = DMA_PINC_DISABLE;
169*2fd737d3SMatthias Ringwald     hdma_spi2_rx.Init.MemInc = DMA_MINC_ENABLE;
170*2fd737d3SMatthias Ringwald     hdma_spi2_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
171*2fd737d3SMatthias Ringwald     hdma_spi2_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
172*2fd737d3SMatthias Ringwald     hdma_spi2_rx.Init.Mode = DMA_NORMAL;
173*2fd737d3SMatthias Ringwald     hdma_spi2_rx.Init.Priority = DMA_PRIORITY_LOW;
174*2fd737d3SMatthias Ringwald     if (HAL_DMA_Init(&hdma_spi2_rx) != HAL_OK)
175*2fd737d3SMatthias Ringwald     {
176*2fd737d3SMatthias Ringwald       Error_Handler();
177*2fd737d3SMatthias Ringwald     }
178*2fd737d3SMatthias Ringwald 
179*2fd737d3SMatthias Ringwald     __HAL_LINKDMA(hspi,hdmarx,hdma_spi2_rx);
180*2fd737d3SMatthias Ringwald 
181*2fd737d3SMatthias Ringwald     /* SPI2_TX Init */
182*2fd737d3SMatthias Ringwald     hdma_spi2_tx.Instance = DMA1_Channel5;
183*2fd737d3SMatthias Ringwald     hdma_spi2_tx.Init.Request = DMA_REQUEST_1;
184*2fd737d3SMatthias Ringwald     hdma_spi2_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
185*2fd737d3SMatthias Ringwald     hdma_spi2_tx.Init.PeriphInc = DMA_PINC_DISABLE;
186*2fd737d3SMatthias Ringwald     hdma_spi2_tx.Init.MemInc = DMA_MINC_ENABLE;
187*2fd737d3SMatthias Ringwald     hdma_spi2_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
188*2fd737d3SMatthias Ringwald     hdma_spi2_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
189*2fd737d3SMatthias Ringwald     hdma_spi2_tx.Init.Mode = DMA_NORMAL;
190*2fd737d3SMatthias Ringwald     hdma_spi2_tx.Init.Priority = DMA_PRIORITY_LOW;
191*2fd737d3SMatthias Ringwald     if (HAL_DMA_Init(&hdma_spi2_tx) != HAL_OK)
192*2fd737d3SMatthias Ringwald     {
193*2fd737d3SMatthias Ringwald       Error_Handler();
194*2fd737d3SMatthias Ringwald     }
195*2fd737d3SMatthias Ringwald 
196*2fd737d3SMatthias Ringwald     __HAL_LINKDMA(hspi,hdmatx,hdma_spi2_tx);
197*2fd737d3SMatthias Ringwald 
198*2fd737d3SMatthias Ringwald     /* SPI2 interrupt Init */
199*2fd737d3SMatthias Ringwald     HAL_NVIC_SetPriority(SPI2_IRQn, 0, 0);
200*2fd737d3SMatthias Ringwald     HAL_NVIC_EnableIRQ(SPI2_IRQn);
201*2fd737d3SMatthias Ringwald   /* USER CODE BEGIN SPI2_MspInit 1 */
202*2fd737d3SMatthias Ringwald 
203*2fd737d3SMatthias Ringwald   /* USER CODE END SPI2_MspInit 1 */
204*2fd737d3SMatthias Ringwald   }
205*2fd737d3SMatthias Ringwald 
206*2fd737d3SMatthias Ringwald }
207*2fd737d3SMatthias Ringwald 
208*2fd737d3SMatthias Ringwald /**
209*2fd737d3SMatthias Ringwald * @brief SPI MSP De-Initialization
210*2fd737d3SMatthias Ringwald * This function freeze the hardware resources used in this example
211*2fd737d3SMatthias Ringwald * @param hspi: SPI handle pointer
212*2fd737d3SMatthias Ringwald * @retval None
213*2fd737d3SMatthias Ringwald */
HAL_SPI_MspDeInit(SPI_HandleTypeDef * hspi)214*2fd737d3SMatthias Ringwald void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi)
215*2fd737d3SMatthias Ringwald {
216*2fd737d3SMatthias Ringwald   if(hspi->Instance==SPI2)
217*2fd737d3SMatthias Ringwald   {
218*2fd737d3SMatthias Ringwald   /* USER CODE BEGIN SPI2_MspDeInit 0 */
219*2fd737d3SMatthias Ringwald 
220*2fd737d3SMatthias Ringwald   /* USER CODE END SPI2_MspDeInit 0 */
221*2fd737d3SMatthias Ringwald     /* Peripheral clock disable */
222*2fd737d3SMatthias Ringwald     __HAL_RCC_SPI2_CLK_DISABLE();
223*2fd737d3SMatthias Ringwald 
224*2fd737d3SMatthias Ringwald     /**SPI2 GPIO Configuration
225*2fd737d3SMatthias Ringwald     PB15     ------> SPI2_MOSI
226*2fd737d3SMatthias Ringwald     PB14     ------> SPI2_MISO
227*2fd737d3SMatthias Ringwald     PB10     ------> SPI2_SCK
228*2fd737d3SMatthias Ringwald     */
229*2fd737d3SMatthias Ringwald     HAL_GPIO_DeInit(GPIOB, RF_MOSI_Pin|RF_MISO_Pin|RF_SCK_Pin);
230*2fd737d3SMatthias Ringwald 
231*2fd737d3SMatthias Ringwald     /* SPI2 DMA DeInit */
232*2fd737d3SMatthias Ringwald     HAL_DMA_DeInit(hspi->hdmarx);
233*2fd737d3SMatthias Ringwald     HAL_DMA_DeInit(hspi->hdmatx);
234*2fd737d3SMatthias Ringwald 
235*2fd737d3SMatthias Ringwald     /* SPI2 interrupt DeInit */
236*2fd737d3SMatthias Ringwald     HAL_NVIC_DisableIRQ(SPI2_IRQn);
237*2fd737d3SMatthias Ringwald   /* USER CODE BEGIN SPI2_MspDeInit 1 */
238*2fd737d3SMatthias Ringwald 
239*2fd737d3SMatthias Ringwald   /* USER CODE END SPI2_MspDeInit 1 */
240*2fd737d3SMatthias Ringwald   }
241*2fd737d3SMatthias Ringwald 
242*2fd737d3SMatthias Ringwald }
243*2fd737d3SMatthias Ringwald 
244*2fd737d3SMatthias Ringwald /**
245*2fd737d3SMatthias Ringwald * @brief TIM_Base MSP Initialization
246*2fd737d3SMatthias Ringwald * This function configures the hardware resources used in this example
247*2fd737d3SMatthias Ringwald * @param htim_base: TIM_Base handle pointer
248*2fd737d3SMatthias Ringwald * @retval None
249*2fd737d3SMatthias Ringwald */
HAL_TIM_Base_MspInit(TIM_HandleTypeDef * htim_base)250*2fd737d3SMatthias Ringwald void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
251*2fd737d3SMatthias Ringwald {
252*2fd737d3SMatthias Ringwald   if(htim_base->Instance==TIM2)
253*2fd737d3SMatthias Ringwald   {
254*2fd737d3SMatthias Ringwald   /* USER CODE BEGIN TIM2_MspInit 0 */
255*2fd737d3SMatthias Ringwald 
256*2fd737d3SMatthias Ringwald   /* USER CODE END TIM2_MspInit 0 */
257*2fd737d3SMatthias Ringwald     /* Peripheral clock enable */
258*2fd737d3SMatthias Ringwald     __HAL_RCC_TIM2_CLK_ENABLE();
259*2fd737d3SMatthias Ringwald     /* TIM2 interrupt Init */
260*2fd737d3SMatthias Ringwald     HAL_NVIC_SetPriority(TIM2_IRQn, 0, 0);
261*2fd737d3SMatthias Ringwald     HAL_NVIC_EnableIRQ(TIM2_IRQn);
262*2fd737d3SMatthias Ringwald   /* USER CODE BEGIN TIM2_MspInit 1 */
263*2fd737d3SMatthias Ringwald 
264*2fd737d3SMatthias Ringwald   /* USER CODE END TIM2_MspInit 1 */
265*2fd737d3SMatthias Ringwald   }
266*2fd737d3SMatthias Ringwald 
267*2fd737d3SMatthias Ringwald }
268*2fd737d3SMatthias Ringwald 
269*2fd737d3SMatthias Ringwald /**
270*2fd737d3SMatthias Ringwald * @brief TIM_Base MSP De-Initialization
271*2fd737d3SMatthias Ringwald * This function freeze the hardware resources used in this example
272*2fd737d3SMatthias Ringwald * @param htim_base: TIM_Base handle pointer
273*2fd737d3SMatthias Ringwald * @retval None
274*2fd737d3SMatthias Ringwald */
HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef * htim_base)275*2fd737d3SMatthias Ringwald void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
276*2fd737d3SMatthias Ringwald {
277*2fd737d3SMatthias Ringwald   if(htim_base->Instance==TIM2)
278*2fd737d3SMatthias Ringwald   {
279*2fd737d3SMatthias Ringwald   /* USER CODE BEGIN TIM2_MspDeInit 0 */
280*2fd737d3SMatthias Ringwald 
281*2fd737d3SMatthias Ringwald   /* USER CODE END TIM2_MspDeInit 0 */
282*2fd737d3SMatthias Ringwald     /* Peripheral clock disable */
283*2fd737d3SMatthias Ringwald     __HAL_RCC_TIM2_CLK_DISABLE();
284*2fd737d3SMatthias Ringwald 
285*2fd737d3SMatthias Ringwald     /* TIM2 interrupt DeInit */
286*2fd737d3SMatthias Ringwald     HAL_NVIC_DisableIRQ(TIM2_IRQn);
287*2fd737d3SMatthias Ringwald   /* USER CODE BEGIN TIM2_MspDeInit 1 */
288*2fd737d3SMatthias Ringwald 
289*2fd737d3SMatthias Ringwald   /* USER CODE END TIM2_MspDeInit 1 */
290*2fd737d3SMatthias Ringwald   }
291*2fd737d3SMatthias Ringwald 
292*2fd737d3SMatthias Ringwald }
293*2fd737d3SMatthias Ringwald 
294*2fd737d3SMatthias Ringwald /* USER CODE BEGIN 1 */
295*2fd737d3SMatthias Ringwald 
296*2fd737d3SMatthias Ringwald /* USER CODE END 1 */
297*2fd737d3SMatthias Ringwald 
298*2fd737d3SMatthias Ringwald /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
299