xref: /btstack/port/stm32-l451-miromico-sx1280/Src/main.c (revision 2fd737d36a1de5d778cacc671d4b4d8c4f3fed82)
1*2fd737d3SMatthias Ringwald /* USER CODE BEGIN Header */
2*2fd737d3SMatthias Ringwald /**
3*2fd737d3SMatthias Ringwald   ******************************************************************************
4*2fd737d3SMatthias Ringwald   * @file           : main.c
5*2fd737d3SMatthias Ringwald   * @brief          : Main program body
6*2fd737d3SMatthias Ringwald   ******************************************************************************
7*2fd737d3SMatthias Ringwald   * @attention
8*2fd737d3SMatthias Ringwald   *
9*2fd737d3SMatthias Ringwald   * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
10*2fd737d3SMatthias Ringwald   * All rights reserved.</center></h2>
11*2fd737d3SMatthias Ringwald   *
12*2fd737d3SMatthias Ringwald   * This software component is licensed by ST under BSD 3-Clause license,
13*2fd737d3SMatthias Ringwald   * the "License"; You may not use this file except in compliance with the
14*2fd737d3SMatthias Ringwald   * License. You may obtain a copy of the License at:
15*2fd737d3SMatthias Ringwald   *                        opensource.org/licenses/BSD-3-Clause
16*2fd737d3SMatthias Ringwald   *
17*2fd737d3SMatthias Ringwald   ******************************************************************************
18*2fd737d3SMatthias Ringwald   */
19*2fd737d3SMatthias Ringwald /* USER CODE END Header */
20*2fd737d3SMatthias Ringwald 
21*2fd737d3SMatthias Ringwald /* Includes ------------------------------------------------------------------*/
22*2fd737d3SMatthias Ringwald #include "main.h"
23*2fd737d3SMatthias Ringwald 
24*2fd737d3SMatthias Ringwald /* Private includes ----------------------------------------------------------*/
25*2fd737d3SMatthias Ringwald /* USER CODE BEGIN Includes */
26*2fd737d3SMatthias Ringwald #include "SEGGER_RTT.h"
27*2fd737d3SMatthias Ringwald #include <stdio.h>
28*2fd737d3SMatthias Ringwald #include "sx1280-hal.h"
29*2fd737d3SMatthias Ringwald 
30*2fd737d3SMatthias Ringwald /* USER CODE END Includes */
31*2fd737d3SMatthias Ringwald 
32*2fd737d3SMatthias Ringwald /* Private typedef -----------------------------------------------------------*/
33*2fd737d3SMatthias Ringwald /* USER CODE BEGIN PTD */
34*2fd737d3SMatthias Ringwald 
35*2fd737d3SMatthias Ringwald /* USER CODE END PTD */
36*2fd737d3SMatthias Ringwald 
37*2fd737d3SMatthias Ringwald /* Private define ------------------------------------------------------------*/
38*2fd737d3SMatthias Ringwald /* USER CODE BEGIN PD */
39*2fd737d3SMatthias Ringwald /* USER CODE END PD */
40*2fd737d3SMatthias Ringwald 
41*2fd737d3SMatthias Ringwald /* Private macro -------------------------------------------------------------*/
42*2fd737d3SMatthias Ringwald /* USER CODE BEGIN PM */
43*2fd737d3SMatthias Ringwald #define printf(format, ...) SEGGER_RTT_printf(0, format,  ## __VA_ARGS__)
44*2fd737d3SMatthias Ringwald 
45*2fd737d3SMatthias Ringwald /* USER CODE END PM */
46*2fd737d3SMatthias Ringwald 
47*2fd737d3SMatthias Ringwald /* Private variables ---------------------------------------------------------*/
48*2fd737d3SMatthias Ringwald LPTIM_HandleTypeDef hlptim1;
49*2fd737d3SMatthias Ringwald 
50*2fd737d3SMatthias Ringwald SPI_HandleTypeDef hspi2;
51*2fd737d3SMatthias Ringwald DMA_HandleTypeDef hdma_spi2_rx;
52*2fd737d3SMatthias Ringwald DMA_HandleTypeDef hdma_spi2_tx;
53*2fd737d3SMatthias Ringwald 
54*2fd737d3SMatthias Ringwald TIM_HandleTypeDef htim2;
55*2fd737d3SMatthias Ringwald 
56*2fd737d3SMatthias Ringwald /* USER CODE BEGIN PV */
57*2fd737d3SMatthias Ringwald 
58*2fd737d3SMatthias Ringwald /* USER CODE END PV */
59*2fd737d3SMatthias Ringwald 
60*2fd737d3SMatthias Ringwald /* Private function prototypes -----------------------------------------------*/
61*2fd737d3SMatthias Ringwald void SystemClock_Config(void);
62*2fd737d3SMatthias Ringwald static void MX_GPIO_Init(void);
63*2fd737d3SMatthias Ringwald static void MX_DMA_Init(void);
64*2fd737d3SMatthias Ringwald static void MX_SPI2_Init(void);
65*2fd737d3SMatthias Ringwald static void MX_TIM2_Init(void);
66*2fd737d3SMatthias Ringwald static void MX_LPTIM1_Init(void);
67*2fd737d3SMatthias Ringwald /* USER CODE BEGIN PFP */
68*2fd737d3SMatthias Ringwald void btstack_port(void);
69*2fd737d3SMatthias Ringwald 
70*2fd737d3SMatthias Ringwald /* USER CODE END PFP */
71*2fd737d3SMatthias Ringwald 
72*2fd737d3SMatthias Ringwald /* Private user code ---------------------------------------------------------*/
73*2fd737d3SMatthias Ringwald /* USER CODE BEGIN 0 */
74*2fd737d3SMatthias Ringwald 
75*2fd737d3SMatthias Ringwald /* USER CODE END 0 */
76*2fd737d3SMatthias Ringwald 
77*2fd737d3SMatthias Ringwald /**
78*2fd737d3SMatthias Ringwald   * @brief  The application entry point.
79*2fd737d3SMatthias Ringwald   * @retval int
80*2fd737d3SMatthias Ringwald   */
main(void)81*2fd737d3SMatthias Ringwald int main(void)
82*2fd737d3SMatthias Ringwald {
83*2fd737d3SMatthias Ringwald   /* USER CODE BEGIN 1 */
84*2fd737d3SMatthias Ringwald 
85*2fd737d3SMatthias Ringwald   /* USER CODE END 1 */
86*2fd737d3SMatthias Ringwald 
87*2fd737d3SMatthias Ringwald   /* MCU Configuration--------------------------------------------------------*/
88*2fd737d3SMatthias Ringwald 
89*2fd737d3SMatthias Ringwald   /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
90*2fd737d3SMatthias Ringwald   HAL_Init();
91*2fd737d3SMatthias Ringwald 
92*2fd737d3SMatthias Ringwald   /* USER CODE BEGIN Init */
93*2fd737d3SMatthias Ringwald 
94*2fd737d3SMatthias Ringwald   /* USER CODE END Init */
95*2fd737d3SMatthias Ringwald 
96*2fd737d3SMatthias Ringwald   /* Configure the system clock */
97*2fd737d3SMatthias Ringwald   SystemClock_Config();
98*2fd737d3SMatthias Ringwald 
99*2fd737d3SMatthias Ringwald   /* USER CODE BEGIN SysInit */
100*2fd737d3SMatthias Ringwald 
101*2fd737d3SMatthias Ringwald   /* USER CODE END SysInit */
102*2fd737d3SMatthias Ringwald 
103*2fd737d3SMatthias Ringwald   /* Initialize all configured peripherals */
104*2fd737d3SMatthias Ringwald   MX_GPIO_Init();
105*2fd737d3SMatthias Ringwald   MX_DMA_Init();
106*2fd737d3SMatthias Ringwald   MX_SPI2_Init();
107*2fd737d3SMatthias Ringwald   MX_TIM2_Init();
108*2fd737d3SMatthias Ringwald   MX_LPTIM1_Init();
109*2fd737d3SMatthias Ringwald   /* USER CODE BEGIN 2 */
110*2fd737d3SMatthias Ringwald 
111*2fd737d3SMatthias Ringwald   HAL_TIM_Base_Start(&htim2);
112*2fd737d3SMatthias Ringwald   // HAL_LPTIM_Counter_Start_IT same as HAL_LPTIM_Counter_Start but also enables IRQs
113*2fd737d3SMatthias Ringwald   HAL_LPTIM_Counter_Start_IT(&hlptim1, 0xffff);
114*2fd737d3SMatthias Ringwald 
115*2fd737d3SMatthias Ringwald   // Enable SX1280 Clock
116*2fd737d3SMatthias Ringwald   HAL_GPIO_WritePin(RF_TXCO_GPIO_Port, RF_TXCO_Pin, GPIO_PIN_SET);
117*2fd737d3SMatthias Ringwald 
118*2fd737d3SMatthias Ringwald   btstack_port();
119*2fd737d3SMatthias Ringwald 
120*2fd737d3SMatthias Ringwald   /* USER CODE END 2 */
121*2fd737d3SMatthias Ringwald 
122*2fd737d3SMatthias Ringwald   /* Infinite loop */
123*2fd737d3SMatthias Ringwald   /* USER CODE BEGIN WHILE */
124*2fd737d3SMatthias Ringwald   while (1)
125*2fd737d3SMatthias Ringwald   {
126*2fd737d3SMatthias Ringwald     // printf("[%06u] BUSY %u\n", hal_time_ms(), HAL_GPIO_ReadPin(RF_BUSY_GPIO_Port, RF_BUSY_Pin));
127*2fd737d3SMatthias Ringwald     /* USER CODE END WHILE */
128*2fd737d3SMatthias Ringwald 
129*2fd737d3SMatthias Ringwald     /* USER CODE BEGIN 3 */
130*2fd737d3SMatthias Ringwald   }
131*2fd737d3SMatthias Ringwald   /* USER CODE END 3 */
132*2fd737d3SMatthias Ringwald }
133*2fd737d3SMatthias Ringwald 
134*2fd737d3SMatthias Ringwald /**
135*2fd737d3SMatthias Ringwald   * @brief System Clock Configuration
136*2fd737d3SMatthias Ringwald   * @retval None
137*2fd737d3SMatthias Ringwald   */
SystemClock_Config(void)138*2fd737d3SMatthias Ringwald void SystemClock_Config(void)
139*2fd737d3SMatthias Ringwald {
140*2fd737d3SMatthias Ringwald   RCC_OscInitTypeDef RCC_OscInitStruct = {0};
141*2fd737d3SMatthias Ringwald   RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
142*2fd737d3SMatthias Ringwald   RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
143*2fd737d3SMatthias Ringwald 
144*2fd737d3SMatthias Ringwald   /** Configure LSE Drive Capability
145*2fd737d3SMatthias Ringwald   */
146*2fd737d3SMatthias Ringwald   HAL_PWR_EnableBkUpAccess();
147*2fd737d3SMatthias Ringwald   __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
148*2fd737d3SMatthias Ringwald   /** Initializes the CPU, AHB and APB busses clocks
149*2fd737d3SMatthias Ringwald   */
150*2fd737d3SMatthias Ringwald   RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE|RCC_OSCILLATORTYPE_MSI;
151*2fd737d3SMatthias Ringwald   RCC_OscInitStruct.LSEState = RCC_LSE_ON;
152*2fd737d3SMatthias Ringwald   RCC_OscInitStruct.MSIState = RCC_MSI_ON;
153*2fd737d3SMatthias Ringwald   RCC_OscInitStruct.MSICalibrationValue = 0;
154*2fd737d3SMatthias Ringwald   RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6;
155*2fd737d3SMatthias Ringwald   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
156*2fd737d3SMatthias Ringwald   RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI;
157*2fd737d3SMatthias Ringwald   RCC_OscInitStruct.PLL.PLLM = 1;
158*2fd737d3SMatthias Ringwald   RCC_OscInitStruct.PLL.PLLN = 36;
159*2fd737d3SMatthias Ringwald   RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7;
160*2fd737d3SMatthias Ringwald   RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
161*2fd737d3SMatthias Ringwald   RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
162*2fd737d3SMatthias Ringwald   if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
163*2fd737d3SMatthias Ringwald   {
164*2fd737d3SMatthias Ringwald     Error_Handler();
165*2fd737d3SMatthias Ringwald   }
166*2fd737d3SMatthias Ringwald   /** Initializes the CPU, AHB and APB busses clocks
167*2fd737d3SMatthias Ringwald   */
168*2fd737d3SMatthias Ringwald   RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
169*2fd737d3SMatthias Ringwald                               |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
170*2fd737d3SMatthias Ringwald   RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
171*2fd737d3SMatthias Ringwald   RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
172*2fd737d3SMatthias Ringwald   RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
173*2fd737d3SMatthias Ringwald   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
174*2fd737d3SMatthias Ringwald 
175*2fd737d3SMatthias Ringwald   if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
176*2fd737d3SMatthias Ringwald   {
177*2fd737d3SMatthias Ringwald     Error_Handler();
178*2fd737d3SMatthias Ringwald   }
179*2fd737d3SMatthias Ringwald   PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_LPTIM1;
180*2fd737d3SMatthias Ringwald   PeriphClkInit.Lptim1ClockSelection = RCC_LPTIM1CLKSOURCE_LSE;
181*2fd737d3SMatthias Ringwald   if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
182*2fd737d3SMatthias Ringwald   {
183*2fd737d3SMatthias Ringwald     Error_Handler();
184*2fd737d3SMatthias Ringwald   }
185*2fd737d3SMatthias Ringwald   /** Configure the main internal regulator output voltage
186*2fd737d3SMatthias Ringwald   */
187*2fd737d3SMatthias Ringwald   if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK)
188*2fd737d3SMatthias Ringwald   {
189*2fd737d3SMatthias Ringwald     Error_Handler();
190*2fd737d3SMatthias Ringwald   }
191*2fd737d3SMatthias Ringwald   /** Enable MSI Auto calibration
192*2fd737d3SMatthias Ringwald   */
193*2fd737d3SMatthias Ringwald   HAL_RCCEx_EnableMSIPLLMode();
194*2fd737d3SMatthias Ringwald }
195*2fd737d3SMatthias Ringwald 
196*2fd737d3SMatthias Ringwald /**
197*2fd737d3SMatthias Ringwald   * @brief LPTIM1 Initialization Function
198*2fd737d3SMatthias Ringwald   * @param None
199*2fd737d3SMatthias Ringwald   * @retval None
200*2fd737d3SMatthias Ringwald   */
MX_LPTIM1_Init(void)201*2fd737d3SMatthias Ringwald static void MX_LPTIM1_Init(void)
202*2fd737d3SMatthias Ringwald {
203*2fd737d3SMatthias Ringwald 
204*2fd737d3SMatthias Ringwald   /* USER CODE BEGIN LPTIM1_Init 0 */
205*2fd737d3SMatthias Ringwald 
206*2fd737d3SMatthias Ringwald   /* USER CODE END LPTIM1_Init 0 */
207*2fd737d3SMatthias Ringwald 
208*2fd737d3SMatthias Ringwald   /* USER CODE BEGIN LPTIM1_Init 1 */
209*2fd737d3SMatthias Ringwald 
210*2fd737d3SMatthias Ringwald   /* USER CODE END LPTIM1_Init 1 */
211*2fd737d3SMatthias Ringwald   hlptim1.Instance = LPTIM1;
212*2fd737d3SMatthias Ringwald   hlptim1.Init.Clock.Source = LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC;
213*2fd737d3SMatthias Ringwald   hlptim1.Init.Clock.Prescaler = LPTIM_PRESCALER_DIV1;
214*2fd737d3SMatthias Ringwald   hlptim1.Init.Trigger.Source = LPTIM_TRIGSOURCE_SOFTWARE;
215*2fd737d3SMatthias Ringwald   hlptim1.Init.OutputPolarity = LPTIM_OUTPUTPOLARITY_HIGH;
216*2fd737d3SMatthias Ringwald   hlptim1.Init.UpdateMode = LPTIM_UPDATE_IMMEDIATE;
217*2fd737d3SMatthias Ringwald   hlptim1.Init.CounterSource = LPTIM_COUNTERSOURCE_INTERNAL;
218*2fd737d3SMatthias Ringwald   hlptim1.Init.Input1Source = LPTIM_INPUT1SOURCE_GPIO;
219*2fd737d3SMatthias Ringwald   hlptim1.Init.Input2Source = LPTIM_INPUT2SOURCE_GPIO;
220*2fd737d3SMatthias Ringwald   if (HAL_LPTIM_Init(&hlptim1) != HAL_OK)
221*2fd737d3SMatthias Ringwald   {
222*2fd737d3SMatthias Ringwald     Error_Handler();
223*2fd737d3SMatthias Ringwald   }
224*2fd737d3SMatthias Ringwald   /* USER CODE BEGIN LPTIM1_Init 2 */
225*2fd737d3SMatthias Ringwald 
226*2fd737d3SMatthias Ringwald   /* USER CODE END LPTIM1_Init 2 */
227*2fd737d3SMatthias Ringwald 
228*2fd737d3SMatthias Ringwald }
229*2fd737d3SMatthias Ringwald 
230*2fd737d3SMatthias Ringwald /**
231*2fd737d3SMatthias Ringwald   * @brief SPI2 Initialization Function
232*2fd737d3SMatthias Ringwald   * @param None
233*2fd737d3SMatthias Ringwald   * @retval None
234*2fd737d3SMatthias Ringwald   */
MX_SPI2_Init(void)235*2fd737d3SMatthias Ringwald static void MX_SPI2_Init(void)
236*2fd737d3SMatthias Ringwald {
237*2fd737d3SMatthias Ringwald 
238*2fd737d3SMatthias Ringwald   /* USER CODE BEGIN SPI2_Init 0 */
239*2fd737d3SMatthias Ringwald 
240*2fd737d3SMatthias Ringwald   /* USER CODE END SPI2_Init 0 */
241*2fd737d3SMatthias Ringwald 
242*2fd737d3SMatthias Ringwald   /* USER CODE BEGIN SPI2_Init 1 */
243*2fd737d3SMatthias Ringwald 
244*2fd737d3SMatthias Ringwald   /* USER CODE END SPI2_Init 1 */
245*2fd737d3SMatthias Ringwald   /* SPI2 parameter configuration*/
246*2fd737d3SMatthias Ringwald   hspi2.Instance = SPI2;
247*2fd737d3SMatthias Ringwald   hspi2.Init.Mode = SPI_MODE_MASTER;
248*2fd737d3SMatthias Ringwald   hspi2.Init.Direction = SPI_DIRECTION_2LINES;
249*2fd737d3SMatthias Ringwald   hspi2.Init.DataSize = SPI_DATASIZE_8BIT;
250*2fd737d3SMatthias Ringwald   hspi2.Init.CLKPolarity = SPI_POLARITY_LOW;
251*2fd737d3SMatthias Ringwald   hspi2.Init.CLKPhase = SPI_PHASE_1EDGE;
252*2fd737d3SMatthias Ringwald   hspi2.Init.NSS = SPI_NSS_SOFT;
253*2fd737d3SMatthias Ringwald   hspi2.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_4;
254*2fd737d3SMatthias Ringwald   hspi2.Init.FirstBit = SPI_FIRSTBIT_MSB;
255*2fd737d3SMatthias Ringwald   hspi2.Init.TIMode = SPI_TIMODE_DISABLE;
256*2fd737d3SMatthias Ringwald   hspi2.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
257*2fd737d3SMatthias Ringwald   hspi2.Init.CRCPolynomial = 7;
258*2fd737d3SMatthias Ringwald   hspi2.Init.CRCLength = SPI_CRC_LENGTH_DATASIZE;
259*2fd737d3SMatthias Ringwald   hspi2.Init.NSSPMode = SPI_NSS_PULSE_ENABLE;
260*2fd737d3SMatthias Ringwald   if (HAL_SPI_Init(&hspi2) != HAL_OK)
261*2fd737d3SMatthias Ringwald   {
262*2fd737d3SMatthias Ringwald     Error_Handler();
263*2fd737d3SMatthias Ringwald   }
264*2fd737d3SMatthias Ringwald   /* USER CODE BEGIN SPI2_Init 2 */
265*2fd737d3SMatthias Ringwald 
266*2fd737d3SMatthias Ringwald   /* USER CODE END SPI2_Init 2 */
267*2fd737d3SMatthias Ringwald 
268*2fd737d3SMatthias Ringwald }
269*2fd737d3SMatthias Ringwald 
270*2fd737d3SMatthias Ringwald /**
271*2fd737d3SMatthias Ringwald   * @brief TIM2 Initialization Function
272*2fd737d3SMatthias Ringwald   * @param None
273*2fd737d3SMatthias Ringwald   * @retval None
274*2fd737d3SMatthias Ringwald   */
MX_TIM2_Init(void)275*2fd737d3SMatthias Ringwald static void MX_TIM2_Init(void)
276*2fd737d3SMatthias Ringwald {
277*2fd737d3SMatthias Ringwald 
278*2fd737d3SMatthias Ringwald   /* USER CODE BEGIN TIM2_Init 0 */
279*2fd737d3SMatthias Ringwald 
280*2fd737d3SMatthias Ringwald   /* USER CODE END TIM2_Init 0 */
281*2fd737d3SMatthias Ringwald 
282*2fd737d3SMatthias Ringwald   TIM_ClockConfigTypeDef sClockSourceConfig = {0};
283*2fd737d3SMatthias Ringwald   TIM_MasterConfigTypeDef sMasterConfig = {0};
284*2fd737d3SMatthias Ringwald   TIM_OC_InitTypeDef sConfigOC = {0};
285*2fd737d3SMatthias Ringwald 
286*2fd737d3SMatthias Ringwald   /* USER CODE BEGIN TIM2_Init 1 */
287*2fd737d3SMatthias Ringwald 
288*2fd737d3SMatthias Ringwald   /* USER CODE END TIM2_Init 1 */
289*2fd737d3SMatthias Ringwald   htim2.Instance = TIM2;
290*2fd737d3SMatthias Ringwald   htim2.Init.Prescaler = 70;
291*2fd737d3SMatthias Ringwald   htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
292*2fd737d3SMatthias Ringwald   htim2.Init.Period = 0xffffffff;
293*2fd737d3SMatthias Ringwald   htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
294*2fd737d3SMatthias Ringwald   htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
295*2fd737d3SMatthias Ringwald   if (HAL_TIM_Base_Init(&htim2) != HAL_OK)
296*2fd737d3SMatthias Ringwald   {
297*2fd737d3SMatthias Ringwald     Error_Handler();
298*2fd737d3SMatthias Ringwald   }
299*2fd737d3SMatthias Ringwald   sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
300*2fd737d3SMatthias Ringwald   if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK)
301*2fd737d3SMatthias Ringwald   {
302*2fd737d3SMatthias Ringwald     Error_Handler();
303*2fd737d3SMatthias Ringwald   }
304*2fd737d3SMatthias Ringwald   if (HAL_TIM_OC_Init(&htim2) != HAL_OK)
305*2fd737d3SMatthias Ringwald   {
306*2fd737d3SMatthias Ringwald     Error_Handler();
307*2fd737d3SMatthias Ringwald   }
308*2fd737d3SMatthias Ringwald   sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
309*2fd737d3SMatthias Ringwald   sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
310*2fd737d3SMatthias Ringwald   if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK)
311*2fd737d3SMatthias Ringwald   {
312*2fd737d3SMatthias Ringwald     Error_Handler();
313*2fd737d3SMatthias Ringwald   }
314*2fd737d3SMatthias Ringwald   sConfigOC.OCMode = TIM_OCMODE_TIMING;
315*2fd737d3SMatthias Ringwald   sConfigOC.Pulse = 0;
316*2fd737d3SMatthias Ringwald   sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
317*2fd737d3SMatthias Ringwald   sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
318*2fd737d3SMatthias Ringwald   if (HAL_TIM_OC_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
319*2fd737d3SMatthias Ringwald   {
320*2fd737d3SMatthias Ringwald     Error_Handler();
321*2fd737d3SMatthias Ringwald   }
322*2fd737d3SMatthias Ringwald   /* USER CODE BEGIN TIM2_Init 2 */
323*2fd737d3SMatthias Ringwald 
324*2fd737d3SMatthias Ringwald   /* USER CODE END TIM2_Init 2 */
325*2fd737d3SMatthias Ringwald 
326*2fd737d3SMatthias Ringwald }
327*2fd737d3SMatthias Ringwald 
328*2fd737d3SMatthias Ringwald /**
329*2fd737d3SMatthias Ringwald   * Enable DMA controller clock
330*2fd737d3SMatthias Ringwald   */
MX_DMA_Init(void)331*2fd737d3SMatthias Ringwald static void MX_DMA_Init(void)
332*2fd737d3SMatthias Ringwald {
333*2fd737d3SMatthias Ringwald 
334*2fd737d3SMatthias Ringwald   /* DMA controller clock enable */
335*2fd737d3SMatthias Ringwald   __HAL_RCC_DMA1_CLK_ENABLE();
336*2fd737d3SMatthias Ringwald 
337*2fd737d3SMatthias Ringwald   /* DMA interrupt init */
338*2fd737d3SMatthias Ringwald   /* DMA1_Channel4_IRQn interrupt configuration */
339*2fd737d3SMatthias Ringwald   HAL_NVIC_SetPriority(DMA1_Channel4_IRQn, 0, 0);
340*2fd737d3SMatthias Ringwald   HAL_NVIC_EnableIRQ(DMA1_Channel4_IRQn);
341*2fd737d3SMatthias Ringwald   /* DMA1_Channel5_IRQn interrupt configuration */
342*2fd737d3SMatthias Ringwald   HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 0, 0);
343*2fd737d3SMatthias Ringwald   HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn);
344*2fd737d3SMatthias Ringwald 
345*2fd737d3SMatthias Ringwald }
346*2fd737d3SMatthias Ringwald 
347*2fd737d3SMatthias Ringwald /**
348*2fd737d3SMatthias Ringwald   * @brief GPIO Initialization Function
349*2fd737d3SMatthias Ringwald   * @param None
350*2fd737d3SMatthias Ringwald   * @retval None
351*2fd737d3SMatthias Ringwald   */
MX_GPIO_Init(void)352*2fd737d3SMatthias Ringwald static void MX_GPIO_Init(void)
353*2fd737d3SMatthias Ringwald {
354*2fd737d3SMatthias Ringwald   GPIO_InitTypeDef GPIO_InitStruct = {0};
355*2fd737d3SMatthias Ringwald 
356*2fd737d3SMatthias Ringwald   /* GPIO Ports Clock Enable */
357*2fd737d3SMatthias Ringwald   __HAL_RCC_GPIOC_CLK_ENABLE();
358*2fd737d3SMatthias Ringwald   __HAL_RCC_GPIOB_CLK_ENABLE();
359*2fd737d3SMatthias Ringwald   __HAL_RCC_GPIOA_CLK_ENABLE();
360*2fd737d3SMatthias Ringwald 
361*2fd737d3SMatthias Ringwald   /*Configure GPIO pin Output Level */
362*2fd737d3SMatthias Ringwald   HAL_GPIO_WritePin(RF_TXCO_GPIO_Port, RF_TXCO_Pin, GPIO_PIN_RESET);
363*2fd737d3SMatthias Ringwald 
364*2fd737d3SMatthias Ringwald   /*Configure GPIO pin Output Level */
365*2fd737d3SMatthias Ringwald   HAL_GPIO_WritePin(RF_RESET_GPIO_Port, RF_RESET_Pin, GPIO_PIN_RESET);
366*2fd737d3SMatthias Ringwald 
367*2fd737d3SMatthias Ringwald   /*Configure GPIO pin Output Level */
368*2fd737d3SMatthias Ringwald   HAL_GPIO_WritePin(RF_NSS_GPIO_Port, RF_NSS_Pin, GPIO_PIN_RESET);
369*2fd737d3SMatthias Ringwald 
370*2fd737d3SMatthias Ringwald   /*Configure GPIO pins : PA6 PA7 */
371*2fd737d3SMatthias Ringwald   GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7;
372*2fd737d3SMatthias Ringwald   GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING;
373*2fd737d3SMatthias Ringwald   GPIO_InitStruct.Pull = GPIO_NOPULL;
374*2fd737d3SMatthias Ringwald   HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
375*2fd737d3SMatthias Ringwald 
376*2fd737d3SMatthias Ringwald   /*Configure GPIO pin : RF_BUSY_Pin */
377*2fd737d3SMatthias Ringwald   GPIO_InitStruct.Pin = RF_BUSY_Pin;
378*2fd737d3SMatthias Ringwald   GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
379*2fd737d3SMatthias Ringwald   GPIO_InitStruct.Pull = GPIO_NOPULL;
380*2fd737d3SMatthias Ringwald   HAL_GPIO_Init(RF_BUSY_GPIO_Port, &GPIO_InitStruct);
381*2fd737d3SMatthias Ringwald 
382*2fd737d3SMatthias Ringwald   /*Configure GPIO pin : RF_TXCO_Pin */
383*2fd737d3SMatthias Ringwald   GPIO_InitStruct.Pin = RF_TXCO_Pin;
384*2fd737d3SMatthias Ringwald   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
385*2fd737d3SMatthias Ringwald   GPIO_InitStruct.Pull = GPIO_NOPULL;
386*2fd737d3SMatthias Ringwald   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
387*2fd737d3SMatthias Ringwald   HAL_GPIO_Init(RF_TXCO_GPIO_Port, &GPIO_InitStruct);
388*2fd737d3SMatthias Ringwald 
389*2fd737d3SMatthias Ringwald   /*Configure GPIO pin : PC4 */
390*2fd737d3SMatthias Ringwald   GPIO_InitStruct.Pin = GPIO_PIN_4;
391*2fd737d3SMatthias Ringwald   GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING;
392*2fd737d3SMatthias Ringwald   GPIO_InitStruct.Pull = GPIO_NOPULL;
393*2fd737d3SMatthias Ringwald   HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
394*2fd737d3SMatthias Ringwald 
395*2fd737d3SMatthias Ringwald   /*Configure GPIO pin : RF_RESET_Pin */
396*2fd737d3SMatthias Ringwald   GPIO_InitStruct.Pin = RF_RESET_Pin;
397*2fd737d3SMatthias Ringwald   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
398*2fd737d3SMatthias Ringwald   GPIO_InitStruct.Pull = GPIO_NOPULL;
399*2fd737d3SMatthias Ringwald   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
400*2fd737d3SMatthias Ringwald   HAL_GPIO_Init(RF_RESET_GPIO_Port, &GPIO_InitStruct);
401*2fd737d3SMatthias Ringwald 
402*2fd737d3SMatthias Ringwald   /*Configure GPIO pin : RF_NSS_Pin */
403*2fd737d3SMatthias Ringwald   GPIO_InitStruct.Pin = RF_NSS_Pin;
404*2fd737d3SMatthias Ringwald   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
405*2fd737d3SMatthias Ringwald   GPIO_InitStruct.Pull = GPIO_NOPULL;
406*2fd737d3SMatthias Ringwald   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
407*2fd737d3SMatthias Ringwald   HAL_GPIO_Init(RF_NSS_GPIO_Port, &GPIO_InitStruct);
408*2fd737d3SMatthias Ringwald 
409*2fd737d3SMatthias Ringwald   /* EXTI interrupt init*/
410*2fd737d3SMatthias Ringwald   HAL_NVIC_SetPriority(EXTI4_IRQn, 0, 0);
411*2fd737d3SMatthias Ringwald   HAL_NVIC_EnableIRQ(EXTI4_IRQn);
412*2fd737d3SMatthias Ringwald 
413*2fd737d3SMatthias Ringwald   HAL_NVIC_SetPriority(EXTI9_5_IRQn, 0, 0);
414*2fd737d3SMatthias Ringwald   HAL_NVIC_EnableIRQ(EXTI9_5_IRQn);
415*2fd737d3SMatthias Ringwald 
416*2fd737d3SMatthias Ringwald }
417*2fd737d3SMatthias Ringwald 
418*2fd737d3SMatthias Ringwald /* USER CODE BEGIN 4 */
419*2fd737d3SMatthias Ringwald 
420*2fd737d3SMatthias Ringwald /* USER CODE END 4 */
421*2fd737d3SMatthias Ringwald 
422*2fd737d3SMatthias Ringwald /**
423*2fd737d3SMatthias Ringwald   * @brief  This function is executed in case of error occurrence.
424*2fd737d3SMatthias Ringwald   * @retval None
425*2fd737d3SMatthias Ringwald   */
Error_Handler(void)426*2fd737d3SMatthias Ringwald void Error_Handler(void)
427*2fd737d3SMatthias Ringwald {
428*2fd737d3SMatthias Ringwald   /* USER CODE BEGIN Error_Handler_Debug */
429*2fd737d3SMatthias Ringwald   /* User can add his own implementation to report the HAL error return state */
430*2fd737d3SMatthias Ringwald 
431*2fd737d3SMatthias Ringwald   /* USER CODE END Error_Handler_Debug */
432*2fd737d3SMatthias Ringwald }
433*2fd737d3SMatthias Ringwald 
434*2fd737d3SMatthias Ringwald #ifdef  USE_FULL_ASSERT
435*2fd737d3SMatthias Ringwald /**
436*2fd737d3SMatthias Ringwald   * @brief  Reports the name of the source file and the source line number
437*2fd737d3SMatthias Ringwald   *         where the assert_param error has occurred.
438*2fd737d3SMatthias Ringwald   * @param  file: pointer to the source file name
439*2fd737d3SMatthias Ringwald   * @param  line: assert_param error line source number
440*2fd737d3SMatthias Ringwald   * @retval None
441*2fd737d3SMatthias Ringwald   */
assert_failed(uint8_t * file,uint32_t line)442*2fd737d3SMatthias Ringwald void assert_failed(uint8_t *file, uint32_t line)
443*2fd737d3SMatthias Ringwald {
444*2fd737d3SMatthias Ringwald   /* USER CODE BEGIN 6 */
445*2fd737d3SMatthias Ringwald   /* User can add his own implementation to report the file name and line number,
446*2fd737d3SMatthias Ringwald      tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
447*2fd737d3SMatthias Ringwald   /* USER CODE END 6 */
448*2fd737d3SMatthias Ringwald }
449*2fd737d3SMatthias Ringwald #endif /* USE_FULL_ASSERT */
450*2fd737d3SMatthias Ringwald 
451*2fd737d3SMatthias Ringwald /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
452