1*225f4ba4SMatthias Ringwald /** 2*225f4ba4SMatthias Ringwald ****************************************************************************** 3*225f4ba4SMatthias Ringwald * File Name : dma.c 4*225f4ba4SMatthias Ringwald * Description : This file provides code for the configuration 5*225f4ba4SMatthias Ringwald * of all the requested memory to memory DMA transfers. 6*225f4ba4SMatthias Ringwald ****************************************************************************** 7*225f4ba4SMatthias Ringwald * @attention 8*225f4ba4SMatthias Ringwald * 9*225f4ba4SMatthias Ringwald * <h2><center>© Copyright (c) 2019 STMicroelectronics. 10*225f4ba4SMatthias Ringwald * All rights reserved.</center></h2> 11*225f4ba4SMatthias Ringwald * 12*225f4ba4SMatthias Ringwald * This software component is licensed by ST under BSD 3-Clause license, 13*225f4ba4SMatthias Ringwald * the "License"; You may not use this file except in compliance with the 14*225f4ba4SMatthias Ringwald * License. You may obtain a copy of the License at: 15*225f4ba4SMatthias Ringwald * opensource.org/licenses/BSD-3-Clause 16*225f4ba4SMatthias Ringwald * 17*225f4ba4SMatthias Ringwald ****************************************************************************** 18*225f4ba4SMatthias Ringwald */ 19*225f4ba4SMatthias Ringwald /* Includes ------------------------------------------------------------------*/ 20*225f4ba4SMatthias Ringwald #include "dma.h" 21*225f4ba4SMatthias Ringwald 22*225f4ba4SMatthias Ringwald /* USER CODE BEGIN 0 */ 23*225f4ba4SMatthias Ringwald 24*225f4ba4SMatthias Ringwald /* USER CODE END 0 */ 25*225f4ba4SMatthias Ringwald 26*225f4ba4SMatthias Ringwald /*----------------------------------------------------------------------------*/ 27*225f4ba4SMatthias Ringwald /* Configure DMA */ 28*225f4ba4SMatthias Ringwald /*----------------------------------------------------------------------------*/ 29*225f4ba4SMatthias Ringwald 30*225f4ba4SMatthias Ringwald /* USER CODE BEGIN 1 */ 31*225f4ba4SMatthias Ringwald 32*225f4ba4SMatthias Ringwald /* USER CODE END 1 */ 33*225f4ba4SMatthias Ringwald 34*225f4ba4SMatthias Ringwald /** 35*225f4ba4SMatthias Ringwald * Enable DMA controller clock 36*225f4ba4SMatthias Ringwald */ MX_DMA_Init(void)37*225f4ba4SMatthias Ringwaldvoid MX_DMA_Init(void) 38*225f4ba4SMatthias Ringwald { 39*225f4ba4SMatthias Ringwald /* DMA controller clock enable */ 40*225f4ba4SMatthias Ringwald __HAL_RCC_DMA1_CLK_ENABLE(); 41*225f4ba4SMatthias Ringwald 42*225f4ba4SMatthias Ringwald /* DMA interrupt init */ 43*225f4ba4SMatthias Ringwald /* DMA1_Stream1_IRQn interrupt configuration */ 44*225f4ba4SMatthias Ringwald HAL_NVIC_SetPriority(DMA1_Stream1_IRQn, 0, 0); 45*225f4ba4SMatthias Ringwald HAL_NVIC_EnableIRQ(DMA1_Stream1_IRQn); 46*225f4ba4SMatthias Ringwald /* DMA1_Stream4_IRQn interrupt configuration */ 47*225f4ba4SMatthias Ringwald HAL_NVIC_SetPriority(DMA1_Stream4_IRQn, 0, 0); 48*225f4ba4SMatthias Ringwald HAL_NVIC_EnableIRQ(DMA1_Stream4_IRQn); 49*225f4ba4SMatthias Ringwald 50*225f4ba4SMatthias Ringwald } 51*225f4ba4SMatthias Ringwald 52*225f4ba4SMatthias Ringwald /* USER CODE BEGIN 2 */ 53*225f4ba4SMatthias Ringwald 54*225f4ba4SMatthias Ringwald /* USER CODE END 2 */ 55*225f4ba4SMatthias Ringwald 56*225f4ba4SMatthias Ringwald /** 57*225f4ba4SMatthias Ringwald * @} 58*225f4ba4SMatthias Ringwald */ 59*225f4ba4SMatthias Ringwald 60*225f4ba4SMatthias Ringwald /** 61*225f4ba4SMatthias Ringwald * @} 62*225f4ba4SMatthias Ringwald */ 63*225f4ba4SMatthias Ringwald 64*225f4ba4SMatthias Ringwald /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 65