xref: /btstack/port/samv71-xplained-atwilc3000/main.c (revision c267d18bb4ecbe92acc9192e462f7cc1b8b2c89d)
1 #include "asf.h"
2 #include "stdio_serial.h"
3 #include "conf_board.h"
4 #include "conf_clock.h"
5 
6 // BTstack
7 #include "btstack_chipset_atwilc3000.h"
8 #include "btstack_debug.h"
9 #include "btstack_memory.h"
10 #include "btstack_run_loop.h"
11 #include "btstack_run_loop_embedded.h"
12 #include "classic/btstack_link_key_db.h"
13 #include "hal_uart_dma.h"
14 #include "hal_cpu.h"
15 #include "hal_tick.h"
16 #include "hci.h"
17 #include "hci_dump.h"
18 #include "wilc3000_bt_firmware.h"
19 
20 // #define USE_XDMAC_FOR_USART
21 #define XDMA_CH_UART_TX   0
22 #define XDMA_CH_UART_RX  1
23 
24 /** All interrupt mask. */
25 #define ALL_INTERRUPT_MASK   0xffffffff
26 
27 #ifdef __cplusplus
28 extern "C" {
29 #endif
30 
31 extern int btstack_main(int argc, const char * argv[]);
32 
33 static void dummy_handler(void){}
34 static void (*tick_handler)(void) = &dummy_handler;
35 
36 static btstack_uart_config_t uart_config;
37 
38 static hci_transport_config_uart_t transport_config = {
39 	HCI_TRANSPORT_CONFIG_UART,
40 	115200,
41 	921600, // use 0 to skip baud rate change from 115200 to X for debugging purposes
42 	1,        // flow control
43 	NULL,
44 };
45 
46 /**
47  *  \brief Handler for System Tick interrupt.
48  */
49 void SysTick_Handler(void)
50 {
51 	tick_handler();
52 }
53 
54 /**
55  *  Configure UART console.
56  */
57 // [main_console_configure]
58 static void configure_console(void)
59 {
60 	const usart_serial_options_t uart_serial_options = {
61 		.baudrate = CONF_UART_BAUDRATE,
62 #ifdef CONF_UART_CHAR_LENGTH
63 		.charlength = CONF_UART_CHAR_LENGTH,
64 #endif
65 		.paritytype = CONF_UART_PARITY,
66 #ifdef CONF_UART_STOP_BITS
67 		.stopbits = CONF_UART_STOP_BITS,
68 #endif
69 	};
70 
71 	/* Configure console UART. */
72 	sysclk_enable_peripheral_clock(CONSOLE_UART_ID);
73 	stdio_serial_init(CONF_UART, &uart_serial_options);
74 }
75 
76 // [main_console_configure]
77 
78 /**
79  * \brief Wait for the given number of milliseconds (ticks
80  * generated by the SAM's microcontrollers's system tick).
81  *
82  * \param ul_dly_ticks  Delay to wait for, in milliseconds.
83  */
84 // [main_ms_delay]
85 static void mdelay(uint32_t delay_in_ms)
86 {
87 	// delay_ms(delay_in_ms);
88 	uint32_t time_to_wait = btstack_run_loop_get_time_ms() + delay_in_ms;
89 	while (btstack_run_loop_get_time_ms() < time_to_wait);
90 }
91 // [main_ms_delay]
92 
93 ////////////////////////////////////////////////////////////////////////////////
94 // hal_cpu.h implementation
95 ////////////////////////////////////////////////////////////////////////////////
96 // hal_led.h implementation
97 #include "hal_led.h"
98 void hal_led_off(void);
99 void hal_led_on(void);
100 
101 void hal_led_off(void){
102 	// gpio_set_pin_low(GPIOA, GPIO_LED2);
103 }
104 void hal_led_on(void){
105 	// gpio_set_pin_high(GPIOA, GPIO_LED2);
106 }
107 void hal_led_toggle(void){
108 	// gpio_toggle_pin(GPIOA, GPIO_LED2);
109 }
110 
111 // hal_cpu.h implementation
112 #include "hal_cpu.h"
113 
114 void hal_cpu_disable_irqs(void){
115 	//__disable_irq();
116 }
117 
118 void hal_cpu_enable_irqs(void){
119 	// __enable_irq();
120 }
121 
122 void hal_cpu_enable_irqs_and_sleep(void){
123 	hal_led_off();
124 	// __enable_irq();
125 	// __asm__("wfe");	// go to sleep if event flag isn't set. if set, just clear it. IRQs set event flag
126 
127 	// note: hal_uart_needed_during_sleep can be used to disable peripheral clock if it's not needed for a timer
128 	hal_led_on();
129 }
130 
131 
132 #ifndef USE_XDMAC_FOR_USART
133 // RX state
134 static volatile uint16_t  bytes_to_read = 0;
135 static volatile uint8_t * rx_buffer_ptr = 0;
136 
137 // TX state
138 static volatile uint16_t  bytes_to_write = 0;
139 static volatile uint8_t * tx_buffer_ptr = 0;
140 #endif
141 
142 static int simulate_flowcontrol;
143 
144 // handlers
145 static void (*rx_done_handler)(void) = dummy_handler;
146 static void (*tx_done_handler)(void) = dummy_handler;
147 static void (*cts_irq_handler)(void) = dummy_handler;
148 
149 // @note While the Atmel SAM S7x data sheet states
150 // "The hardware handshaking feature enables an out-of-band flow control by automatic management
151 //  of the pins RTS and CTS.",
152 // I didn't see RTS going up automatically up, ever. So, at least for RTS, the automatic management
153 // is just a glorified GPIO pin control feature, which provides no benefit, but irritates a lot
154 
155 static inline void hal_uart_rts_high(void){
156 	if (!simulate_flowcontrol) return;
157 	BOARD_USART->US_CR = US_CR_RTSEN;
158 }
159 static inline void hal_uart_rts_low(void){
160 	if (!simulate_flowcontrol) return;
161 	BOARD_USART->US_CR = US_CR_RTSDIS;
162 }
163 
164 /**
165  */
166 void hal_uart_dma_init(void)
167 {
168 	// power on
169 	ioport_set_pin_dir(BLUETOOTH_CHP_EN, IOPORT_DIR_OUTPUT);
170 	ioport_set_pin_level(BLUETOOTH_CHP_EN, IOPORT_PIN_LEVEL_HIGH);
171 
172 	// reset
173 	ioport_set_pin_dir(BLUETOOTH_RESET, IOPORT_DIR_OUTPUT);
174 	ioport_set_pin_level(BLUETOOTH_RESET, IOPORT_PIN_LEVEL_LOW);
175 	mdelay(250);
176 	ioport_set_pin_level(BLUETOOTH_RESET, IOPORT_PIN_LEVEL_HIGH);
177 	mdelay(250);
178 
179 	/* Enable the peripheral clock in the PMC. */
180 	sysclk_enable_peripheral_clock(BOARD_ID_USART);
181 
182 	// configure Bluetooth USART
183 	const sam_usart_opt_t bluetooth_settings = {
184 		115200,
185 		US_MR_CHRL_8_BIT,
186 		US_MR_PAR_NO,
187 		US_MR_NBSTOP_1_BIT,
188 		US_MR_CHMODE_NORMAL,
189 		/* This field is only used in IrDA mode. */
190 		0
191 	};
192 
193 	/* Configure USART mode. */
194 	simulate_flowcontrol = 0;
195 	usart_init_rs232(BOARD_USART, &bluetooth_settings, sysclk_get_peripheral_hz());
196 	// Set RTS = 0 (normal mode)
197 	BOARD_USART->US_CR = US_CR_RTSEN;
198 
199 	/* Disable all the interrupts. */
200 	usart_disable_interrupt(BOARD_USART, ALL_INTERRUPT_MASK);
201 
202 	/* Enable TX & RX function. */
203 	usart_enable_tx(BOARD_USART);
204 	usart_enable_rx(BOARD_USART);
205 
206 	/* Configure and enable interrupt of USART. */
207 	NVIC_EnableIRQ(USART_IRQn);
208 
209 #ifdef USE_XDMAC_FOR_USART
210 
211 	// setup XDMAC
212 
213 	/* Initialize and enable DMA controller */
214 	pmc_enable_periph_clk(ID_XDMAC);
215 
216 	/* Enable XDMA interrupt */
217 	NVIC_ClearPendingIRQ(XDMAC_IRQn);
218 	NVIC_SetPriority( XDMAC_IRQn ,1);
219 	NVIC_EnableIRQ(XDMAC_IRQn);
220 
221 	// Setup XDMA Channel for USART TX
222 	xdmac_channel_set_destination_addr(XDMAC, XDMA_CH_UART_TX, (uint32_t)&BOARD_USART->US_THR);
223 	xdmac_channel_set_config(XDMAC, XDMA_CH_UART_TX,
224 		XDMAC_CC_TYPE_PER_TRAN |
225 		XDMAC_CC_DSYNC_MEM2PER |
226 		XDMAC_CC_MEMSET_NORMAL_MODE |
227 		XDMAC_CC_MBSIZE_SINGLE |
228 		XDMAC_CC_DWIDTH_BYTE |
229 		XDMAC_CC_SIF_AHB_IF0 |
230 		XDMAC_CC_DIF_AHB_IF1 |
231 		XDMAC_CC_SAM_INCREMENTED_AM |
232 		XDMAC_CC_DAM_FIXED_AM |
233 		XDMAC_CC_CSIZE_CHK_1 |
234 		XDMAC_CC_PERID(XDAMC_CHANNEL_HWID_USART0_TX)
235 	);
236 	xdmac_channel_set_descriptor_control(XDMAC, XDMA_CH_UART_TX, 0);
237 	xdmac_channel_set_source_microblock_stride(XDMAC, XDMA_CH_UART_TX, 0);
238 	xdmac_channel_set_destination_microblock_stride(XDMAC, XDMA_CH_UART_TX, 0);
239 	xdmac_channel_set_datastride_mempattern(XDMAC, XDMA_CH_UART_TX, 0);
240 	xdmac_channel_set_block_control(XDMAC, XDMA_CH_UART_TX, 0);
241 	xdmac_enable_interrupt(XDMAC, XDMA_CH_UART_TX);
242 	xdmac_channel_enable_interrupt(XDMAC, XDMA_CH_UART_TX, XDMAC_CIE_BIE);
243 
244 	// Setup XDMA Channel for USART RX
245 	xdmac_channel_set_source_addr(XDMAC, XDMA_CH_UART_RX, (uint32_t)&BOARD_USART->US_RHR);
246 	xdmac_channel_set_config(XDMAC, XDMA_CH_UART_RX,
247 		XDMAC_CC_TYPE_PER_TRAN |
248 		XDMAC_CC_DSYNC_PER2MEM |
249 		XDMAC_CC_MEMSET_NORMAL_MODE |
250 		XDMAC_CC_MBSIZE_SINGLE |
251 		XDMAC_CC_DWIDTH_BYTE |
252 		XDMAC_CC_SIF_AHB_IF1 |
253 		XDMAC_CC_DIF_AHB_IF0 |
254 		XDMAC_CC_SAM_FIXED_AM |
255 		XDMAC_CC_DAM_INCREMENTED_AM |
256 		XDMAC_CC_CSIZE_CHK_1 |
257 		XDMAC_CC_PERID(XDAMC_CHANNEL_HWID_USART0_RX)
258 	);
259 	xdmac_channel_set_descriptor_control(XDMAC, XDMA_CH_UART_RX, 0);
260 	xdmac_channel_set_source_microblock_stride(XDMAC, XDMA_CH_UART_RX, 0);
261 	xdmac_channel_set_destination_microblock_stride(XDMAC, XDMA_CH_UART_RX, 0);
262 	xdmac_channel_set_datastride_mempattern(XDMAC, XDMA_CH_UART_RX, 0);
263 	xdmac_channel_set_block_control(XDMAC, XDMA_CH_UART_RX, 0);
264 	xdmac_enable_interrupt(XDMAC, XDMA_CH_UART_RX);
265 	xdmac_channel_enable_interrupt(XDMAC, XDMA_CH_UART_RX, XDMAC_CIE_BIE);
266 #endif
267 }
268 
269 void hal_uart_dma_set_sleep(uint8_t sleep){
270 }
271 
272 void hal_uart_dma_set_block_received( void (*the_block_handler)(void)){
273 	rx_done_handler = the_block_handler;
274 }
275 
276 void hal_uart_dma_set_block_sent( void (*the_block_handler)(void)){
277 	tx_done_handler = the_block_handler;
278 }
279 
280 void hal_uart_dma_set_csr_irq_handler( void (*the_irq_handler)(void)){
281 	cts_irq_handler = the_irq_handler;
282 }
283 
284 int  hal_uart_dma_set_baud(uint32_t baud){
285 	/* Disable TX & RX function. */
286 	usart_disable_tx(BOARD_USART);
287 	usart_disable_rx(BOARD_USART);
288 	uint32_t res = usart_set_async_baudrate(BOARD_USART, baud, sysclk_get_peripheral_hz());
289 	if (res){
290 		log_error("hal_uart_dma_set_baud library call failed");
291 	}
292 
293 	/* Enable TX & RX function. */
294 	usart_enable_tx(BOARD_USART);
295 	usart_enable_rx(BOARD_USART);
296 
297 	log_info("set baud rate %u", (int) baud);
298 	return 0;
299 }
300 
301 int  hal_uart_dma_set_flowcontrol(int flowcontrol){
302 	simulate_flowcontrol = flowcontrol;
303 	if (flowcontrol){
304 		/* Set hardware handshaking mode. */
305 		BOARD_USART->US_MR = (BOARD_USART->US_MR & ~US_MR_USART_MODE_Msk) | US_MR_USART_MODE_HW_HANDSHAKING;
306 		hal_uart_rts_low();
307 	} else {
308 		/* Set nomal mode. */
309 		BOARD_USART->US_MR = (BOARD_USART->US_MR & ~US_MR_USART_MODE_Msk) | US_MR_USART_MODE_NORMAL;
310 		// Set RTS = 0 (normal mode)
311 		BOARD_USART->US_CR = US_CR_RTSEN;
312 	}
313 	return 0;
314 }
315 
316 void hal_uart_dma_send_block(const uint8_t *data, uint16_t size){
317 	// log_info("send %u", size);
318 	// log_info_hexdump(data, size);
319 #ifdef USE_XDMAC_FOR_USART
320 	xdmac_channel_get_interrupt_status( XDMAC, XDMA_CH_UART_TX);
321 	xdmac_channel_set_source_addr(XDMAC, XDMA_CH_UART_TX, (uint32_t)data);
322 	xdmac_channel_set_microblock_control(XDMAC, XDMA_CH_UART_TX, size);
323 	xdmac_channel_enable(XDMAC, XDMA_CH_UART_TX);
324 #else
325     tx_buffer_ptr = (uint8_t *) data;
326     bytes_to_write = size;
327 	usart_enable_interrupt(BOARD_USART, US_IER_TXRDY);
328 #endif
329 }
330 
331 void hal_uart_dma_receive_block(uint8_t *data, uint16_t size){
332 
333 	hal_uart_rts_low();
334 
335 #ifdef USE_XDMAC_FOR_USART
336 	xdmac_channel_get_interrupt_status( XDMAC, XDMA_CH_UART_RX);
337 	xdmac_channel_set_destination_addr(XDMAC, XDMA_CH_UART_RX, (uint32_t)data);
338 	xdmac_channel_set_microblock_control(XDMAC, XDMA_CH_UART_RX, size);
339 	xdmac_channel_enable(XDMAC, XDMA_CH_UART_RX);
340 #else
341     rx_buffer_ptr = data;
342     bytes_to_read = size;
343     usart_enable_interrupt(BOARD_USART, US_IER_RXRDY);
344 #endif
345 }
346 
347 #ifdef USE_XDMAC_FOR_USART
348 void XDMAC_Handler(void)
349 {
350 	uint32_t dma_status;
351 	dma_status = xdmac_channel_get_interrupt_status(XDMAC, XDMA_CH_UART_TX);
352 	if (dma_status & XDMAC_CIS_BIS) {
353 		tx_done_handler();
354 	}
355 	dma_status = xdmac_channel_get_interrupt_status(XDMAC, XDMA_CH_UART_RX);
356 	if (dma_status & XDMAC_CIS_BIS) {
357 		hal_uart_rts_high();
358 		rx_done_handler();
359 	}
360 }
361 #else
362 void USART_Handler(void)
363 {
364 	uint32_t ul_status;
365 
366 	/* Read USART status. */
367 	ul_status = usart_get_status(BOARD_USART);
368 
369 	// handle ready to send
370 	if(ul_status & US_IER_TXRDY) {
371 		if (bytes_to_write){
372 			// send next byte
373 			usart_write(BOARD_USART, *tx_buffer_ptr);
374 			tx_buffer_ptr++;
375 			bytes_to_write--;
376 		} else {
377 			// done. disable tx ready interrupt to avoid starvation here
378 			usart_disable_interrupt(BOARD_USART, US_IER_TXRDY);
379 			tx_done_handler();
380 		}
381 	}
382 
383 	// handle byte available for read
384 	if (ul_status & US_IER_RXRDY) {
385 		uint32_t ch;
386 		usart_read(BOARD_USART, (uint32_t *)&ch);
387 		*rx_buffer_ptr++ = ch;
388 		bytes_to_read--;
389 		if (bytes_to_read == 0){
390 			// done. disable rx ready interrupt, raise RTS
391 			hal_uart_rts_high();
392 			usart_disable_interrupt(BOARD_USART, US_IER_RXRDY);
393 			rx_done_handler();
394 		}
395 	}
396 }
397 #endif
398 
399 void hal_tick_init()
400 {
401 	/* Configure systick for 1 ms */
402 	puts("Configure system tick to get 1ms tick period.\r");
403 	if (SysTick_Config(sysclk_get_cpu_hz() / 1000)) {
404 		puts("-F- Systick configuration error\r");
405 		while (1);
406 	}
407 }
408 
409 void hal_tick_set_handler(void (*handler)(void)){
410 	if (handler == NULL){
411 		tick_handler = &dummy_handler;
412 		return;
413 	}
414 	tick_handler = handler;
415 }
416 
417 int  hal_tick_get_tick_period_in_ms(void){
418 	return 1;
419 }
420 
421 static const btstack_uart_block_t * uart_driver;
422 
423 static void phase2(int status){
424 
425     if (status){
426         printf("Download firmware failed\n");
427         return;
428     }
429 
430     printf("Phase 2: Main app\n");
431 
432     // init HCI
433     const hci_transport_t * transport = hci_transport_h4_instance(uart_driver);
434     // const btstack_link_key_db_t * link_key_db = btstack_link_key_db_fs_instance();
435     hci_init(transport, (void*) &transport_config);
436     hci_set_chipset(btstack_chipset_atwilc3000_instance());
437     // hci_set_link_key_db(link_key_db);
438 
439     // setup app
440     btstack_main(0, NULL);
441 }
442 
443 /**
444  *  \brief getting-started Application entry point.
445  *
446  *  \return Unused (ANSI-C compatibility).
447  */
448 // [main]
449 int main(void)
450 {
451 	/* Initialize the SAM system */
452 	sysclk_init();
453 	board_init();
454 
455 	/* Initialize the console uart */
456 	configure_console();
457 
458 	/* Output boot info */
459 	printf("BTstack on SAMV71 Xplained Ultra with ATWILC3000\n");
460 	printf("CPU %lu hz, peripheral clock %lu hz\n", sysclk_get_cpu_hz(), sysclk_get_peripheral_hz());
461 #ifdef USE_XDMAC_FOR_USART
462 	printf("Using XDMA for Bluetooth UART\n");
463 #else
464 	printf("Using IRQ driver for Bluetooth UART\n");
465 #endif
466 	printf("--\n");
467 
468 	// start with BTstack init - especially configure HCI Transport
469 	btstack_memory_init();
470 	btstack_run_loop_init(btstack_run_loop_embedded_get_instance());
471 
472 	// enable full log output while porting
473 	hci_dump_open(NULL, HCI_DUMP_STDOUT);
474 
475 	// setup UART HAL + Run Loop integration
476 	uart_driver = btstack_uart_block_embedded_instance();
477 
478     // extract UART config from transport config, but disable flow control
479     uart_config.baudrate    = transport_config.baudrate_init;
480     uart_config.flowcontrol = 0;
481     uart_config.device_name = transport_config.device_name;
482     uart_driver->init(&uart_config);
483 
484     // phase #1 download firmware
485     printf("Phase 1: Download firmware\n");
486 
487     // phase #2 start main app
488     btstack_chipset_atwilc3000_download_firmware(uart_driver, transport_config.baudrate_main, transport_config.flowcontrol, atwilc3000_fw_data, atwilc3000_fw_size, &phase2);
489 
490 	// go
491 	btstack_run_loop_execute();
492 
493 	// compiler happy
494 	while(1);
495 }
496 #ifdef __cplusplus
497 }
498 #endif
499