xref: /btstack/port/samv71-xplained-atwilc3000/main.c (revision 6e0d5aed6b5b214bc2c71675fba0dfdb2dd24ed1)
11b2596b5SMatthias Ringwald #include "asf.h"
21b2596b5SMatthias Ringwald #include "stdio_serial.h"
31b2596b5SMatthias Ringwald #include "conf_board.h"
41b2596b5SMatthias Ringwald #include "conf_clock.h"
51b2596b5SMatthias Ringwald 
658a1b1bbSMatthias Ringwald // BTstack
713b8e9b1SMatthias Ringwald #include "btstack_chipset_atwilc3000.h"
813b8e9b1SMatthias Ringwald #include "btstack_debug.h"
913b8e9b1SMatthias Ringwald #include "btstack_memory.h"
1058a1b1bbSMatthias Ringwald #include "btstack_run_loop.h"
1158a1b1bbSMatthias Ringwald #include "btstack_run_loop_embedded.h"
1258a1b1bbSMatthias Ringwald #include "classic/btstack_link_key_db.h"
1358a1b1bbSMatthias Ringwald #include "hal_uart_dma.h"
1458a1b1bbSMatthias Ringwald #include "hal_cpu.h"
1558a1b1bbSMatthias Ringwald #include "hal_tick.h"
1613b8e9b1SMatthias Ringwald #include "hci.h"
1713b8e9b1SMatthias Ringwald #include "hci_dump.h"
1813b8e9b1SMatthias Ringwald #include "wilc3000_bt_firmware.h"
1958a1b1bbSMatthias Ringwald 
2013b8e9b1SMatthias Ringwald // #define USE_XDMAC_FOR_USART
2158a1b1bbSMatthias Ringwald #define XDMA_CH_UART_TX   0
2258a1b1bbSMatthias Ringwald #define XDMA_CH_UART_RX  1
231b2596b5SMatthias Ringwald 
2458a1b1bbSMatthias Ringwald /** All interrupt mask. */
2558a1b1bbSMatthias Ringwald #define ALL_INTERRUPT_MASK   0xffffffff
261b2596b5SMatthias Ringwald 
271b2596b5SMatthias Ringwald #ifdef __cplusplus
281b2596b5SMatthias Ringwald extern "C" {
291b2596b5SMatthias Ringwald #endif
3013b8e9b1SMatthias Ringwald 
3113b8e9b1SMatthias Ringwald extern int btstack_main(int argc, const char * argv[]);
3213b8e9b1SMatthias Ringwald 
3313b8e9b1SMatthias Ringwald static void dummy_handler(void){}
3413b8e9b1SMatthias Ringwald static void (*tick_handler)(void) = &dummy_handler;
3513b8e9b1SMatthias Ringwald 
3613b8e9b1SMatthias Ringwald static btstack_uart_config_t uart_config;
3713b8e9b1SMatthias Ringwald 
3813b8e9b1SMatthias Ringwald static hci_transport_config_uart_t transport_config = {
3913b8e9b1SMatthias Ringwald 	HCI_TRANSPORT_CONFIG_UART,
40*6e0d5aedSMatthias Ringwald 	921600,	  // directly use high baud rate after config
41cb9ff2fbSMatthias Ringwald 	0, 		  // use 0 to skip baud rate change from 115200 to X for debugging purposes
4213b8e9b1SMatthias Ringwald 	1,        // flow control
4313b8e9b1SMatthias Ringwald 	NULL,
4413b8e9b1SMatthias Ringwald };
451b2596b5SMatthias Ringwald 
461b2596b5SMatthias Ringwald /**
471b2596b5SMatthias Ringwald  *  \brief Handler for System Tick interrupt.
481b2596b5SMatthias Ringwald  */
491b2596b5SMatthias Ringwald void SysTick_Handler(void)
501b2596b5SMatthias Ringwald {
5158a1b1bbSMatthias Ringwald 	tick_handler();
521b2596b5SMatthias Ringwald }
531b2596b5SMatthias Ringwald 
541b2596b5SMatthias Ringwald /**
551b2596b5SMatthias Ringwald  *  Configure UART console.
561b2596b5SMatthias Ringwald  */
571b2596b5SMatthias Ringwald // [main_console_configure]
581b2596b5SMatthias Ringwald static void configure_console(void)
591b2596b5SMatthias Ringwald {
601b2596b5SMatthias Ringwald 	const usart_serial_options_t uart_serial_options = {
611b2596b5SMatthias Ringwald 		.baudrate = CONF_UART_BAUDRATE,
621b2596b5SMatthias Ringwald #ifdef CONF_UART_CHAR_LENGTH
631b2596b5SMatthias Ringwald 		.charlength = CONF_UART_CHAR_LENGTH,
641b2596b5SMatthias Ringwald #endif
651b2596b5SMatthias Ringwald 		.paritytype = CONF_UART_PARITY,
661b2596b5SMatthias Ringwald #ifdef CONF_UART_STOP_BITS
671b2596b5SMatthias Ringwald 		.stopbits = CONF_UART_STOP_BITS,
681b2596b5SMatthias Ringwald #endif
691b2596b5SMatthias Ringwald 	};
701b2596b5SMatthias Ringwald 
711b2596b5SMatthias Ringwald 	/* Configure console UART. */
721b2596b5SMatthias Ringwald 	sysclk_enable_peripheral_clock(CONSOLE_UART_ID);
731b2596b5SMatthias Ringwald 	stdio_serial_init(CONF_UART, &uart_serial_options);
741b2596b5SMatthias Ringwald }
751b2596b5SMatthias Ringwald 
761b2596b5SMatthias Ringwald // [main_console_configure]
771b2596b5SMatthias Ringwald 
781b2596b5SMatthias Ringwald /**
7958a1b1bbSMatthias Ringwald  * \brief Wait for the given number of milliseconds (ticks
801b2596b5SMatthias Ringwald  * generated by the SAM's microcontrollers's system tick).
811b2596b5SMatthias Ringwald  *
821b2596b5SMatthias Ringwald  * \param ul_dly_ticks  Delay to wait for, in milliseconds.
831b2596b5SMatthias Ringwald  */
841b2596b5SMatthias Ringwald // [main_ms_delay]
8558a1b1bbSMatthias Ringwald static void mdelay(uint32_t delay_in_ms)
861b2596b5SMatthias Ringwald {
8758a1b1bbSMatthias Ringwald 	// delay_ms(delay_in_ms);
8858a1b1bbSMatthias Ringwald 	uint32_t time_to_wait = btstack_run_loop_get_time_ms() + delay_in_ms;
8958a1b1bbSMatthias Ringwald 	while (btstack_run_loop_get_time_ms() < time_to_wait);
901b2596b5SMatthias Ringwald }
911b2596b5SMatthias Ringwald // [main_ms_delay]
921b2596b5SMatthias Ringwald 
9358a1b1bbSMatthias Ringwald ////////////////////////////////////////////////////////////////////////////////
9458a1b1bbSMatthias Ringwald // hal_cpu.h implementation
9558a1b1bbSMatthias Ringwald ////////////////////////////////////////////////////////////////////////////////
9658a1b1bbSMatthias Ringwald // hal_led.h implementation
9758a1b1bbSMatthias Ringwald #include "hal_led.h"
9858a1b1bbSMatthias Ringwald void hal_led_off(void);
9958a1b1bbSMatthias Ringwald void hal_led_on(void);
10058a1b1bbSMatthias Ringwald 
10158a1b1bbSMatthias Ringwald void hal_led_off(void){
10258a1b1bbSMatthias Ringwald 	// gpio_set_pin_low(GPIOA, GPIO_LED2);
10358a1b1bbSMatthias Ringwald }
10458a1b1bbSMatthias Ringwald void hal_led_on(void){
10558a1b1bbSMatthias Ringwald 	// gpio_set_pin_high(GPIOA, GPIO_LED2);
10658a1b1bbSMatthias Ringwald }
10758a1b1bbSMatthias Ringwald void hal_led_toggle(void){
10858a1b1bbSMatthias Ringwald 	// gpio_toggle_pin(GPIOA, GPIO_LED2);
10958a1b1bbSMatthias Ringwald }
11058a1b1bbSMatthias Ringwald 
11158a1b1bbSMatthias Ringwald // hal_cpu.h implementation
11258a1b1bbSMatthias Ringwald #include "hal_cpu.h"
11358a1b1bbSMatthias Ringwald 
11458a1b1bbSMatthias Ringwald void hal_cpu_disable_irqs(void){
11558a1b1bbSMatthias Ringwald 	//__disable_irq();
11658a1b1bbSMatthias Ringwald }
11758a1b1bbSMatthias Ringwald 
11858a1b1bbSMatthias Ringwald void hal_cpu_enable_irqs(void){
11958a1b1bbSMatthias Ringwald 	// __enable_irq();
12058a1b1bbSMatthias Ringwald }
12158a1b1bbSMatthias Ringwald 
12258a1b1bbSMatthias Ringwald void hal_cpu_enable_irqs_and_sleep(void){
12358a1b1bbSMatthias Ringwald 	hal_led_off();
12458a1b1bbSMatthias Ringwald 	// __enable_irq();
12558a1b1bbSMatthias Ringwald 	// __asm__("wfe");	// go to sleep if event flag isn't set. if set, just clear it. IRQs set event flag
12658a1b1bbSMatthias Ringwald 
12758a1b1bbSMatthias Ringwald 	// note: hal_uart_needed_during_sleep can be used to disable peripheral clock if it's not needed for a timer
12858a1b1bbSMatthias Ringwald 	hal_led_on();
12958a1b1bbSMatthias Ringwald }
13058a1b1bbSMatthias Ringwald 
13158a1b1bbSMatthias Ringwald 
13258a1b1bbSMatthias Ringwald #ifndef USE_XDMAC_FOR_USART
13358a1b1bbSMatthias Ringwald // RX state
13458a1b1bbSMatthias Ringwald static volatile uint16_t  bytes_to_read = 0;
13558a1b1bbSMatthias Ringwald static volatile uint8_t * rx_buffer_ptr = 0;
136cb9ff2fbSMatthias Ringwald static volatile int       rx_notify;
13758a1b1bbSMatthias Ringwald 
13858a1b1bbSMatthias Ringwald // TX state
13958a1b1bbSMatthias Ringwald static volatile uint16_t  bytes_to_write = 0;
14058a1b1bbSMatthias Ringwald static volatile uint8_t * tx_buffer_ptr = 0;
14167422dbdSMatthias Ringwald static volatile int       tx_notify;
14258a1b1bbSMatthias Ringwald #endif
14358a1b1bbSMatthias Ringwald 
144c267d18bSMatthias Ringwald static int simulate_flowcontrol;
145c267d18bSMatthias Ringwald 
14658a1b1bbSMatthias Ringwald // handlers
14758a1b1bbSMatthias Ringwald static void (*rx_done_handler)(void) = dummy_handler;
14858a1b1bbSMatthias Ringwald static void (*tx_done_handler)(void) = dummy_handler;
14958a1b1bbSMatthias Ringwald static void (*cts_irq_handler)(void) = dummy_handler;
15058a1b1bbSMatthias Ringwald 
15158a1b1bbSMatthias Ringwald // @note While the Atmel SAM S7x data sheet states
15258a1b1bbSMatthias Ringwald // "The hardware handshaking feature enables an out-of-band flow control by automatic management
15358a1b1bbSMatthias Ringwald //  of the pins RTS and CTS.",
15458a1b1bbSMatthias Ringwald // I didn't see RTS going up automatically up, ever. So, at least for RTS, the automatic management
15558a1b1bbSMatthias Ringwald // is just a glorified GPIO pin control feature, which provides no benefit, but irritates a lot
15658a1b1bbSMatthias Ringwald 
157cb9ff2fbSMatthias Ringwald // J505:6
158cb9ff2fbSMatthias Ringwald #define DEBUG_PIN_1 PIO_PD16_IDX
159cb9ff2fbSMatthias Ringwald // J505:5
160cb9ff2fbSMatthias Ringwald #define DEBUG_PIN_2 PIO_PD15_IDX
161cb9ff2fbSMatthias Ringwald 
162c267d18bSMatthias Ringwald static inline void hal_uart_rts_high(void){
163c267d18bSMatthias Ringwald 	if (!simulate_flowcontrol) return;
164cb9ff2fbSMatthias Ringwald 	ioport_set_pin_level(DEBUG_PIN_2, IOPORT_PIN_LEVEL_HIGH);
16558a1b1bbSMatthias Ringwald 	BOARD_USART->US_CR = US_CR_RTSEN;
16658a1b1bbSMatthias Ringwald }
167c267d18bSMatthias Ringwald static inline void hal_uart_rts_low(void){
168c267d18bSMatthias Ringwald 	if (!simulate_flowcontrol) return;
169cb9ff2fbSMatthias Ringwald 	ioport_set_pin_level(DEBUG_PIN_2, IOPORT_PIN_LEVEL_LOW);
17058a1b1bbSMatthias Ringwald 	BOARD_USART->US_CR = US_CR_RTSDIS;
17158a1b1bbSMatthias Ringwald }
17258a1b1bbSMatthias Ringwald 
17358a1b1bbSMatthias Ringwald /**
17458a1b1bbSMatthias Ringwald  */
175cb9ff2fbSMatthias Ringwald static int hal_uart_dma_initialized = 0;
17658a1b1bbSMatthias Ringwald void hal_uart_dma_init(void)
17758a1b1bbSMatthias Ringwald {
178cb9ff2fbSMatthias Ringwald 	if (hal_uart_dma_initialized){
179cb9ff2fbSMatthias Ringwald 		log_info("hal_uart_dma_init already initialized");
180cb9ff2fbSMatthias Ringwald 		return;
181cb9ff2fbSMatthias Ringwald 	}
182cb9ff2fbSMatthias Ringwald 	hal_uart_dma_initialized = 1;
18367422dbdSMatthias Ringwald 
18467422dbdSMatthias Ringwald 	// debug
18567422dbdSMatthias Ringwald #ifdef DEBUG_PIN_1
18667422dbdSMatthias Ringwald 	ioport_set_pin_dir(DEBUG_PIN_1, IOPORT_DIR_OUTPUT);
18767422dbdSMatthias Ringwald 	ioport_set_pin_level(DEBUG_PIN_1, IOPORT_PIN_LEVEL_LOW);
18867422dbdSMatthias Ringwald #endif
18967422dbdSMatthias Ringwald #ifdef DEBUG_PIN_2
19067422dbdSMatthias Ringwald 	ioport_set_pin_dir(DEBUG_PIN_2, IOPORT_DIR_OUTPUT);
19167422dbdSMatthias Ringwald 	ioport_set_pin_level(DEBUG_PIN_2, IOPORT_PIN_LEVEL_LOW);
19267422dbdSMatthias Ringwald #endif
19313b8e9b1SMatthias Ringwald 	// power on
19413b8e9b1SMatthias Ringwald 	ioport_set_pin_dir(BLUETOOTH_CHP_EN, IOPORT_DIR_OUTPUT);
19513b8e9b1SMatthias Ringwald 	ioport_set_pin_level(BLUETOOTH_CHP_EN, IOPORT_PIN_LEVEL_HIGH);
19613b8e9b1SMatthias Ringwald 
19713b8e9b1SMatthias Ringwald 	// reset
19813b8e9b1SMatthias Ringwald 	ioport_set_pin_dir(BLUETOOTH_RESET, IOPORT_DIR_OUTPUT);
19913b8e9b1SMatthias Ringwald 	ioport_set_pin_level(BLUETOOTH_RESET, IOPORT_PIN_LEVEL_LOW);
20013b8e9b1SMatthias Ringwald 	mdelay(250);
20113b8e9b1SMatthias Ringwald 	ioport_set_pin_level(BLUETOOTH_RESET, IOPORT_PIN_LEVEL_HIGH);
20213b8e9b1SMatthias Ringwald 	mdelay(250);
20313b8e9b1SMatthias Ringwald 
20413b8e9b1SMatthias Ringwald 	/* Enable the peripheral clock in the PMC. */
20513b8e9b1SMatthias Ringwald 	sysclk_enable_peripheral_clock(BOARD_ID_USART);
20658a1b1bbSMatthias Ringwald 
20758a1b1bbSMatthias Ringwald 	// configure Bluetooth USART
20858a1b1bbSMatthias Ringwald 	const sam_usart_opt_t bluetooth_settings = {
20958a1b1bbSMatthias Ringwald 		115200,
21058a1b1bbSMatthias Ringwald 		US_MR_CHRL_8_BIT,
21158a1b1bbSMatthias Ringwald 		US_MR_PAR_NO,
21258a1b1bbSMatthias Ringwald 		US_MR_NBSTOP_1_BIT,
21358a1b1bbSMatthias Ringwald 		US_MR_CHMODE_NORMAL,
21458a1b1bbSMatthias Ringwald 		/* This field is only used in IrDA mode. */
21558a1b1bbSMatthias Ringwald 		0
21658a1b1bbSMatthias Ringwald 	};
21758a1b1bbSMatthias Ringwald 
21858a1b1bbSMatthias Ringwald 	/* Configure USART mode. */
219c267d18bSMatthias Ringwald 	simulate_flowcontrol = 0;
22013b8e9b1SMatthias Ringwald 	usart_init_rs232(BOARD_USART, &bluetooth_settings, sysclk_get_peripheral_hz());
221c267d18bSMatthias Ringwald 	// Set RTS = 0 (normal mode)
222c267d18bSMatthias Ringwald 	BOARD_USART->US_CR = US_CR_RTSEN;
22358a1b1bbSMatthias Ringwald 
22458a1b1bbSMatthias Ringwald 	/* Disable all the interrupts. */
22558a1b1bbSMatthias Ringwald 	usart_disable_interrupt(BOARD_USART, ALL_INTERRUPT_MASK);
22658a1b1bbSMatthias Ringwald 
22758a1b1bbSMatthias Ringwald 	/* Enable TX & RX function. */
22858a1b1bbSMatthias Ringwald 	usart_enable_tx(BOARD_USART);
22958a1b1bbSMatthias Ringwald 	usart_enable_rx(BOARD_USART);
23058a1b1bbSMatthias Ringwald 
23158a1b1bbSMatthias Ringwald 	/* Configure and enable interrupt of USART. */
23258a1b1bbSMatthias Ringwald 	NVIC_EnableIRQ(USART_IRQn);
23358a1b1bbSMatthias Ringwald 
23458a1b1bbSMatthias Ringwald #ifdef USE_XDMAC_FOR_USART
23558a1b1bbSMatthias Ringwald 
23658a1b1bbSMatthias Ringwald 	// setup XDMAC
23758a1b1bbSMatthias Ringwald 
23858a1b1bbSMatthias Ringwald 	/* Initialize and enable DMA controller */
23958a1b1bbSMatthias Ringwald 	pmc_enable_periph_clk(ID_XDMAC);
24058a1b1bbSMatthias Ringwald 
24158a1b1bbSMatthias Ringwald 	/* Enable XDMA interrupt */
24258a1b1bbSMatthias Ringwald 	NVIC_ClearPendingIRQ(XDMAC_IRQn);
24358a1b1bbSMatthias Ringwald 	NVIC_SetPriority( XDMAC_IRQn ,1);
24458a1b1bbSMatthias Ringwald 	NVIC_EnableIRQ(XDMAC_IRQn);
24558a1b1bbSMatthias Ringwald 
24658a1b1bbSMatthias Ringwald 	// Setup XDMA Channel for USART TX
24758a1b1bbSMatthias Ringwald 	xdmac_channel_set_destination_addr(XDMAC, XDMA_CH_UART_TX, (uint32_t)&BOARD_USART->US_THR);
24858a1b1bbSMatthias Ringwald 	xdmac_channel_set_config(XDMAC, XDMA_CH_UART_TX,
24958a1b1bbSMatthias Ringwald 		XDMAC_CC_TYPE_PER_TRAN |
25058a1b1bbSMatthias Ringwald 		XDMAC_CC_DSYNC_MEM2PER |
25158a1b1bbSMatthias Ringwald 		XDMAC_CC_MEMSET_NORMAL_MODE |
25258a1b1bbSMatthias Ringwald 		XDMAC_CC_MBSIZE_SINGLE |
25358a1b1bbSMatthias Ringwald 		XDMAC_CC_DWIDTH_BYTE |
25458a1b1bbSMatthias Ringwald 		XDMAC_CC_SIF_AHB_IF0 |
25558a1b1bbSMatthias Ringwald 		XDMAC_CC_DIF_AHB_IF1 |
25658a1b1bbSMatthias Ringwald 		XDMAC_CC_SAM_INCREMENTED_AM |
25758a1b1bbSMatthias Ringwald 		XDMAC_CC_DAM_FIXED_AM |
25858a1b1bbSMatthias Ringwald 		XDMAC_CC_CSIZE_CHK_1 |
25958a1b1bbSMatthias Ringwald 		XDMAC_CC_PERID(XDAMC_CHANNEL_HWID_USART0_TX)
26058a1b1bbSMatthias Ringwald 	);
26158a1b1bbSMatthias Ringwald 	xdmac_channel_set_descriptor_control(XDMAC, XDMA_CH_UART_TX, 0);
26258a1b1bbSMatthias Ringwald 	xdmac_channel_set_source_microblock_stride(XDMAC, XDMA_CH_UART_TX, 0);
26358a1b1bbSMatthias Ringwald 	xdmac_channel_set_destination_microblock_stride(XDMAC, XDMA_CH_UART_TX, 0);
26458a1b1bbSMatthias Ringwald 	xdmac_channel_set_datastride_mempattern(XDMAC, XDMA_CH_UART_TX, 0);
26558a1b1bbSMatthias Ringwald 	xdmac_channel_set_block_control(XDMAC, XDMA_CH_UART_TX, 0);
26658a1b1bbSMatthias Ringwald 	xdmac_enable_interrupt(XDMAC, XDMA_CH_UART_TX);
26758a1b1bbSMatthias Ringwald 	xdmac_channel_enable_interrupt(XDMAC, XDMA_CH_UART_TX, XDMAC_CIE_BIE);
26858a1b1bbSMatthias Ringwald 
26958a1b1bbSMatthias Ringwald 	// Setup XDMA Channel for USART RX
27058a1b1bbSMatthias Ringwald 	xdmac_channel_set_source_addr(XDMAC, XDMA_CH_UART_RX, (uint32_t)&BOARD_USART->US_RHR);
27158a1b1bbSMatthias Ringwald 	xdmac_channel_set_config(XDMAC, XDMA_CH_UART_RX,
27258a1b1bbSMatthias Ringwald 		XDMAC_CC_TYPE_PER_TRAN |
27358a1b1bbSMatthias Ringwald 		XDMAC_CC_DSYNC_PER2MEM |
27458a1b1bbSMatthias Ringwald 		XDMAC_CC_MEMSET_NORMAL_MODE |
27558a1b1bbSMatthias Ringwald 		XDMAC_CC_MBSIZE_SINGLE |
27658a1b1bbSMatthias Ringwald 		XDMAC_CC_DWIDTH_BYTE |
27758a1b1bbSMatthias Ringwald 		XDMAC_CC_SIF_AHB_IF1 |
27858a1b1bbSMatthias Ringwald 		XDMAC_CC_DIF_AHB_IF0 |
27958a1b1bbSMatthias Ringwald 		XDMAC_CC_SAM_FIXED_AM |
28058a1b1bbSMatthias Ringwald 		XDMAC_CC_DAM_INCREMENTED_AM |
28158a1b1bbSMatthias Ringwald 		XDMAC_CC_CSIZE_CHK_1 |
28258a1b1bbSMatthias Ringwald 		XDMAC_CC_PERID(XDAMC_CHANNEL_HWID_USART0_RX)
28358a1b1bbSMatthias Ringwald 	);
28458a1b1bbSMatthias Ringwald 	xdmac_channel_set_descriptor_control(XDMAC, XDMA_CH_UART_RX, 0);
28558a1b1bbSMatthias Ringwald 	xdmac_channel_set_source_microblock_stride(XDMAC, XDMA_CH_UART_RX, 0);
28658a1b1bbSMatthias Ringwald 	xdmac_channel_set_destination_microblock_stride(XDMAC, XDMA_CH_UART_RX, 0);
28758a1b1bbSMatthias Ringwald 	xdmac_channel_set_datastride_mempattern(XDMAC, XDMA_CH_UART_RX, 0);
28858a1b1bbSMatthias Ringwald 	xdmac_channel_set_block_control(XDMAC, XDMA_CH_UART_RX, 0);
28958a1b1bbSMatthias Ringwald 	xdmac_enable_interrupt(XDMAC, XDMA_CH_UART_RX);
29058a1b1bbSMatthias Ringwald 	xdmac_channel_enable_interrupt(XDMAC, XDMA_CH_UART_RX, XDMAC_CIE_BIE);
29158a1b1bbSMatthias Ringwald #endif
29258a1b1bbSMatthias Ringwald }
29358a1b1bbSMatthias Ringwald 
29458a1b1bbSMatthias Ringwald void hal_uart_dma_set_sleep(uint8_t sleep){
29558a1b1bbSMatthias Ringwald }
29658a1b1bbSMatthias Ringwald 
29758a1b1bbSMatthias Ringwald void hal_uart_dma_set_block_received( void (*the_block_handler)(void)){
29858a1b1bbSMatthias Ringwald 	rx_done_handler = the_block_handler;
29958a1b1bbSMatthias Ringwald }
30058a1b1bbSMatthias Ringwald 
30158a1b1bbSMatthias Ringwald void hal_uart_dma_set_block_sent( void (*the_block_handler)(void)){
30258a1b1bbSMatthias Ringwald 	tx_done_handler = the_block_handler;
30358a1b1bbSMatthias Ringwald }
30458a1b1bbSMatthias Ringwald 
30558a1b1bbSMatthias Ringwald void hal_uart_dma_set_csr_irq_handler( void (*the_irq_handler)(void)){
30658a1b1bbSMatthias Ringwald 	cts_irq_handler = the_irq_handler;
30758a1b1bbSMatthias Ringwald }
30858a1b1bbSMatthias Ringwald 
30958a1b1bbSMatthias Ringwald int  hal_uart_dma_set_baud(uint32_t baud){
31058a1b1bbSMatthias Ringwald 	/* Disable TX & RX function. */
31158a1b1bbSMatthias Ringwald 	usart_disable_tx(BOARD_USART);
31258a1b1bbSMatthias Ringwald 	usart_disable_rx(BOARD_USART);
31358a1b1bbSMatthias Ringwald 	uint32_t res = usart_set_async_baudrate(BOARD_USART, baud, sysclk_get_peripheral_hz());
31458a1b1bbSMatthias Ringwald 	if (res){
31558a1b1bbSMatthias Ringwald 		log_error("hal_uart_dma_set_baud library call failed");
31658a1b1bbSMatthias Ringwald 	}
31758a1b1bbSMatthias Ringwald 
31858a1b1bbSMatthias Ringwald 	/* Enable TX & RX function. */
31958a1b1bbSMatthias Ringwald 	usart_enable_tx(BOARD_USART);
32058a1b1bbSMatthias Ringwald 	usart_enable_rx(BOARD_USART);
32158a1b1bbSMatthias Ringwald 
32213b8e9b1SMatthias Ringwald 	log_info("set baud rate %u", (int) baud);
32313b8e9b1SMatthias Ringwald 	return 0;
32413b8e9b1SMatthias Ringwald }
32558a1b1bbSMatthias Ringwald 
326c267d18bSMatthias Ringwald int  hal_uart_dma_set_flowcontrol(int flowcontrol){
327cb9ff2fbSMatthias Ringwald 	log_info("hal_uart_dma_set_flowcontrol %u", flowcontrol);
328c267d18bSMatthias Ringwald 	simulate_flowcontrol = flowcontrol;
329c267d18bSMatthias Ringwald 	if (flowcontrol){
330c267d18bSMatthias Ringwald 		/* Set hardware handshaking mode. */
331c267d18bSMatthias Ringwald 		BOARD_USART->US_MR = (BOARD_USART->US_MR & ~US_MR_USART_MODE_Msk) | US_MR_USART_MODE_HW_HANDSHAKING;
332cb9ff2fbSMatthias Ringwald 		hal_uart_rts_high();
333c267d18bSMatthias Ringwald 	} else {
334c267d18bSMatthias Ringwald 		/* Set nomal mode. */
335c267d18bSMatthias Ringwald 		BOARD_USART->US_MR = (BOARD_USART->US_MR & ~US_MR_USART_MODE_Msk) | US_MR_USART_MODE_NORMAL;
336c267d18bSMatthias Ringwald 		// Set RTS = 0 (normal mode)
337c267d18bSMatthias Ringwald 		BOARD_USART->US_CR = US_CR_RTSEN;
338c267d18bSMatthias Ringwald 	}
33958a1b1bbSMatthias Ringwald 	return 0;
34058a1b1bbSMatthias Ringwald }
34158a1b1bbSMatthias Ringwald 
34258a1b1bbSMatthias Ringwald void hal_uart_dma_send_block(const uint8_t *data, uint16_t size){
34367422dbdSMatthias Ringwald 
34467422dbdSMatthias Ringwald 	tx_notify = 1;
34567422dbdSMatthias Ringwald 
34658a1b1bbSMatthias Ringwald #ifdef USE_XDMAC_FOR_USART
34758a1b1bbSMatthias Ringwald 	xdmac_channel_get_interrupt_status( XDMAC, XDMA_CH_UART_TX);
34858a1b1bbSMatthias Ringwald 	xdmac_channel_set_source_addr(XDMAC, XDMA_CH_UART_TX, (uint32_t)data);
34958a1b1bbSMatthias Ringwald 	xdmac_channel_set_microblock_control(XDMAC, XDMA_CH_UART_TX, size);
35058a1b1bbSMatthias Ringwald 	xdmac_channel_enable(XDMAC, XDMA_CH_UART_TX);
35158a1b1bbSMatthias Ringwald #else
35267422dbdSMatthias Ringwald 	if (bytes_to_write){
35367422dbdSMatthias Ringwald 		log_error("send block, bytes to write %u", bytes_to_write);
35467422dbdSMatthias Ringwald 		return;
35567422dbdSMatthias Ringwald 	}
35658a1b1bbSMatthias Ringwald     tx_buffer_ptr = (uint8_t *) data;
35758a1b1bbSMatthias Ringwald     bytes_to_write = size;
35858a1b1bbSMatthias Ringwald 	usart_enable_interrupt(BOARD_USART, US_IER_TXRDY);
35958a1b1bbSMatthias Ringwald #endif
36058a1b1bbSMatthias Ringwald }
36158a1b1bbSMatthias Ringwald 
36258a1b1bbSMatthias Ringwald void hal_uart_dma_receive_block(uint8_t *data, uint16_t size){
36358a1b1bbSMatthias Ringwald 
364cb9ff2fbSMatthias Ringwald #ifdef DEBUG_PIN_1
365cb9ff2fbSMatthias Ringwald 	ioport_set_pin_level(DEBUG_PIN_1, IOPORT_PIN_LEVEL_HIGH);
366cb9ff2fbSMatthias Ringwald #endif
367cb9ff2fbSMatthias Ringwald 
36858a1b1bbSMatthias Ringwald 	hal_uart_rts_low();
36958a1b1bbSMatthias Ringwald 
370cb9ff2fbSMatthias Ringwald 	rx_notify = 1;
371cb9ff2fbSMatthias Ringwald 
37258a1b1bbSMatthias Ringwald #ifdef USE_XDMAC_FOR_USART
37358a1b1bbSMatthias Ringwald 	xdmac_channel_get_interrupt_status( XDMAC, XDMA_CH_UART_RX);
37458a1b1bbSMatthias Ringwald 	xdmac_channel_set_destination_addr(XDMAC, XDMA_CH_UART_RX, (uint32_t)data);
37558a1b1bbSMatthias Ringwald 	xdmac_channel_set_microblock_control(XDMAC, XDMA_CH_UART_RX, size);
37658a1b1bbSMatthias Ringwald 	xdmac_channel_enable(XDMAC, XDMA_CH_UART_RX);
37758a1b1bbSMatthias Ringwald #else
37858a1b1bbSMatthias Ringwald     rx_buffer_ptr = data;
37958a1b1bbSMatthias Ringwald     bytes_to_read = size;
38058a1b1bbSMatthias Ringwald     usart_enable_interrupt(BOARD_USART, US_IER_RXRDY);
38158a1b1bbSMatthias Ringwald #endif
38258a1b1bbSMatthias Ringwald }
38358a1b1bbSMatthias Ringwald 
38458a1b1bbSMatthias Ringwald #ifdef USE_XDMAC_FOR_USART
38558a1b1bbSMatthias Ringwald void XDMAC_Handler(void)
38658a1b1bbSMatthias Ringwald {
38758a1b1bbSMatthias Ringwald 	uint32_t dma_status;
38858a1b1bbSMatthias Ringwald 	dma_status = xdmac_channel_get_interrupt_status(XDMAC, XDMA_CH_UART_TX);
38958a1b1bbSMatthias Ringwald 	if (dma_status & XDMAC_CIS_BIS) {
39067422dbdSMatthias Ringwald 		if (tx_notify){
39167422dbdSMatthias Ringwald 			tx_notify = 0;
39258a1b1bbSMatthias Ringwald 			tx_done_handler();
39358a1b1bbSMatthias Ringwald 		}
39467422dbdSMatthias Ringwald 	}
39558a1b1bbSMatthias Ringwald 	dma_status = xdmac_channel_get_interrupt_status(XDMAC, XDMA_CH_UART_RX);
39658a1b1bbSMatthias Ringwald 	if (dma_status & XDMAC_CIS_BIS) {
39758a1b1bbSMatthias Ringwald 		hal_uart_rts_high();
398cb9ff2fbSMatthias Ringwald 		if (rx_notify){
399cb9ff2fbSMatthias Ringwald 			rx_notify = 0;
40058a1b1bbSMatthias Ringwald 			rx_done_handler();
40158a1b1bbSMatthias Ringwald 		}
40258a1b1bbSMatthias Ringwald 	}
403cb9ff2fbSMatthias Ringwald }
40458a1b1bbSMatthias Ringwald #else
40558a1b1bbSMatthias Ringwald void USART_Handler(void)
40658a1b1bbSMatthias Ringwald {
40767422dbdSMatthias Ringwald 
40867422dbdSMatthias Ringwald #ifdef DEBUG_PIN_2
409cb9ff2fbSMatthias Ringwald 	// ioport_set_pin_level(DEBUG_PIN_2, IOPORT_PIN_LEVEL_HIGH);
41067422dbdSMatthias Ringwald #endif
41158a1b1bbSMatthias Ringwald 
41258a1b1bbSMatthias Ringwald 	/* Read USART status. */
41367422dbdSMatthias Ringwald 	uint32_t ul_status = usart_get_status(BOARD_USART);
41458a1b1bbSMatthias Ringwald 
41558a1b1bbSMatthias Ringwald 	// handle ready to send
41658a1b1bbSMatthias Ringwald 	if(ul_status & US_IER_TXRDY) {
41758a1b1bbSMatthias Ringwald 		if (bytes_to_write){
41858a1b1bbSMatthias Ringwald 			// send next byte
41958a1b1bbSMatthias Ringwald 			usart_write(BOARD_USART, *tx_buffer_ptr);
42058a1b1bbSMatthias Ringwald 			tx_buffer_ptr++;
42158a1b1bbSMatthias Ringwald 			bytes_to_write--;
42258a1b1bbSMatthias Ringwald 		} else {
42367422dbdSMatthias Ringwald 
42458a1b1bbSMatthias Ringwald 			// done. disable tx ready interrupt to avoid starvation here
42558a1b1bbSMatthias Ringwald 			usart_disable_interrupt(BOARD_USART, US_IER_TXRDY);
42667422dbdSMatthias Ringwald 			if (tx_notify){
42767422dbdSMatthias Ringwald 				tx_notify = 0;
42858a1b1bbSMatthias Ringwald 				tx_done_handler();
42958a1b1bbSMatthias Ringwald 			}
43058a1b1bbSMatthias Ringwald 		}
43167422dbdSMatthias Ringwald 	}
43258a1b1bbSMatthias Ringwald 
43358a1b1bbSMatthias Ringwald 	// handle byte available for read
43458a1b1bbSMatthias Ringwald 	if (ul_status & US_IER_RXRDY) {
4355c5e4857SMatthias Ringwald 		if (bytes_to_read){
43658a1b1bbSMatthias Ringwald 			uint32_t ch;
43758a1b1bbSMatthias Ringwald 			usart_read(BOARD_USART, (uint32_t *)&ch);
43858a1b1bbSMatthias Ringwald 			*rx_buffer_ptr++ = ch;
43958a1b1bbSMatthias Ringwald 			bytes_to_read--;
44058a1b1bbSMatthias Ringwald 			if (bytes_to_read == 0){
441cb9ff2fbSMatthias Ringwald 
442cb9ff2fbSMatthias Ringwald #ifdef DEBUG_PIN_1
443cb9ff2fbSMatthias Ringwald 			ioport_set_pin_level(DEBUG_PIN_1, IOPORT_PIN_LEVEL_LOW);
444cb9ff2fbSMatthias Ringwald #endif
445cb9ff2fbSMatthias Ringwald 
44658a1b1bbSMatthias Ringwald 				// done. disable rx ready interrupt, raise RTS
44758a1b1bbSMatthias Ringwald 				hal_uart_rts_high();
44858a1b1bbSMatthias Ringwald 				usart_disable_interrupt(BOARD_USART, US_IER_RXRDY);
449cb9ff2fbSMatthias Ringwald 				if (rx_notify){
450cb9ff2fbSMatthias Ringwald 					rx_notify = 0;
45158a1b1bbSMatthias Ringwald 					rx_done_handler();
45258a1b1bbSMatthias Ringwald 				}
453cb9ff2fbSMatthias Ringwald 			}
4545c5e4857SMatthias Ringwald 		} else {
4555c5e4857SMatthias Ringwald 			// shoult not happen, disable irq anyway
4565c5e4857SMatthias Ringwald 			usart_disable_interrupt(BOARD_USART, US_IER_RXRDY);
4575c5e4857SMatthias Ringwald 		}
45858a1b1bbSMatthias Ringwald 	}
45967422dbdSMatthias Ringwald #ifdef DEBUG_PIN_2
460cb9ff2fbSMatthias Ringwald 	// ioport_set_pin_level(DEBUG_PIN_2, IOPORT_PIN_LEVEL_LOW);
46167422dbdSMatthias Ringwald #endif
46267422dbdSMatthias Ringwald 
46358a1b1bbSMatthias Ringwald }
46458a1b1bbSMatthias Ringwald #endif
46558a1b1bbSMatthias Ringwald 
46658a1b1bbSMatthias Ringwald void hal_tick_init()
46758a1b1bbSMatthias Ringwald {
46858a1b1bbSMatthias Ringwald 	/* Configure systick for 1 ms */
46958a1b1bbSMatthias Ringwald 	puts("Configure system tick to get 1ms tick period.\r");
47058a1b1bbSMatthias Ringwald 	if (SysTick_Config(sysclk_get_cpu_hz() / 1000)) {
47158a1b1bbSMatthias Ringwald 		puts("-F- Systick configuration error\r");
47258a1b1bbSMatthias Ringwald 		while (1);
47358a1b1bbSMatthias Ringwald 	}
47458a1b1bbSMatthias Ringwald }
47558a1b1bbSMatthias Ringwald 
47658a1b1bbSMatthias Ringwald void hal_tick_set_handler(void (*handler)(void)){
47758a1b1bbSMatthias Ringwald 	if (handler == NULL){
47858a1b1bbSMatthias Ringwald 		tick_handler = &dummy_handler;
47958a1b1bbSMatthias Ringwald 		return;
48058a1b1bbSMatthias Ringwald 	}
48158a1b1bbSMatthias Ringwald 	tick_handler = handler;
48258a1b1bbSMatthias Ringwald }
48358a1b1bbSMatthias Ringwald 
48458a1b1bbSMatthias Ringwald int  hal_tick_get_tick_period_in_ms(void){
48558a1b1bbSMatthias Ringwald 	return 1;
48658a1b1bbSMatthias Ringwald }
48758a1b1bbSMatthias Ringwald 
48813b8e9b1SMatthias Ringwald static const btstack_uart_block_t * uart_driver;
48913b8e9b1SMatthias Ringwald 
49013b8e9b1SMatthias Ringwald static void phase2(int status){
49113b8e9b1SMatthias Ringwald 
49213b8e9b1SMatthias Ringwald     if (status){
49313b8e9b1SMatthias Ringwald         printf("Download firmware failed\n");
49413b8e9b1SMatthias Ringwald         return;
49513b8e9b1SMatthias Ringwald     }
49613b8e9b1SMatthias Ringwald 
49713b8e9b1SMatthias Ringwald     printf("Phase 2: Main app\n");
49813b8e9b1SMatthias Ringwald 
49913b8e9b1SMatthias Ringwald     // init HCI
50013b8e9b1SMatthias Ringwald     const hci_transport_t * transport = hci_transport_h4_instance(uart_driver);
50113b8e9b1SMatthias Ringwald     // const btstack_link_key_db_t * link_key_db = btstack_link_key_db_fs_instance();
50213b8e9b1SMatthias Ringwald     hci_init(transport, (void*) &transport_config);
50313b8e9b1SMatthias Ringwald     hci_set_chipset(btstack_chipset_atwilc3000_instance());
50413b8e9b1SMatthias Ringwald     // hci_set_link_key_db(link_key_db);
50513b8e9b1SMatthias Ringwald 
50613b8e9b1SMatthias Ringwald     // setup app
50713b8e9b1SMatthias Ringwald     btstack_main(0, NULL);
50813b8e9b1SMatthias Ringwald }
50958a1b1bbSMatthias Ringwald 
5101b2596b5SMatthias Ringwald /**
5111b2596b5SMatthias Ringwald  *  \brief getting-started Application entry point.
5121b2596b5SMatthias Ringwald  *
5131b2596b5SMatthias Ringwald  *  \return Unused (ANSI-C compatibility).
5141b2596b5SMatthias Ringwald  */
5151b2596b5SMatthias Ringwald // [main]
5161b2596b5SMatthias Ringwald int main(void)
5171b2596b5SMatthias Ringwald {
5181b2596b5SMatthias Ringwald 	/* Initialize the SAM system */
5191b2596b5SMatthias Ringwald 	sysclk_init();
5201b2596b5SMatthias Ringwald 	board_init();
5211b2596b5SMatthias Ringwald 
5221b2596b5SMatthias Ringwald 	/* Initialize the console uart */
5231b2596b5SMatthias Ringwald 	configure_console();
5241b2596b5SMatthias Ringwald 
52513b8e9b1SMatthias Ringwald 	/* Output boot info */
52613b8e9b1SMatthias Ringwald 	printf("BTstack on SAMV71 Xplained Ultra with ATWILC3000\n");
52758a1b1bbSMatthias Ringwald 	printf("CPU %lu hz, peripheral clock %lu hz\n", sysclk_get_cpu_hz(), sysclk_get_peripheral_hz());
52813b8e9b1SMatthias Ringwald #ifdef USE_XDMAC_FOR_USART
52913b8e9b1SMatthias Ringwald 	printf("Using XDMA for Bluetooth UART\n");
53013b8e9b1SMatthias Ringwald #else
53113b8e9b1SMatthias Ringwald 	printf("Using IRQ driver for Bluetooth UART\n");
53213b8e9b1SMatthias Ringwald #endif
53313b8e9b1SMatthias Ringwald 	printf("--\n");
53458a1b1bbSMatthias Ringwald 
53558a1b1bbSMatthias Ringwald 	// start with BTstack init - especially configure HCI Transport
53658a1b1bbSMatthias Ringwald 	btstack_memory_init();
53758a1b1bbSMatthias Ringwald 	btstack_run_loop_init(btstack_run_loop_embedded_get_instance());
53858a1b1bbSMatthias Ringwald 
53958a1b1bbSMatthias Ringwald 	// enable full log output while porting
54013b8e9b1SMatthias Ringwald 	hci_dump_open(NULL, HCI_DUMP_STDOUT);
54158a1b1bbSMatthias Ringwald 
54213b8e9b1SMatthias Ringwald 	// setup UART HAL + Run Loop integration
54313b8e9b1SMatthias Ringwald 	uart_driver = btstack_uart_block_embedded_instance();
54458a1b1bbSMatthias Ringwald 
545*6e0d5aedSMatthias Ringwald     // extract UART config from transport config, but disable flow control and use default baudrate
546*6e0d5aedSMatthias Ringwald     uart_config.baudrate    = HCI_DEFAULT_BAUDRATE;
54713b8e9b1SMatthias Ringwald     uart_config.flowcontrol = 0;
54813b8e9b1SMatthias Ringwald     uart_config.device_name = transport_config.device_name;
54913b8e9b1SMatthias Ringwald     uart_driver->init(&uart_config);
55058a1b1bbSMatthias Ringwald 
55113b8e9b1SMatthias Ringwald     // phase #1 download firmware
55213b8e9b1SMatthias Ringwald     printf("Phase 1: Download firmware\n");
55313b8e9b1SMatthias Ringwald 
55413b8e9b1SMatthias Ringwald     // phase #2 start main app
555*6e0d5aedSMatthias Ringwald     btstack_chipset_atwilc3000_download_firmware(uart_driver, transport_config.baudrate_init, transport_config.flowcontrol, atwilc3000_fw_data, atwilc3000_fw_size, &phase2);
55658a1b1bbSMatthias Ringwald 
55758a1b1bbSMatthias Ringwald 	// go
55858a1b1bbSMatthias Ringwald 	btstack_run_loop_execute();
55958a1b1bbSMatthias Ringwald 
56058a1b1bbSMatthias Ringwald 	// compiler happy
5611b2596b5SMatthias Ringwald 	while(1);
5621b2596b5SMatthias Ringwald }
5631b2596b5SMatthias Ringwald #ifdef __cplusplus
5641b2596b5SMatthias Ringwald }
5651b2596b5SMatthias Ringwald #endif
566