1*1b2596b5SMatthias Ringwald /** 2*1b2596b5SMatthias Ringwald * \file 3*1b2596b5SMatthias Ringwald * 4*1b2596b5SMatthias Ringwald * \brief Parallel Input/Output (PIO) Controller driver for SAM. 5*1b2596b5SMatthias Ringwald * 6*1b2596b5SMatthias Ringwald * Copyright (c) 2011-2015 Atmel Corporation. All rights reserved. 7*1b2596b5SMatthias Ringwald * 8*1b2596b5SMatthias Ringwald * \asf_license_start 9*1b2596b5SMatthias Ringwald * 10*1b2596b5SMatthias Ringwald * \page License 11*1b2596b5SMatthias Ringwald * 12*1b2596b5SMatthias Ringwald * Redistribution and use in source and binary forms, with or without 13*1b2596b5SMatthias Ringwald * modification, are permitted provided that the following conditions are met: 14*1b2596b5SMatthias Ringwald * 15*1b2596b5SMatthias Ringwald * 1. Redistributions of source code must retain the above copyright notice, 16*1b2596b5SMatthias Ringwald * this list of conditions and the following disclaimer. 17*1b2596b5SMatthias Ringwald * 18*1b2596b5SMatthias Ringwald * 2. Redistributions in binary form must reproduce the above copyright notice, 19*1b2596b5SMatthias Ringwald * this list of conditions and the following disclaimer in the documentation 20*1b2596b5SMatthias Ringwald * and/or other materials provided with the distribution. 21*1b2596b5SMatthias Ringwald * 22*1b2596b5SMatthias Ringwald * 3. The name of Atmel may not be used to endorse or promote products derived 23*1b2596b5SMatthias Ringwald * from this software without specific prior written permission. 24*1b2596b5SMatthias Ringwald * 25*1b2596b5SMatthias Ringwald * 4. This software may only be redistributed and used in connection with an 26*1b2596b5SMatthias Ringwald * Atmel microcontroller product. 27*1b2596b5SMatthias Ringwald * 28*1b2596b5SMatthias Ringwald * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED 29*1b2596b5SMatthias Ringwald * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 30*1b2596b5SMatthias Ringwald * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE 31*1b2596b5SMatthias Ringwald * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR 32*1b2596b5SMatthias Ringwald * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33*1b2596b5SMatthias Ringwald * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 34*1b2596b5SMatthias Ringwald * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 35*1b2596b5SMatthias Ringwald * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 36*1b2596b5SMatthias Ringwald * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 37*1b2596b5SMatthias Ringwald * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38*1b2596b5SMatthias Ringwald * POSSIBILITY OF SUCH DAMAGE. 39*1b2596b5SMatthias Ringwald * 40*1b2596b5SMatthias Ringwald * \asf_license_stop 41*1b2596b5SMatthias Ringwald * 42*1b2596b5SMatthias Ringwald */ 43*1b2596b5SMatthias Ringwald /* 44*1b2596b5SMatthias Ringwald * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a> 45*1b2596b5SMatthias Ringwald */ 46*1b2596b5SMatthias Ringwald 47*1b2596b5SMatthias Ringwald #ifndef PIO_H_INCLUDED 48*1b2596b5SMatthias Ringwald #define PIO_H_INCLUDED 49*1b2596b5SMatthias Ringwald 50*1b2596b5SMatthias Ringwald #include "compiler.h" 51*1b2596b5SMatthias Ringwald 52*1b2596b5SMatthias Ringwald #ifdef __cplusplus 53*1b2596b5SMatthias Ringwald extern "C" { 54*1b2596b5SMatthias Ringwald #endif 55*1b2596b5SMatthias Ringwald 56*1b2596b5SMatthias Ringwald /* Compute PIO register length */ 57*1b2596b5SMatthias Ringwald #define PIO_DELTA ((uint32_t) PIOB - (uint32_t) PIOA) 58*1b2596b5SMatthias Ringwald 59*1b2596b5SMatthias Ringwald /* GPIO Support */ 60*1b2596b5SMatthias Ringwald #define PIO_TYPE_Pos 27 61*1b2596b5SMatthias Ringwald /* PIO Type Mask */ 62*1b2596b5SMatthias Ringwald #define PIO_TYPE_Msk (0xFu << PIO_TYPE_Pos) 63*1b2596b5SMatthias Ringwald /* The pin is not a function pin. */ 64*1b2596b5SMatthias Ringwald #define PIO_TYPE_NOT_A_PIN (0x0u << PIO_TYPE_Pos) 65*1b2596b5SMatthias Ringwald /* The pin is controlled by the peripheral A. */ 66*1b2596b5SMatthias Ringwald #define PIO_TYPE_PIO_PERIPH_A (0x1u << PIO_TYPE_Pos) 67*1b2596b5SMatthias Ringwald /* The pin is controlled by the peripheral B. */ 68*1b2596b5SMatthias Ringwald #define PIO_TYPE_PIO_PERIPH_B (0x2u << PIO_TYPE_Pos) 69*1b2596b5SMatthias Ringwald /* The pin is controlled by the peripheral C. */ 70*1b2596b5SMatthias Ringwald #define PIO_TYPE_PIO_PERIPH_C (0x3u << PIO_TYPE_Pos) 71*1b2596b5SMatthias Ringwald /* The pin is controlled by the peripheral D. */ 72*1b2596b5SMatthias Ringwald #define PIO_TYPE_PIO_PERIPH_D (0x4u << PIO_TYPE_Pos) 73*1b2596b5SMatthias Ringwald /* The pin is an input. */ 74*1b2596b5SMatthias Ringwald #define PIO_TYPE_PIO_INPUT (0x5u << PIO_TYPE_Pos) 75*1b2596b5SMatthias Ringwald /* The pin is an output and has a default level of 0. */ 76*1b2596b5SMatthias Ringwald #define PIO_TYPE_PIO_OUTPUT_0 (0x6u << PIO_TYPE_Pos) 77*1b2596b5SMatthias Ringwald /* The pin is an output and has a default level of 1. */ 78*1b2596b5SMatthias Ringwald #define PIO_TYPE_PIO_OUTPUT_1 (0x7u << PIO_TYPE_Pos) 79*1b2596b5SMatthias Ringwald 80*1b2596b5SMatthias Ringwald typedef enum _pio_type { 81*1b2596b5SMatthias Ringwald PIO_NOT_A_PIN = PIO_TYPE_NOT_A_PIN, 82*1b2596b5SMatthias Ringwald PIO_PERIPH_A = PIO_TYPE_PIO_PERIPH_A, 83*1b2596b5SMatthias Ringwald PIO_PERIPH_B = PIO_TYPE_PIO_PERIPH_B, 84*1b2596b5SMatthias Ringwald #if (SAM3S || SAM3N || SAM4S || SAM4E || SAM4N || SAM4C || SAM4CP || SAM4CM || SAMV71 || SAMV70 || SAME70 || SAMS70) 85*1b2596b5SMatthias Ringwald PIO_PERIPH_C = PIO_TYPE_PIO_PERIPH_C, 86*1b2596b5SMatthias Ringwald PIO_PERIPH_D = PIO_TYPE_PIO_PERIPH_D, 87*1b2596b5SMatthias Ringwald #endif 88*1b2596b5SMatthias Ringwald PIO_INPUT = PIO_TYPE_PIO_INPUT, 89*1b2596b5SMatthias Ringwald PIO_OUTPUT_0 = PIO_TYPE_PIO_OUTPUT_0, 90*1b2596b5SMatthias Ringwald PIO_OUTPUT_1 = PIO_TYPE_PIO_OUTPUT_1 91*1b2596b5SMatthias Ringwald } pio_type_t; 92*1b2596b5SMatthias Ringwald 93*1b2596b5SMatthias Ringwald /* Default pin configuration (no attribute). */ 94*1b2596b5SMatthias Ringwald #define PIO_DEFAULT (0u << 0) 95*1b2596b5SMatthias Ringwald /* The internal pin pull-up is active. */ 96*1b2596b5SMatthias Ringwald #define PIO_PULLUP (1u << 0) 97*1b2596b5SMatthias Ringwald /* The internal glitch filter is active. */ 98*1b2596b5SMatthias Ringwald #define PIO_DEGLITCH (1u << 1) 99*1b2596b5SMatthias Ringwald /* The pin is open-drain. */ 100*1b2596b5SMatthias Ringwald #define PIO_OPENDRAIN (1u << 2) 101*1b2596b5SMatthias Ringwald 102*1b2596b5SMatthias Ringwald /* The internal debouncing filter is active. */ 103*1b2596b5SMatthias Ringwald #define PIO_DEBOUNCE (1u << 3) 104*1b2596b5SMatthias Ringwald 105*1b2596b5SMatthias Ringwald /* Enable additional interrupt modes. */ 106*1b2596b5SMatthias Ringwald #define PIO_IT_AIME (1u << 4) 107*1b2596b5SMatthias Ringwald 108*1b2596b5SMatthias Ringwald /* Interrupt High Level/Rising Edge detection is active. */ 109*1b2596b5SMatthias Ringwald #define PIO_IT_RE_OR_HL (1u << 5) 110*1b2596b5SMatthias Ringwald /* Interrupt Edge detection is active. */ 111*1b2596b5SMatthias Ringwald #define PIO_IT_EDGE (1u << 6) 112*1b2596b5SMatthias Ringwald 113*1b2596b5SMatthias Ringwald /* Low level interrupt is active */ 114*1b2596b5SMatthias Ringwald #define PIO_IT_LOW_LEVEL (0 | 0 | PIO_IT_AIME) 115*1b2596b5SMatthias Ringwald /* High level interrupt is active */ 116*1b2596b5SMatthias Ringwald #define PIO_IT_HIGH_LEVEL (PIO_IT_RE_OR_HL | 0 | PIO_IT_AIME) 117*1b2596b5SMatthias Ringwald /* Falling edge interrupt is active */ 118*1b2596b5SMatthias Ringwald #define PIO_IT_FALL_EDGE (0 | PIO_IT_EDGE | PIO_IT_AIME) 119*1b2596b5SMatthias Ringwald /* Rising edge interrupt is active */ 120*1b2596b5SMatthias Ringwald #define PIO_IT_RISE_EDGE (PIO_IT_RE_OR_HL | PIO_IT_EDGE | PIO_IT_AIME) 121*1b2596b5SMatthias Ringwald 122*1b2596b5SMatthias Ringwald /* 123*1b2596b5SMatthias Ringwald * The #attribute# field is a bitmask that can either be set to PIO_DEFAULT, 124*1b2596b5SMatthias Ringwald * or combine (using bitwise OR '|') any number of the following constants: 125*1b2596b5SMatthias Ringwald * - PIO_PULLUP 126*1b2596b5SMatthias Ringwald * - PIO_DEGLITCH 127*1b2596b5SMatthias Ringwald * - PIO_DEBOUNCE 128*1b2596b5SMatthias Ringwald * - PIO_OPENDRAIN 129*1b2596b5SMatthias Ringwald * - PIO_IT_LOW_LEVEL 130*1b2596b5SMatthias Ringwald * - PIO_IT_HIGH_LEVEL 131*1b2596b5SMatthias Ringwald * - PIO_IT_FALL_EDGE 132*1b2596b5SMatthias Ringwald * - PIO_IT_RISE_EDGE 133*1b2596b5SMatthias Ringwald */ 134*1b2596b5SMatthias Ringwald void pio_pull_up(Pio *p_pio, const uint32_t ul_mask, 135*1b2596b5SMatthias Ringwald const uint32_t ul_pull_up_enable); 136*1b2596b5SMatthias Ringwald void pio_set_debounce_filter(Pio *p_pio, const uint32_t ul_mask, 137*1b2596b5SMatthias Ringwald const uint32_t ul_cut_off); 138*1b2596b5SMatthias Ringwald void pio_set(Pio *p_pio, const uint32_t ul_mask); 139*1b2596b5SMatthias Ringwald void pio_clear(Pio *p_pio, const uint32_t ul_mask); 140*1b2596b5SMatthias Ringwald uint32_t pio_get(Pio *p_pio, const pio_type_t ul_type, 141*1b2596b5SMatthias Ringwald const uint32_t ul_mask); 142*1b2596b5SMatthias Ringwald void pio_set_peripheral(Pio *p_pio, const pio_type_t ul_type, 143*1b2596b5SMatthias Ringwald const uint32_t ul_mask); 144*1b2596b5SMatthias Ringwald void pio_set_input(Pio *p_pio, const uint32_t ul_mask, 145*1b2596b5SMatthias Ringwald const uint32_t ul_attribute); 146*1b2596b5SMatthias Ringwald void pio_set_output(Pio *p_pio, const uint32_t ul_mask, 147*1b2596b5SMatthias Ringwald const uint32_t ul_default_level, 148*1b2596b5SMatthias Ringwald const uint32_t ul_multidrive_enable, 149*1b2596b5SMatthias Ringwald const uint32_t ul_pull_up_enable); 150*1b2596b5SMatthias Ringwald uint32_t pio_configure(Pio *p_pio, const pio_type_t ul_type, 151*1b2596b5SMatthias Ringwald const uint32_t ul_mask, const uint32_t ul_attribute); 152*1b2596b5SMatthias Ringwald uint32_t pio_get_output_data_status(const Pio *p_pio, 153*1b2596b5SMatthias Ringwald const uint32_t ul_mask); 154*1b2596b5SMatthias Ringwald void pio_set_multi_driver(Pio *p_pio, const uint32_t ul_mask, 155*1b2596b5SMatthias Ringwald const uint32_t ul_multi_driver_enable); 156*1b2596b5SMatthias Ringwald uint32_t pio_get_multi_driver_status(const Pio *p_pio); 157*1b2596b5SMatthias Ringwald 158*1b2596b5SMatthias Ringwald #if (SAM3S || SAM3N || SAM4S || SAM4E || SAM4N || SAM4C || SAMG || SAM4CP || SAM4CM || SAMV71 || SAMV70 || SAME70 || SAMS70) 159*1b2596b5SMatthias Ringwald void pio_pull_down(Pio *p_pio, const uint32_t ul_mask, 160*1b2596b5SMatthias Ringwald const uint32_t ul_pull_down_enable); 161*1b2596b5SMatthias Ringwald #endif 162*1b2596b5SMatthias Ringwald 163*1b2596b5SMatthias Ringwald void pio_enable_output_write(Pio *p_pio, const uint32_t ul_mask); 164*1b2596b5SMatthias Ringwald void pio_disable_output_write(Pio *p_pio, const uint32_t ul_mask); 165*1b2596b5SMatthias Ringwald uint32_t pio_get_output_write_status(const Pio *p_pio); 166*1b2596b5SMatthias Ringwald void pio_sync_output_write(Pio *p_pio, const uint32_t ul_mask); 167*1b2596b5SMatthias Ringwald 168*1b2596b5SMatthias Ringwald #if (SAM3S || SAM3N || SAM4S || SAM4E || SAM4N || SAM4C || SAMG || SAM4CP || SAM4CM || SAMV71 || SAMV70 || SAME70 || SAMS70) 169*1b2596b5SMatthias Ringwald void pio_set_schmitt_trigger(Pio *p_pio, const uint32_t ul_mask); 170*1b2596b5SMatthias Ringwald uint32_t pio_get_schmitt_trigger(const Pio *p_pio); 171*1b2596b5SMatthias Ringwald #endif 172*1b2596b5SMatthias Ringwald 173*1b2596b5SMatthias Ringwald void pio_configure_interrupt(Pio *p_pio, const uint32_t ul_mask, 174*1b2596b5SMatthias Ringwald const uint32_t ul_attr); 175*1b2596b5SMatthias Ringwald void pio_enable_interrupt(Pio *p_pio, const uint32_t ul_mask); 176*1b2596b5SMatthias Ringwald void pio_disable_interrupt(Pio *p_pio, const uint32_t ul_mask); 177*1b2596b5SMatthias Ringwald uint32_t pio_get_interrupt_status(const Pio *p_pio); 178*1b2596b5SMatthias Ringwald uint32_t pio_get_interrupt_mask(const Pio *p_pio); 179*1b2596b5SMatthias Ringwald void pio_set_additional_interrupt_mode(Pio *p_pio, 180*1b2596b5SMatthias Ringwald const uint32_t ul_mask, const uint32_t ul_attribute); 181*1b2596b5SMatthias Ringwald void pio_set_writeprotect(Pio *p_pio, const uint32_t ul_enable); 182*1b2596b5SMatthias Ringwald uint32_t pio_get_writeprotect_status(const Pio *p_pio); 183*1b2596b5SMatthias Ringwald 184*1b2596b5SMatthias Ringwald #if (SAM3S || SAM4S || SAM4E || SAMV71 || SAMV70 || SAME70 || SAMS70) 185*1b2596b5SMatthias Ringwald void pio_capture_set_mode(Pio *p_pio, uint32_t ul_mode); 186*1b2596b5SMatthias Ringwald void pio_capture_enable(Pio *p_pio); 187*1b2596b5SMatthias Ringwald void pio_capture_disable(Pio *p_pio); 188*1b2596b5SMatthias Ringwald uint32_t pio_capture_read(const Pio *p_pio, uint32_t * pul_data); 189*1b2596b5SMatthias Ringwald void pio_capture_enable_interrupt(Pio *p_pio, const uint32_t ul_mask); 190*1b2596b5SMatthias Ringwald void pio_capture_disable_interrupt(Pio * p_pio, const uint32_t ul_mask); 191*1b2596b5SMatthias Ringwald uint32_t pio_capture_get_interrupt_status(const Pio *p_pio); 192*1b2596b5SMatthias Ringwald uint32_t pio_capture_get_interrupt_mask(const Pio *p_pio); 193*1b2596b5SMatthias Ringwald #if !(SAMV71 || SAMV70 || SAME70 || SAMS70) 194*1b2596b5SMatthias Ringwald Pdc *pio_capture_get_pdc_base(const Pio *p_pio); 195*1b2596b5SMatthias Ringwald #endif 196*1b2596b5SMatthias Ringwald #endif 197*1b2596b5SMatthias Ringwald 198*1b2596b5SMatthias Ringwald /* GPIO Support */ 199*1b2596b5SMatthias Ringwald uint32_t pio_get_pin_value(uint32_t pin); 200*1b2596b5SMatthias Ringwald void pio_set_pin_high(uint32_t pin); 201*1b2596b5SMatthias Ringwald void pio_set_pin_low(uint32_t pin); 202*1b2596b5SMatthias Ringwald void pio_toggle_pin(uint32_t pin); 203*1b2596b5SMatthias Ringwald void pio_enable_pin_interrupt(uint32_t pin); 204*1b2596b5SMatthias Ringwald void pio_disable_pin_interrupt(uint32_t pin); 205*1b2596b5SMatthias Ringwald Pio *pio_get_pin_group(uint32_t pin); 206*1b2596b5SMatthias Ringwald uint32_t pio_get_pin_group_id(uint32_t pin); 207*1b2596b5SMatthias Ringwald uint32_t pio_get_pin_group_mask(uint32_t pin); 208*1b2596b5SMatthias Ringwald uint32_t pio_configure_pin(uint32_t ul_pin, const uint32_t ul_flags); 209*1b2596b5SMatthias Ringwald void pio_set_pin_group_high(Pio *p_pio, uint32_t ul_mask); 210*1b2596b5SMatthias Ringwald void pio_set_pin_group_low(Pio *p_pio, uint32_t ul_mask); 211*1b2596b5SMatthias Ringwald void pio_toggle_pin_group(Pio *p_pio, uint32_t ul_mask); 212*1b2596b5SMatthias Ringwald uint32_t pio_configure_pin_group(Pio *p_pio, uint32_t ul_mask, 213*1b2596b5SMatthias Ringwald const uint32_t ul_flags); 214*1b2596b5SMatthias Ringwald 215*1b2596b5SMatthias Ringwald #if (SAM4C || SAM4CP || SAM4CM || SAMG55) 216*1b2596b5SMatthias Ringwald enum pio_io_drive_mode { 217*1b2596b5SMatthias Ringwald PIO_IO_DRIVE_LOW = 0, 218*1b2596b5SMatthias Ringwald PIO_IO_DRIVE_HIGH, 219*1b2596b5SMatthias Ringwald }; 220*1b2596b5SMatthias Ringwald void pio_set_io_drive(Pio *p_pio, uint32_t ul_line, 221*1b2596b5SMatthias Ringwald enum pio_io_drive_mode mode); 222*1b2596b5SMatthias Ringwald #endif 223*1b2596b5SMatthias Ringwald 224*1b2596b5SMatthias Ringwald #if (SAMV71 || SAMV70 || SAME70 || SAMS70) 225*1b2596b5SMatthias Ringwald void pio_keypad_enable(Pio *p_pio); 226*1b2596b5SMatthias Ringwald void pio_keypad_disable(Pio *p_pio); 227*1b2596b5SMatthias Ringwald void pio_keypad_set_row_num(Pio *p_pio, uint8_t num); 228*1b2596b5SMatthias Ringwald uint8_t pio_keypad_get_row_num(const Pio *p_pio); 229*1b2596b5SMatthias Ringwald void pio_keypad_set_column_num(Pio *p_pio, uint8_t num); 230*1b2596b5SMatthias Ringwald uint8_t pio_keypad_get_column_num(const Pio *p_pio); 231*1b2596b5SMatthias Ringwald void pio_keypad_set_debouncing_value(Pio *p_pio, uint16_t value); 232*1b2596b5SMatthias Ringwald uint16_t pio_keypad_get_debouncing_value(const Pio *p_pio); 233*1b2596b5SMatthias Ringwald void pio_keypad_enable_interrupt(Pio *p_pio, uint32_t ul_mask); 234*1b2596b5SMatthias Ringwald void pio_keypad_disable_interrupt(Pio *p_pio, uint32_t ul_mask); 235*1b2596b5SMatthias Ringwald uint32_t pio_keypad_get_interrupt_mask(const Pio *p_pio); 236*1b2596b5SMatthias Ringwald uint32_t pio_keypad_get_press_status(const Pio *p_pio); 237*1b2596b5SMatthias Ringwald uint32_t pio_keypad_get_release_status(const Pio *p_pio); 238*1b2596b5SMatthias Ringwald uint8_t pio_keypad_get_simult_press_num(const Pio *p_pio); 239*1b2596b5SMatthias Ringwald uint8_t pio_keypad_get_simult_release_num(const Pio *p_pio); 240*1b2596b5SMatthias Ringwald uint8_t pio_keypad_get_press_row_index(const Pio *p_pio, uint8_t queue); 241*1b2596b5SMatthias Ringwald uint8_t pio_keypad_get_press_column_index(const Pio *p_pio, uint8_t queue); 242*1b2596b5SMatthias Ringwald uint8_t pio_keypad_get_release_row_index(const Pio *p_pio, uint8_t queue); 243*1b2596b5SMatthias Ringwald uint8_t pio_keypad_get_release_column_index(const Pio *p_pio, uint8_t queue); 244*1b2596b5SMatthias Ringwald #endif 245*1b2596b5SMatthias Ringwald /** 246*1b2596b5SMatthias Ringwald * \page sam_pio_quickstart Quick Start Guide for the SAM PIO driver 247*1b2596b5SMatthias Ringwald * 248*1b2596b5SMatthias Ringwald * This is the quick start guide for the \ref sam_drivers_pio_group "PIO Driver", 249*1b2596b5SMatthias Ringwald * with step-by-step instructions on how to configure and use the driver for 250*1b2596b5SMatthias Ringwald * specific use cases. 251*1b2596b5SMatthias Ringwald * 252*1b2596b5SMatthias Ringwald * The section described below can be compiled into e.g. the main application 253*1b2596b5SMatthias Ringwald * loop or any other function that will need to interface with the IO port. 254*1b2596b5SMatthias Ringwald * 255*1b2596b5SMatthias Ringwald * \section sam_pio_usecases PIO use cases 256*1b2596b5SMatthias Ringwald * - \ref sam_pio_quickstart_basic 257*1b2596b5SMatthias Ringwald * - \ref sam_pio_quickstart_use_case_2 258*1b2596b5SMatthias Ringwald * 259*1b2596b5SMatthias Ringwald * \section sam_pio_quickstart_basic Basic usage of the PIO driver 260*1b2596b5SMatthias Ringwald * This section will present a basic use case for the PIO driver. This use case 261*1b2596b5SMatthias Ringwald * will configure pin 23 on port A as output and pin 16 as an input with pullup, 262*1b2596b5SMatthias Ringwald * and then toggle the output pin's value to match that of the input pin. 263*1b2596b5SMatthias Ringwald * 264*1b2596b5SMatthias Ringwald * \subsection sam_pio_quickstart_use_case_1_prereq Prerequisites 265*1b2596b5SMatthias Ringwald * - \ref group_pmc "Power Management Controller driver" 266*1b2596b5SMatthias Ringwald * 267*1b2596b5SMatthias Ringwald * \subsection sam_pio_quickstart_use_case_1_setup_steps Initialization code 268*1b2596b5SMatthias Ringwald * Add to the application initialization code: 269*1b2596b5SMatthias Ringwald * \code 270*1b2596b5SMatthias Ringwald pmc_enable_periph_clk(ID_PIOA); 271*1b2596b5SMatthias Ringwald 272*1b2596b5SMatthias Ringwald pio_set_output(PIOA, PIO_PA23, LOW, DISABLE, ENABLE); 273*1b2596b5SMatthias Ringwald pio_set_input(PIOA, PIO_PA16, PIO_PULLUP); 274*1b2596b5SMatthias Ringwald \endcode 275*1b2596b5SMatthias Ringwald * 276*1b2596b5SMatthias Ringwald * \subsection sam_pio_quickstart_use_case_1_setup_steps_workflow Workflow 277*1b2596b5SMatthias Ringwald * -# Enable the module clock to the PIOA peripheral: 278*1b2596b5SMatthias Ringwald * \code pmc_enable_periph_clk(ID_PIOA); \endcode 279*1b2596b5SMatthias Ringwald * -# Set pin 23 direction on PIOA as output, default low level: 280*1b2596b5SMatthias Ringwald * \code pio_set_output(PIOA, PIO_PA23, LOW, DISABLE, ENABLE); \endcode 281*1b2596b5SMatthias Ringwald * -# Set pin 16 direction on PIOA as input, with pullup: 282*1b2596b5SMatthias Ringwald * \code pio_set_input(PIOA, PIO_PA16, PIO_PULLUP); \endcode 283*1b2596b5SMatthias Ringwald * 284*1b2596b5SMatthias Ringwald * \subsection sam_pio_quickstart_use_case_1_example_code Example code 285*1b2596b5SMatthias Ringwald * Set the state of output pin 23 to match input pin 16: 286*1b2596b5SMatthias Ringwald * \code 287*1b2596b5SMatthias Ringwald if (pio_get(PIOA, PIO_TYPE_PIO_INPUT, PIO_PA16)) 288*1b2596b5SMatthias Ringwald pio_clear(PIOA, PIO_PA23); 289*1b2596b5SMatthias Ringwald else 290*1b2596b5SMatthias Ringwald pio_set(PIOA, PIO_PA23); 291*1b2596b5SMatthias Ringwald \endcode 292*1b2596b5SMatthias Ringwald * 293*1b2596b5SMatthias Ringwald * \subsection sam_pio_quickstart_use_case_1_example_workflow Workflow 294*1b2596b5SMatthias Ringwald * -# We check the value of the pin: 295*1b2596b5SMatthias Ringwald * \code 296*1b2596b5SMatthias Ringwald if (pio_get(PIOA, PIO_TYPE_PIO_INPUT, PIO_PA16)) 297*1b2596b5SMatthias Ringwald \endcode 298*1b2596b5SMatthias Ringwald * -# Then we set the new output value based on the read pin value: 299*1b2596b5SMatthias Ringwald * \code 300*1b2596b5SMatthias Ringwald pio_clear(PIOA, PIO_PA23); 301*1b2596b5SMatthias Ringwald else 302*1b2596b5SMatthias Ringwald pio_set(PIOA, PIO_PA23); 303*1b2596b5SMatthias Ringwald \endcode 304*1b2596b5SMatthias Ringwald */ 305*1b2596b5SMatthias Ringwald 306*1b2596b5SMatthias Ringwald /** 307*1b2596b5SMatthias Ringwald * \page sam_pio_quickstart_use_case_2 Advanced use case - Interrupt driven edge detection 308*1b2596b5SMatthias Ringwald * 309*1b2596b5SMatthias Ringwald * \section sam_pio_quickstart_use_case_2 Advanced Use Case 1 310*1b2596b5SMatthias Ringwald * This section will present a more advanced use case for the PIO driver. This use case 311*1b2596b5SMatthias Ringwald * will configure pin 23 on port A as output and pin 16 as an input with pullup, 312*1b2596b5SMatthias Ringwald * and then toggle the output pin's value to match that of the input pin using the interrupt 313*1b2596b5SMatthias Ringwald * controller within the device. 314*1b2596b5SMatthias Ringwald * 315*1b2596b5SMatthias Ringwald * \subsection sam_pio_quickstart_use_case_2_prereq Prerequisites 316*1b2596b5SMatthias Ringwald * - \ref group_pmc "Power Management Controller driver" 317*1b2596b5SMatthias Ringwald * 318*1b2596b5SMatthias Ringwald * \subsection sam_pio_quickstart_use_case_2_setup_steps Initialization code 319*1b2596b5SMatthias Ringwald * Add to the application initialization code: 320*1b2596b5SMatthias Ringwald * \code 321*1b2596b5SMatthias Ringwald pmc_enable_periph_clk(ID_PIOA); 322*1b2596b5SMatthias Ringwald 323*1b2596b5SMatthias Ringwald pio_set_output(PIOA, PIO_PA23, LOW, DISABLE, ENABLE); 324*1b2596b5SMatthias Ringwald pio_set_input(PIOA, PIO_PA16, PIO_PULLUP); 325*1b2596b5SMatthias Ringwald 326*1b2596b5SMatthias Ringwald pio_handler_set(PIOA, ID_PIOA, PIO_PA16, PIO_IT_EDGE, pin_edge_handler); 327*1b2596b5SMatthias Ringwald pio_enable_interrupt(PIOA, PIO_PA16); 328*1b2596b5SMatthias Ringwald 329*1b2596b5SMatthias Ringwald NVIC_EnableIRQ(PIOA_IRQn); 330*1b2596b5SMatthias Ringwald \endcode 331*1b2596b5SMatthias Ringwald * 332*1b2596b5SMatthias Ringwald * \subsection sam_pio_quickstart_use_case_2_setup_steps_workflow Workflow 333*1b2596b5SMatthias Ringwald * -# Enable the module clock to the PIOA peripheral: 334*1b2596b5SMatthias Ringwald * \code pmc_enable_periph_clk(ID_PIOA); \endcode 335*1b2596b5SMatthias Ringwald * -# Set pin 23 direction on PIOA as output, default low level: 336*1b2596b5SMatthias Ringwald * \code pio_set_output(PIOA, PIO_PA23, LOW, DISABLE, ENABLE); \endcode 337*1b2596b5SMatthias Ringwald * -# Set pin 16 direction on PIOA as input, with pullup: 338*1b2596b5SMatthias Ringwald * \code pio_set_input(PIOA, PIO_PA16, PIO_PULLUP); \endcode 339*1b2596b5SMatthias Ringwald * -# Configure the input pin 16 interrupt mode and handler: 340*1b2596b5SMatthias Ringwald * \code pio_handler_set(PIOA, ID_PIOA, PIO_PA16, PIO_IT_EDGE, pin_edge_handler); \endcode 341*1b2596b5SMatthias Ringwald * -# Enable the interrupt for the configured input pin: 342*1b2596b5SMatthias Ringwald * \code pio_enable_interrupt(PIOA, PIO_PA16); \endcode 343*1b2596b5SMatthias Ringwald * -# Enable interrupt handling from the PIOA module: 344*1b2596b5SMatthias Ringwald * \code NVIC_EnableIRQ(PIOA_IRQn); \endcode 345*1b2596b5SMatthias Ringwald * 346*1b2596b5SMatthias Ringwald * \subsection sam_pio_quickstart_use_case_2_example_code Example code 347*1b2596b5SMatthias Ringwald * Add the following function to your application: 348*1b2596b5SMatthias Ringwald * \code 349*1b2596b5SMatthias Ringwald void pin_edge_handler(const uint32_t id, const uint32_t index) 350*1b2596b5SMatthias Ringwald { 351*1b2596b5SMatthias Ringwald if ((id == ID_PIOA) && (index == PIO_PA16)){ 352*1b2596b5SMatthias Ringwald if (pio_get(PIOA, PIO_TYPE_PIO_INPUT, PIO_PA16)) 353*1b2596b5SMatthias Ringwald pio_clear(PIOA, PIO_PA23); 354*1b2596b5SMatthias Ringwald else 355*1b2596b5SMatthias Ringwald pio_set(PIOA, PIO_PA23); 356*1b2596b5SMatthias Ringwald } 357*1b2596b5SMatthias Ringwald } 358*1b2596b5SMatthias Ringwald \endcode 359*1b2596b5SMatthias Ringwald * 360*1b2596b5SMatthias Ringwald * \subsection sam_pio_quickstart_use_case_2_example_workflow Workflow 361*1b2596b5SMatthias Ringwald * -# We check the value of the pin: 362*1b2596b5SMatthias Ringwald * \code 363*1b2596b5SMatthias Ringwald if (pio_get(PIOA, PIO_TYPE_PIO_INPUT, PIO_PA16)) 364*1b2596b5SMatthias Ringwald \endcode 365*1b2596b5SMatthias Ringwald * -# Then we set the new output value based on the read pin value: 366*1b2596b5SMatthias Ringwald * \code 367*1b2596b5SMatthias Ringwald pio_clear(PIOA, PIO_PA23); 368*1b2596b5SMatthias Ringwald else 369*1b2596b5SMatthias Ringwald pio_set(PIOA, PIO_PA23); 370*1b2596b5SMatthias Ringwald \endcode 371*1b2596b5SMatthias Ringwald */ 372*1b2596b5SMatthias Ringwald 373*1b2596b5SMatthias Ringwald #ifdef __cplusplus 374*1b2596b5SMatthias Ringwald } 375*1b2596b5SMatthias Ringwald #endif 376*1b2596b5SMatthias Ringwald 377*1b2596b5SMatthias Ringwald #endif /* PIO_H_INCLUDED */ 378