1 /** 2 * \file 3 * 4 * \brief Generic clock management 5 * 6 * Copyright (c) 2010-2015 Atmel Corporation. All rights reserved. 7 * 8 * \asf_license_start 9 * 10 * \page License 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions are met: 14 * 15 * 1. Redistributions of source code must retain the above copyright notice, 16 * this list of conditions and the following disclaimer. 17 * 18 * 2. Redistributions in binary form must reproduce the above copyright notice, 19 * this list of conditions and the following disclaimer in the documentation 20 * and/or other materials provided with the distribution. 21 * 22 * 3. The name of Atmel may not be used to endorse or promote products derived 23 * from this software without specific prior written permission. 24 * 25 * 4. This software may only be redistributed and used in connection with an 26 * Atmel microcontroller product. 27 * 28 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED 29 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 30 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE 31 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR 32 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 36 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 * 40 * \asf_license_stop 41 * 42 */ 43 /* 44 * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a> 45 */ 46 #ifndef CLK_GENCLK_H_INCLUDED 47 #define CLK_GENCLK_H_INCLUDED 48 49 #include "parts.h" 50 51 #if SAM3S 52 # include "sam3s/genclk.h" 53 #elif SAM3U 54 # include "sam3u/genclk.h" 55 #elif SAM3N 56 # include "sam3n/genclk.h" 57 #elif SAM3XA 58 # include "sam3x/genclk.h" 59 #elif SAM4S 60 # include "sam4s/genclk.h" 61 #elif SAM4L 62 # include "sam4l/genclk.h" 63 #elif SAM4E 64 # include "sam4e/genclk.h" 65 #elif SAM4N 66 # include "sam4n/genclk.h" 67 #elif SAM4C 68 # include "sam4c/genclk.h" 69 #elif SAM4CM 70 # include "sam4cm/genclk.h" 71 #elif SAM4CP 72 # include "sam4cp/genclk.h" 73 #elif SAMG 74 # include "samg/genclk.h" 75 #elif SAMV71 76 # include "samv71/genclk.h" 77 #elif SAMV70 78 # include "samv70/genclk.h" 79 #elif SAME70 80 # include "same70/genclk.h" 81 #elif SAMS70 82 # include "sams70/genclk.h" 83 #elif (UC3A0 || UC3A1) 84 # include "uc3a0_a1/genclk.h" 85 #elif UC3A3 86 # include "uc3a3_a4/genclk.h" 87 #elif UC3B 88 # include "uc3b0_b1/genclk.h" 89 #elif UC3C 90 # include "uc3c/genclk.h" 91 #elif UC3D 92 # include "uc3d/genclk.h" 93 #elif UC3L 94 # include "uc3l/genclk.h" 95 #else 96 # error Unsupported chip type 97 #endif 98 99 /** 100 * \ingroup clk_group 101 * \defgroup genclk_group Generic Clock Management 102 * 103 * Generic clocks are configurable clocks which run outside the system 104 * clock domain. They are often connected to peripherals which have an 105 * asynchronous component running independently of the bus clock, e.g. 106 * USB controllers, low-power timers and RTCs, etc. 107 * 108 * Note that not all platforms have support for generic clocks; on such 109 * platforms, this API will not be available. 110 * 111 * @{ 112 */ 113 114 /** 115 * \def GENCLK_DIV_MAX 116 * \brief Maximum divider supported by the generic clock implementation 117 */ 118 /** 119 * \enum genclk_source 120 * \brief Generic clock source ID 121 * 122 * Each generic clock may be generated from a different clock source. 123 * These are the available alternatives provided by the chip. 124 */ 125 126 //! \name Generic clock configuration 127 //@{ 128 /** 129 * \struct genclk_config 130 * \brief Hardware representation of a set of generic clock parameters 131 */ 132 /** 133 * \fn void genclk_config_defaults(struct genclk_config *cfg, 134 * unsigned int id) 135 * \brief Initialize \a cfg to the default configuration for the clock 136 * identified by \a id. 137 */ 138 /** 139 * \fn void genclk_config_read(struct genclk_config *cfg, unsigned int id) 140 * \brief Read the currently active configuration of the clock 141 * identified by \a id into \a cfg. 142 */ 143 /** 144 * \fn void genclk_config_write(const struct genclk_config *cfg, 145 * unsigned int id) 146 * \brief Activate the configuration \a cfg on the clock identified by 147 * \a id. 148 */ 149 /** 150 * \fn void genclk_config_set_source(struct genclk_config *cfg, 151 * enum genclk_source src) 152 * \brief Select a new source clock \a src in configuration \a cfg. 153 */ 154 /** 155 * \fn void genclk_config_set_divider(struct genclk_config *cfg, 156 * unsigned int divider) 157 * \brief Set a new \a divider in configuration \a cfg. 158 */ 159 /** 160 * \fn void genclk_enable_source(enum genclk_source src) 161 * \brief Enable the source clock \a src used by a generic clock. 162 */ 163 //@} 164 165 //! \name Enabling and disabling Generic Clocks 166 //@{ 167 /** 168 * \fn void genclk_enable(const struct genclk_config *cfg, unsigned int id) 169 * \brief Activate the configuration \a cfg on the clock identified by 170 * \a id and enable it. 171 */ 172 /** 173 * \fn void genclk_disable(unsigned int id) 174 * \brief Disable the generic clock identified by \a id. 175 */ 176 //@} 177 178 /** 179 * \brief Enable the configuration defined by \a src and \a divider 180 * for the generic clock identified by \a id. 181 * 182 * \param id The ID of the generic clock. 183 * \param src The source clock of the generic clock. 184 * \param divider The divider used to generate the generic clock. 185 */ 186 static inline void genclk_enable_config(unsigned int id, enum genclk_source src, unsigned int divider) 187 { 188 struct genclk_config gcfg; 189 190 genclk_config_defaults(&gcfg, id); 191 genclk_enable_source(src); 192 genclk_config_set_source(&gcfg, src); 193 genclk_config_set_divider(&gcfg, divider); 194 genclk_enable(&gcfg, id); 195 } 196 197 //! @} 198 199 #endif /* CLK_GENCLK_H_INCLUDED */ 200