1*1b2596b5SMatthias Ringwald /**
2*1b2596b5SMatthias Ringwald * \file
3*1b2596b5SMatthias Ringwald *
4*1b2596b5SMatthias Ringwald * \brief Generic clock management
5*1b2596b5SMatthias Ringwald *
6*1b2596b5SMatthias Ringwald * Copyright (c) 2010-2015 Atmel Corporation. All rights reserved.
7*1b2596b5SMatthias Ringwald *
8*1b2596b5SMatthias Ringwald * \asf_license_start
9*1b2596b5SMatthias Ringwald *
10*1b2596b5SMatthias Ringwald * \page License
11*1b2596b5SMatthias Ringwald *
12*1b2596b5SMatthias Ringwald * Redistribution and use in source and binary forms, with or without
13*1b2596b5SMatthias Ringwald * modification, are permitted provided that the following conditions are met:
14*1b2596b5SMatthias Ringwald *
15*1b2596b5SMatthias Ringwald * 1. Redistributions of source code must retain the above copyright notice,
16*1b2596b5SMatthias Ringwald * this list of conditions and the following disclaimer.
17*1b2596b5SMatthias Ringwald *
18*1b2596b5SMatthias Ringwald * 2. Redistributions in binary form must reproduce the above copyright notice,
19*1b2596b5SMatthias Ringwald * this list of conditions and the following disclaimer in the documentation
20*1b2596b5SMatthias Ringwald * and/or other materials provided with the distribution.
21*1b2596b5SMatthias Ringwald *
22*1b2596b5SMatthias Ringwald * 3. The name of Atmel may not be used to endorse or promote products derived
23*1b2596b5SMatthias Ringwald * from this software without specific prior written permission.
24*1b2596b5SMatthias Ringwald *
25*1b2596b5SMatthias Ringwald * 4. This software may only be redistributed and used in connection with an
26*1b2596b5SMatthias Ringwald * Atmel microcontroller product.
27*1b2596b5SMatthias Ringwald *
28*1b2596b5SMatthias Ringwald * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
29*1b2596b5SMatthias Ringwald * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
30*1b2596b5SMatthias Ringwald * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
31*1b2596b5SMatthias Ringwald * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
32*1b2596b5SMatthias Ringwald * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33*1b2596b5SMatthias Ringwald * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34*1b2596b5SMatthias Ringwald * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35*1b2596b5SMatthias Ringwald * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
36*1b2596b5SMatthias Ringwald * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37*1b2596b5SMatthias Ringwald * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38*1b2596b5SMatthias Ringwald * POSSIBILITY OF SUCH DAMAGE.
39*1b2596b5SMatthias Ringwald *
40*1b2596b5SMatthias Ringwald * \asf_license_stop
41*1b2596b5SMatthias Ringwald *
42*1b2596b5SMatthias Ringwald */
43*1b2596b5SMatthias Ringwald /*
44*1b2596b5SMatthias Ringwald * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
45*1b2596b5SMatthias Ringwald */
46*1b2596b5SMatthias Ringwald #ifndef CLK_GENCLK_H_INCLUDED
47*1b2596b5SMatthias Ringwald #define CLK_GENCLK_H_INCLUDED
48*1b2596b5SMatthias Ringwald
49*1b2596b5SMatthias Ringwald #include "parts.h"
50*1b2596b5SMatthias Ringwald
51*1b2596b5SMatthias Ringwald #if SAM3S
52*1b2596b5SMatthias Ringwald # include "sam3s/genclk.h"
53*1b2596b5SMatthias Ringwald #elif SAM3U
54*1b2596b5SMatthias Ringwald # include "sam3u/genclk.h"
55*1b2596b5SMatthias Ringwald #elif SAM3N
56*1b2596b5SMatthias Ringwald # include "sam3n/genclk.h"
57*1b2596b5SMatthias Ringwald #elif SAM3XA
58*1b2596b5SMatthias Ringwald # include "sam3x/genclk.h"
59*1b2596b5SMatthias Ringwald #elif SAM4S
60*1b2596b5SMatthias Ringwald # include "sam4s/genclk.h"
61*1b2596b5SMatthias Ringwald #elif SAM4L
62*1b2596b5SMatthias Ringwald # include "sam4l/genclk.h"
63*1b2596b5SMatthias Ringwald #elif SAM4E
64*1b2596b5SMatthias Ringwald # include "sam4e/genclk.h"
65*1b2596b5SMatthias Ringwald #elif SAM4N
66*1b2596b5SMatthias Ringwald # include "sam4n/genclk.h"
67*1b2596b5SMatthias Ringwald #elif SAM4C
68*1b2596b5SMatthias Ringwald # include "sam4c/genclk.h"
69*1b2596b5SMatthias Ringwald #elif SAM4CM
70*1b2596b5SMatthias Ringwald # include "sam4cm/genclk.h"
71*1b2596b5SMatthias Ringwald #elif SAM4CP
72*1b2596b5SMatthias Ringwald # include "sam4cp/genclk.h"
73*1b2596b5SMatthias Ringwald #elif SAMG
74*1b2596b5SMatthias Ringwald # include "samg/genclk.h"
75*1b2596b5SMatthias Ringwald #elif SAMV71
76*1b2596b5SMatthias Ringwald # include "samv71/genclk.h"
77*1b2596b5SMatthias Ringwald #elif SAMV70
78*1b2596b5SMatthias Ringwald # include "samv70/genclk.h"
79*1b2596b5SMatthias Ringwald #elif SAME70
80*1b2596b5SMatthias Ringwald # include "same70/genclk.h"
81*1b2596b5SMatthias Ringwald #elif SAMS70
82*1b2596b5SMatthias Ringwald # include "sams70/genclk.h"
83*1b2596b5SMatthias Ringwald #elif (UC3A0 || UC3A1)
84*1b2596b5SMatthias Ringwald # include "uc3a0_a1/genclk.h"
85*1b2596b5SMatthias Ringwald #elif UC3A3
86*1b2596b5SMatthias Ringwald # include "uc3a3_a4/genclk.h"
87*1b2596b5SMatthias Ringwald #elif UC3B
88*1b2596b5SMatthias Ringwald # include "uc3b0_b1/genclk.h"
89*1b2596b5SMatthias Ringwald #elif UC3C
90*1b2596b5SMatthias Ringwald # include "uc3c/genclk.h"
91*1b2596b5SMatthias Ringwald #elif UC3D
92*1b2596b5SMatthias Ringwald # include "uc3d/genclk.h"
93*1b2596b5SMatthias Ringwald #elif UC3L
94*1b2596b5SMatthias Ringwald # include "uc3l/genclk.h"
95*1b2596b5SMatthias Ringwald #else
96*1b2596b5SMatthias Ringwald # error Unsupported chip type
97*1b2596b5SMatthias Ringwald #endif
98*1b2596b5SMatthias Ringwald
99*1b2596b5SMatthias Ringwald /**
100*1b2596b5SMatthias Ringwald * \ingroup clk_group
101*1b2596b5SMatthias Ringwald * \defgroup genclk_group Generic Clock Management
102*1b2596b5SMatthias Ringwald *
103*1b2596b5SMatthias Ringwald * Generic clocks are configurable clocks which run outside the system
104*1b2596b5SMatthias Ringwald * clock domain. They are often connected to peripherals which have an
105*1b2596b5SMatthias Ringwald * asynchronous component running independently of the bus clock, e.g.
106*1b2596b5SMatthias Ringwald * USB controllers, low-power timers and RTCs, etc.
107*1b2596b5SMatthias Ringwald *
108*1b2596b5SMatthias Ringwald * Note that not all platforms have support for generic clocks; on such
109*1b2596b5SMatthias Ringwald * platforms, this API will not be available.
110*1b2596b5SMatthias Ringwald *
111*1b2596b5SMatthias Ringwald * @{
112*1b2596b5SMatthias Ringwald */
113*1b2596b5SMatthias Ringwald
114*1b2596b5SMatthias Ringwald /**
115*1b2596b5SMatthias Ringwald * \def GENCLK_DIV_MAX
116*1b2596b5SMatthias Ringwald * \brief Maximum divider supported by the generic clock implementation
117*1b2596b5SMatthias Ringwald */
118*1b2596b5SMatthias Ringwald /**
119*1b2596b5SMatthias Ringwald * \enum genclk_source
120*1b2596b5SMatthias Ringwald * \brief Generic clock source ID
121*1b2596b5SMatthias Ringwald *
122*1b2596b5SMatthias Ringwald * Each generic clock may be generated from a different clock source.
123*1b2596b5SMatthias Ringwald * These are the available alternatives provided by the chip.
124*1b2596b5SMatthias Ringwald */
125*1b2596b5SMatthias Ringwald
126*1b2596b5SMatthias Ringwald //! \name Generic clock configuration
127*1b2596b5SMatthias Ringwald //@{
128*1b2596b5SMatthias Ringwald /**
129*1b2596b5SMatthias Ringwald * \struct genclk_config
130*1b2596b5SMatthias Ringwald * \brief Hardware representation of a set of generic clock parameters
131*1b2596b5SMatthias Ringwald */
132*1b2596b5SMatthias Ringwald /**
133*1b2596b5SMatthias Ringwald * \fn void genclk_config_defaults(struct genclk_config *cfg,
134*1b2596b5SMatthias Ringwald * unsigned int id)
135*1b2596b5SMatthias Ringwald * \brief Initialize \a cfg to the default configuration for the clock
136*1b2596b5SMatthias Ringwald * identified by \a id.
137*1b2596b5SMatthias Ringwald */
138*1b2596b5SMatthias Ringwald /**
139*1b2596b5SMatthias Ringwald * \fn void genclk_config_read(struct genclk_config *cfg, unsigned int id)
140*1b2596b5SMatthias Ringwald * \brief Read the currently active configuration of the clock
141*1b2596b5SMatthias Ringwald * identified by \a id into \a cfg.
142*1b2596b5SMatthias Ringwald */
143*1b2596b5SMatthias Ringwald /**
144*1b2596b5SMatthias Ringwald * \fn void genclk_config_write(const struct genclk_config *cfg,
145*1b2596b5SMatthias Ringwald * unsigned int id)
146*1b2596b5SMatthias Ringwald * \brief Activate the configuration \a cfg on the clock identified by
147*1b2596b5SMatthias Ringwald * \a id.
148*1b2596b5SMatthias Ringwald */
149*1b2596b5SMatthias Ringwald /**
150*1b2596b5SMatthias Ringwald * \fn void genclk_config_set_source(struct genclk_config *cfg,
151*1b2596b5SMatthias Ringwald * enum genclk_source src)
152*1b2596b5SMatthias Ringwald * \brief Select a new source clock \a src in configuration \a cfg.
153*1b2596b5SMatthias Ringwald */
154*1b2596b5SMatthias Ringwald /**
155*1b2596b5SMatthias Ringwald * \fn void genclk_config_set_divider(struct genclk_config *cfg,
156*1b2596b5SMatthias Ringwald * unsigned int divider)
157*1b2596b5SMatthias Ringwald * \brief Set a new \a divider in configuration \a cfg.
158*1b2596b5SMatthias Ringwald */
159*1b2596b5SMatthias Ringwald /**
160*1b2596b5SMatthias Ringwald * \fn void genclk_enable_source(enum genclk_source src)
161*1b2596b5SMatthias Ringwald * \brief Enable the source clock \a src used by a generic clock.
162*1b2596b5SMatthias Ringwald */
163*1b2596b5SMatthias Ringwald //@}
164*1b2596b5SMatthias Ringwald
165*1b2596b5SMatthias Ringwald //! \name Enabling and disabling Generic Clocks
166*1b2596b5SMatthias Ringwald //@{
167*1b2596b5SMatthias Ringwald /**
168*1b2596b5SMatthias Ringwald * \fn void genclk_enable(const struct genclk_config *cfg, unsigned int id)
169*1b2596b5SMatthias Ringwald * \brief Activate the configuration \a cfg on the clock identified by
170*1b2596b5SMatthias Ringwald * \a id and enable it.
171*1b2596b5SMatthias Ringwald */
172*1b2596b5SMatthias Ringwald /**
173*1b2596b5SMatthias Ringwald * \fn void genclk_disable(unsigned int id)
174*1b2596b5SMatthias Ringwald * \brief Disable the generic clock identified by \a id.
175*1b2596b5SMatthias Ringwald */
176*1b2596b5SMatthias Ringwald //@}
177*1b2596b5SMatthias Ringwald
178*1b2596b5SMatthias Ringwald /**
179*1b2596b5SMatthias Ringwald * \brief Enable the configuration defined by \a src and \a divider
180*1b2596b5SMatthias Ringwald * for the generic clock identified by \a id.
181*1b2596b5SMatthias Ringwald *
182*1b2596b5SMatthias Ringwald * \param id The ID of the generic clock.
183*1b2596b5SMatthias Ringwald * \param src The source clock of the generic clock.
184*1b2596b5SMatthias Ringwald * \param divider The divider used to generate the generic clock.
185*1b2596b5SMatthias Ringwald */
genclk_enable_config(unsigned int id,enum genclk_source src,unsigned int divider)186*1b2596b5SMatthias Ringwald static inline void genclk_enable_config(unsigned int id, enum genclk_source src, unsigned int divider)
187*1b2596b5SMatthias Ringwald {
188*1b2596b5SMatthias Ringwald struct genclk_config gcfg;
189*1b2596b5SMatthias Ringwald
190*1b2596b5SMatthias Ringwald genclk_config_defaults(&gcfg, id);
191*1b2596b5SMatthias Ringwald genclk_enable_source(src);
192*1b2596b5SMatthias Ringwald genclk_config_set_source(&gcfg, src);
193*1b2596b5SMatthias Ringwald genclk_config_set_divider(&gcfg, divider);
194*1b2596b5SMatthias Ringwald genclk_enable(&gcfg, id);
195*1b2596b5SMatthias Ringwald }
196*1b2596b5SMatthias Ringwald
197*1b2596b5SMatthias Ringwald //! @}
198*1b2596b5SMatthias Ringwald
199*1b2596b5SMatthias Ringwald #endif /* CLK_GENCLK_H_INCLUDED */
200