1*5fd0122aSMatthias Ringwald /* --COPYRIGHT--,BSD 2*5fd0122aSMatthias Ringwald * Copyright (c) 2017, Texas Instruments Incorporated 3*5fd0122aSMatthias Ringwald * All rights reserved. 4*5fd0122aSMatthias Ringwald * 5*5fd0122aSMatthias Ringwald * Redistribution and use in source and binary forms, with or without 6*5fd0122aSMatthias Ringwald * modification, are permitted provided that the following conditions 7*5fd0122aSMatthias Ringwald * are met: 8*5fd0122aSMatthias Ringwald * 9*5fd0122aSMatthias Ringwald * * Redistributions of source code must retain the above copyright 10*5fd0122aSMatthias Ringwald * notice, this list of conditions and the following disclaimer. 11*5fd0122aSMatthias Ringwald * 12*5fd0122aSMatthias Ringwald * * Redistributions in binary form must reproduce the above copyright 13*5fd0122aSMatthias Ringwald * notice, this list of conditions and the following disclaimer in the 14*5fd0122aSMatthias Ringwald * documentation and/or other materials provided with the distribution. 15*5fd0122aSMatthias Ringwald * 16*5fd0122aSMatthias Ringwald * * Neither the name of Texas Instruments Incorporated nor the names of 17*5fd0122aSMatthias Ringwald * its contributors may be used to endorse or promote products derived 18*5fd0122aSMatthias Ringwald * from this software without specific prior written permission. 19*5fd0122aSMatthias Ringwald * 20*5fd0122aSMatthias Ringwald * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21*5fd0122aSMatthias Ringwald * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 22*5fd0122aSMatthias Ringwald * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23*5fd0122aSMatthias Ringwald * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 24*5fd0122aSMatthias Ringwald * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 25*5fd0122aSMatthias Ringwald * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 26*5fd0122aSMatthias Ringwald * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 27*5fd0122aSMatthias Ringwald * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 28*5fd0122aSMatthias Ringwald * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 29*5fd0122aSMatthias Ringwald * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 30*5fd0122aSMatthias Ringwald * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31*5fd0122aSMatthias Ringwald * --/COPYRIGHT--*/ 32*5fd0122aSMatthias Ringwald #ifndef __MPU_H__ 33*5fd0122aSMatthias Ringwald #define __MPU_H__ 34*5fd0122aSMatthias Ringwald 35*5fd0122aSMatthias Ringwald //***************************************************************************** 36*5fd0122aSMatthias Ringwald // 37*5fd0122aSMatthias Ringwald //! \addtogroup mpu_api 38*5fd0122aSMatthias Ringwald //! @{ 39*5fd0122aSMatthias Ringwald // 40*5fd0122aSMatthias Ringwald //***************************************************************************** 41*5fd0122aSMatthias Ringwald 42*5fd0122aSMatthias Ringwald 43*5fd0122aSMatthias Ringwald //***************************************************************************** 44*5fd0122aSMatthias Ringwald // 45*5fd0122aSMatthias Ringwald // If building with a C++ compiler, make all of the definitions in this header 46*5fd0122aSMatthias Ringwald // have a C binding. 47*5fd0122aSMatthias Ringwald // 48*5fd0122aSMatthias Ringwald //***************************************************************************** 49*5fd0122aSMatthias Ringwald #ifdef __cplusplus 50*5fd0122aSMatthias Ringwald extern "C" 51*5fd0122aSMatthias Ringwald { 52*5fd0122aSMatthias Ringwald #endif 53*5fd0122aSMatthias Ringwald 54*5fd0122aSMatthias Ringwald #include <ti/devices/msp432p4xx/inc/msp.h> 55*5fd0122aSMatthias Ringwald #include <stdint.h> 56*5fd0122aSMatthias Ringwald 57*5fd0122aSMatthias Ringwald //***************************************************************************** 58*5fd0122aSMatthias Ringwald // 59*5fd0122aSMatthias Ringwald // Flags that can be passed to MPU_enableModule. 60*5fd0122aSMatthias Ringwald // 61*5fd0122aSMatthias Ringwald //***************************************************************************** 62*5fd0122aSMatthias Ringwald #define MPU_CONFIG_PRIV_DEFAULT MPU_CTRL_PRIVDEFENA_Msk 63*5fd0122aSMatthias Ringwald #define MPU_CONFIG_HARDFLT_NMI MPU_CTRL_HFNMIENA_Msk 64*5fd0122aSMatthias Ringwald #define MPU_CONFIG_NONE 0 65*5fd0122aSMatthias Ringwald 66*5fd0122aSMatthias Ringwald //***************************************************************************** 67*5fd0122aSMatthias Ringwald // 68*5fd0122aSMatthias Ringwald // Flags for the region size to be passed to MPU_setRegion. 69*5fd0122aSMatthias Ringwald // 70*5fd0122aSMatthias Ringwald //***************************************************************************** 71*5fd0122aSMatthias Ringwald #define MPU_RGN_SIZE_32B (4 << 1) 72*5fd0122aSMatthias Ringwald #define MPU_RGN_SIZE_64B (5 << 1) 73*5fd0122aSMatthias Ringwald #define MPU_RGN_SIZE_128B (6 << 1) 74*5fd0122aSMatthias Ringwald #define MPU_RGN_SIZE_256B (7 << 1) 75*5fd0122aSMatthias Ringwald #define MPU_RGN_SIZE_512B (8 << 1) 76*5fd0122aSMatthias Ringwald 77*5fd0122aSMatthias Ringwald #define MPU_RGN_SIZE_1K (9 << 1) 78*5fd0122aSMatthias Ringwald #define MPU_RGN_SIZE_2K (10 << 1) 79*5fd0122aSMatthias Ringwald #define MPU_RGN_SIZE_4K (11 << 1) 80*5fd0122aSMatthias Ringwald #define MPU_RGN_SIZE_8K (12 << 1) 81*5fd0122aSMatthias Ringwald #define MPU_RGN_SIZE_16K (13 << 1) 82*5fd0122aSMatthias Ringwald #define MPU_RGN_SIZE_32K (14 << 1) 83*5fd0122aSMatthias Ringwald #define MPU_RGN_SIZE_64K (15 << 1) 84*5fd0122aSMatthias Ringwald #define MPU_RGN_SIZE_128K (16 << 1) 85*5fd0122aSMatthias Ringwald #define MPU_RGN_SIZE_256K (17 << 1) 86*5fd0122aSMatthias Ringwald #define MPU_RGN_SIZE_512K (18 << 1) 87*5fd0122aSMatthias Ringwald 88*5fd0122aSMatthias Ringwald #define MPU_RGN_SIZE_1M (19 << 1) 89*5fd0122aSMatthias Ringwald #define MPU_RGN_SIZE_2M (20 << 1) 90*5fd0122aSMatthias Ringwald #define MPU_RGN_SIZE_4M (21 << 1) 91*5fd0122aSMatthias Ringwald #define MPU_RGN_SIZE_8M (22 << 1) 92*5fd0122aSMatthias Ringwald #define MPU_RGN_SIZE_16M (23 << 1) 93*5fd0122aSMatthias Ringwald #define MPU_RGN_SIZE_32M (24 << 1) 94*5fd0122aSMatthias Ringwald #define MPU_RGN_SIZE_64M (25 << 1) 95*5fd0122aSMatthias Ringwald #define MPU_RGN_SIZE_128M (26 << 1) 96*5fd0122aSMatthias Ringwald #define MPU_RGN_SIZE_256M (27 << 1) 97*5fd0122aSMatthias Ringwald #define MPU_RGN_SIZE_512M (28 << 1) 98*5fd0122aSMatthias Ringwald 99*5fd0122aSMatthias Ringwald #define MPU_RGN_SIZE_1G (29 << 1) 100*5fd0122aSMatthias Ringwald #define MPU_RGN_SIZE_2G (30 << 1) 101*5fd0122aSMatthias Ringwald #define MPU_RGN_SIZE_4G (31 << 1) 102*5fd0122aSMatthias Ringwald 103*5fd0122aSMatthias Ringwald //***************************************************************************** 104*5fd0122aSMatthias Ringwald // 105*5fd0122aSMatthias Ringwald // Flags for the permissions to be passed to MPU_setRegion. 106*5fd0122aSMatthias Ringwald // 107*5fd0122aSMatthias Ringwald //***************************************************************************** 108*5fd0122aSMatthias Ringwald #define MPU_RGN_PERM_EXEC 0x00000000 109*5fd0122aSMatthias Ringwald #define MPU_RGN_PERM_NOEXEC 0x10000000 110*5fd0122aSMatthias Ringwald #define MPU_RGN_PERM_PRV_NO_USR_NO 0x00000000 111*5fd0122aSMatthias Ringwald #define MPU_RGN_PERM_PRV_RW_USR_NO 0x01000000 112*5fd0122aSMatthias Ringwald #define MPU_RGN_PERM_PRV_RW_USR_RO 0x02000000 113*5fd0122aSMatthias Ringwald #define MPU_RGN_PERM_PRV_RW_USR_RW 0x03000000 114*5fd0122aSMatthias Ringwald #define MPU_RGN_PERM_PRV_RO_USR_NO 0x05000000 115*5fd0122aSMatthias Ringwald #define MPU_RGN_PERM_PRV_RO_USR_RO 0x06000000 116*5fd0122aSMatthias Ringwald 117*5fd0122aSMatthias Ringwald //***************************************************************************** 118*5fd0122aSMatthias Ringwald // 119*5fd0122aSMatthias Ringwald // Flags for the sub-region to be passed to MPU_setRegion. 120*5fd0122aSMatthias Ringwald // 121*5fd0122aSMatthias Ringwald //***************************************************************************** 122*5fd0122aSMatthias Ringwald #define MPU_SUB_RGN_DISABLE_0 0x00000100 123*5fd0122aSMatthias Ringwald #define MPU_SUB_RGN_DISABLE_1 0x00000200 124*5fd0122aSMatthias Ringwald #define MPU_SUB_RGN_DISABLE_2 0x00000400 125*5fd0122aSMatthias Ringwald #define MPU_SUB_RGN_DISABLE_3 0x00000800 126*5fd0122aSMatthias Ringwald #define MPU_SUB_RGN_DISABLE_4 0x00001000 127*5fd0122aSMatthias Ringwald #define MPU_SUB_RGN_DISABLE_5 0x00002000 128*5fd0122aSMatthias Ringwald #define MPU_SUB_RGN_DISABLE_6 0x00004000 129*5fd0122aSMatthias Ringwald #define MPU_SUB_RGN_DISABLE_7 0x00008000 130*5fd0122aSMatthias Ringwald 131*5fd0122aSMatthias Ringwald //***************************************************************************** 132*5fd0122aSMatthias Ringwald // 133*5fd0122aSMatthias Ringwald // Flags to enable or disable a region, to be passed to MPU_setRegion. 134*5fd0122aSMatthias Ringwald // 135*5fd0122aSMatthias Ringwald //***************************************************************************** 136*5fd0122aSMatthias Ringwald #define MPU_RGN_ENABLE 1 137*5fd0122aSMatthias Ringwald #define MPU_RGN_DISABLE 0 138*5fd0122aSMatthias Ringwald 139*5fd0122aSMatthias Ringwald #define NVIC_MPU_TYPE_DREGION_S 8 140*5fd0122aSMatthias Ringwald 141*5fd0122aSMatthias Ringwald //***************************************************************************** 142*5fd0122aSMatthias Ringwald // 143*5fd0122aSMatthias Ringwald // API Function prototypes 144*5fd0122aSMatthias Ringwald // 145*5fd0122aSMatthias Ringwald //***************************************************************************** 146*5fd0122aSMatthias Ringwald 147*5fd0122aSMatthias Ringwald //***************************************************************************** 148*5fd0122aSMatthias Ringwald // 149*5fd0122aSMatthias Ringwald //! Enables and configures the MPU for use. 150*5fd0122aSMatthias Ringwald //! 151*5fd0122aSMatthias Ringwald //! \param mpuConfig is the logical OR of the possible configurations. 152*5fd0122aSMatthias Ringwald //! 153*5fd0122aSMatthias Ringwald //! This function enables the Cortex-M memory protection unit. It also 154*5fd0122aSMatthias Ringwald //! configures the default behavior when in privileged mode and while handling 155*5fd0122aSMatthias Ringwald //! a hard fault or NMI. Prior to enabling the MPU, at least one region must 156*5fd0122aSMatthias Ringwald //! be set by calling MPU_setRegion() or else by enabling the default region for 157*5fd0122aSMatthias Ringwald //! privileged mode by passing the \b MPU_CONFIG_PRIV_DEFAULT flag to 158*5fd0122aSMatthias Ringwald //! MPU_enableModule(). Once the MPU is enabled, a memory management fault is 159*5fd0122aSMatthias Ringwald //! generated for memory access violations. 160*5fd0122aSMatthias Ringwald //! 161*5fd0122aSMatthias Ringwald //! The \e mpuConfig parameter should be the logical OR of any of the 162*5fd0122aSMatthias Ringwald //! following: 163*5fd0122aSMatthias Ringwald //! 164*5fd0122aSMatthias Ringwald //! - \b MPU_CONFIG_PRIV_DEFAULT enables the default memory map when in 165*5fd0122aSMatthias Ringwald //! privileged mode and when no other regions are defined. If this option 166*5fd0122aSMatthias Ringwald //! is not enabled, then there must be at least one valid region already 167*5fd0122aSMatthias Ringwald //! defined when the MPU is enabled. 168*5fd0122aSMatthias Ringwald //! - \b MPU_CONFIG_HARDFLT_NMI enables the MPU while in a hard fault or NMI 169*5fd0122aSMatthias Ringwald //! exception handler. If this option is not enabled, then the MPU is 170*5fd0122aSMatthias Ringwald //! disabled while in one of these exception handlers and the default 171*5fd0122aSMatthias Ringwald //! memory map is applied. 172*5fd0122aSMatthias Ringwald //! - \b MPU_CONFIG_NONE chooses none of the above options. In this case, 173*5fd0122aSMatthias Ringwald //! no default memory map is provided in privileged mode, and the MPU is 174*5fd0122aSMatthias Ringwald //! not enabled in the fault handlers. 175*5fd0122aSMatthias Ringwald //! 176*5fd0122aSMatthias Ringwald //! \return None. 177*5fd0122aSMatthias Ringwald // 178*5fd0122aSMatthias Ringwald //***************************************************************************** 179*5fd0122aSMatthias Ringwald extern void MPU_enableModule(uint32_t mpuConfig); 180*5fd0122aSMatthias Ringwald 181*5fd0122aSMatthias Ringwald //***************************************************************************** 182*5fd0122aSMatthias Ringwald // 183*5fd0122aSMatthias Ringwald //! Disables the MPU for use. 184*5fd0122aSMatthias Ringwald //! 185*5fd0122aSMatthias Ringwald //! This function disables the Cortex-M memory protection unit. When the 186*5fd0122aSMatthias Ringwald //! MPU is disabled, the default memory map is used and memory management 187*5fd0122aSMatthias Ringwald //! faults are not generated. 188*5fd0122aSMatthias Ringwald //! 189*5fd0122aSMatthias Ringwald //! \return None. 190*5fd0122aSMatthias Ringwald // 191*5fd0122aSMatthias Ringwald //***************************************************************************** 192*5fd0122aSMatthias Ringwald extern void MPU_disableModule(void); 193*5fd0122aSMatthias Ringwald 194*5fd0122aSMatthias Ringwald //***************************************************************************** 195*5fd0122aSMatthias Ringwald // 196*5fd0122aSMatthias Ringwald //! Gets the count of regions supported by the MPU. 197*5fd0122aSMatthias Ringwald //! 198*5fd0122aSMatthias Ringwald //! This function is used to get the total number of regions that are supported 199*5fd0122aSMatthias Ringwald //! by the MPU, including regions that are already programmed. 200*5fd0122aSMatthias Ringwald //! 201*5fd0122aSMatthias Ringwald //! \return The number of memory protection regions that are available 202*5fd0122aSMatthias Ringwald //! for programming using MPU_setRegion(). 203*5fd0122aSMatthias Ringwald // 204*5fd0122aSMatthias Ringwald //***************************************************************************** 205*5fd0122aSMatthias Ringwald extern uint32_t MPU_getRegionCount(void); 206*5fd0122aSMatthias Ringwald 207*5fd0122aSMatthias Ringwald //***************************************************************************** 208*5fd0122aSMatthias Ringwald // 209*5fd0122aSMatthias Ringwald //! Enables a specific region. 210*5fd0122aSMatthias Ringwald //! 211*5fd0122aSMatthias Ringwald //! \param region is the region number to enable. Valid values are between 212*5fd0122aSMatthias Ringwald //! 0 and 7 inclusively. 213*5fd0122aSMatthias Ringwald //! 214*5fd0122aSMatthias Ringwald //! This function is used to enable a memory protection region. The region 215*5fd0122aSMatthias Ringwald //! should already be configured with the MPU_setRegion() function. Once 216*5fd0122aSMatthias Ringwald //! enabled, the memory protection rules of the region are applied and access 217*5fd0122aSMatthias Ringwald //! violations cause a memory management fault. 218*5fd0122aSMatthias Ringwald //! 219*5fd0122aSMatthias Ringwald //! \return None. 220*5fd0122aSMatthias Ringwald // 221*5fd0122aSMatthias Ringwald //***************************************************************************** 222*5fd0122aSMatthias Ringwald extern void MPU_enableRegion(uint32_t region); 223*5fd0122aSMatthias Ringwald 224*5fd0122aSMatthias Ringwald //***************************************************************************** 225*5fd0122aSMatthias Ringwald // 226*5fd0122aSMatthias Ringwald //! Disables a specific region. 227*5fd0122aSMatthias Ringwald //! 228*5fd0122aSMatthias Ringwald //! \param region is the region number to disable. Valid values are between 229*5fd0122aSMatthias Ringwald //! 0 and 7 inclusively. 230*5fd0122aSMatthias Ringwald //! 231*5fd0122aSMatthias Ringwald //! This function is used to disable a previously enabled memory protection 232*5fd0122aSMatthias Ringwald //! region. The region remains configured if it is not overwritten with 233*5fd0122aSMatthias Ringwald //! another call to MPU_setRegion(), and can be enabled again by calling 234*5fd0122aSMatthias Ringwald //! MPU_enableRegion(). 235*5fd0122aSMatthias Ringwald //! 236*5fd0122aSMatthias Ringwald //! \return None. 237*5fd0122aSMatthias Ringwald // 238*5fd0122aSMatthias Ringwald //***************************************************************************** 239*5fd0122aSMatthias Ringwald extern void MPU_disableRegion(uint32_t region); 240*5fd0122aSMatthias Ringwald 241*5fd0122aSMatthias Ringwald //***************************************************************************** 242*5fd0122aSMatthias Ringwald // 243*5fd0122aSMatthias Ringwald //! Sets up the access rules for a specific region. 244*5fd0122aSMatthias Ringwald //! 245*5fd0122aSMatthias Ringwald //! \param region is the region number to set up. 246*5fd0122aSMatthias Ringwald //! \param addr is the base address of the region. It must be aligned 247*5fd0122aSMatthias Ringwald //! according to the size of the region specified in flags. 248*5fd0122aSMatthias Ringwald //! \param flags is a set of flags to define the attributes of the region. 249*5fd0122aSMatthias Ringwald //! 250*5fd0122aSMatthias Ringwald //! This function sets up the protection rules for a region. The region has 251*5fd0122aSMatthias Ringwald //! a base address and a set of attributes including the size. The base 252*5fd0122aSMatthias Ringwald //! address parameter, \e addr, must be aligned according to the size, and 253*5fd0122aSMatthias Ringwald //! the size must be a power of 2. 254*5fd0122aSMatthias Ringwald //! 255*5fd0122aSMatthias Ringwald //! \param region is the region number to set. Valid values are between 256*5fd0122aSMatthias Ringwald //! 0 and 7 inclusively. 257*5fd0122aSMatthias Ringwald //! 258*5fd0122aSMatthias Ringwald //! The \e flags parameter is the logical OR of all of the attributes 259*5fd0122aSMatthias Ringwald //! of the region. It is a combination of choices for region size, 260*5fd0122aSMatthias Ringwald //! execute permission, read/write permissions, disabled sub-regions, 261*5fd0122aSMatthias Ringwald //! and a flag to determine if the region is enabled. 262*5fd0122aSMatthias Ringwald //! 263*5fd0122aSMatthias Ringwald //! The size flag determines the size of a region and must be one of the 264*5fd0122aSMatthias Ringwald //! following: 265*5fd0122aSMatthias Ringwald //! 266*5fd0122aSMatthias Ringwald //! - \b MPU_RGN_SIZE_32B 267*5fd0122aSMatthias Ringwald //! - \b MPU_RGN_SIZE_64B 268*5fd0122aSMatthias Ringwald //! - \b MPU_RGN_SIZE_128B 269*5fd0122aSMatthias Ringwald //! - \b MPU_RGN_SIZE_256B 270*5fd0122aSMatthias Ringwald //! - \b MPU_RGN_SIZE_512B 271*5fd0122aSMatthias Ringwald //! - \b MPU_RGN_SIZE_1K 272*5fd0122aSMatthias Ringwald //! - \b MPU_RGN_SIZE_2K 273*5fd0122aSMatthias Ringwald //! - \b MPU_RGN_SIZE_4K 274*5fd0122aSMatthias Ringwald //! - \b MPU_RGN_SIZE_8K 275*5fd0122aSMatthias Ringwald //! - \b MPU_RGN_SIZE_16K 276*5fd0122aSMatthias Ringwald //! - \b MPU_RGN_SIZE_32K 277*5fd0122aSMatthias Ringwald //! - \b MPU_RGN_SIZE_64K 278*5fd0122aSMatthias Ringwald //! - \b MPU_RGN_SIZE_128K 279*5fd0122aSMatthias Ringwald //! - \b MPU_RGN_SIZE_256K 280*5fd0122aSMatthias Ringwald //! - \b MPU_RGN_SIZE_512K 281*5fd0122aSMatthias Ringwald //! - \b MPU_RGN_SIZE_1M 282*5fd0122aSMatthias Ringwald //! - \b MPU_RGN_SIZE_2M 283*5fd0122aSMatthias Ringwald //! - \b MPU_RGN_SIZE_4M 284*5fd0122aSMatthias Ringwald //! - \b MPU_RGN_SIZE_8M 285*5fd0122aSMatthias Ringwald //! - \b MPU_RGN_SIZE_16M 286*5fd0122aSMatthias Ringwald //! - \b MPU_RGN_SIZE_32M 287*5fd0122aSMatthias Ringwald //! - \b MPU_RGN_SIZE_64M 288*5fd0122aSMatthias Ringwald //! - \b MPU_RGN_SIZE_128M 289*5fd0122aSMatthias Ringwald //! - \b MPU_RGN_SIZE_256M 290*5fd0122aSMatthias Ringwald //! - \b MPU_RGN_SIZE_512M 291*5fd0122aSMatthias Ringwald //! - \b MPU_RGN_SIZE_1G 292*5fd0122aSMatthias Ringwald //! - \b MPU_RGN_SIZE_2G 293*5fd0122aSMatthias Ringwald //! - \b MPU_RGN_SIZE_4G 294*5fd0122aSMatthias Ringwald //! 295*5fd0122aSMatthias Ringwald //! The execute permission flag must be one of the following: 296*5fd0122aSMatthias Ringwald //! 297*5fd0122aSMatthias Ringwald //! - \b MPU_RGN_PERM_EXEC enables the region for execution of code 298*5fd0122aSMatthias Ringwald //! - \b MPU_RGN_PERM_NOEXEC disables the region for execution of code 299*5fd0122aSMatthias Ringwald //! 300*5fd0122aSMatthias Ringwald //! The read/write access permissions are applied separately for the 301*5fd0122aSMatthias Ringwald //! privileged and user modes. The read/write access flags must be one 302*5fd0122aSMatthias Ringwald //! of the following: 303*5fd0122aSMatthias Ringwald //! 304*5fd0122aSMatthias Ringwald //! - \b MPU_RGN_PERM_PRV_NO_USR_NO - no access in privileged or user mode 305*5fd0122aSMatthias Ringwald //! - \b MPU_RGN_PERM_PRV_RW_USR_NO - privileged read/write, user no access 306*5fd0122aSMatthias Ringwald //! - \b MPU_RGN_PERM_PRV_RW_USR_RO - privileged read/write, user read-only 307*5fd0122aSMatthias Ringwald //! - \b MPU_RGN_PERM_PRV_RW_USR_RW - privileged read/write, user read/write 308*5fd0122aSMatthias Ringwald //! - \b MPU_RGN_PERM_PRV_RO_USR_NO - privileged read-only, user no access 309*5fd0122aSMatthias Ringwald //! - \b MPU_RGN_PERM_PRV_RO_USR_RO - privileged read-only, user read-only 310*5fd0122aSMatthias Ringwald //! 311*5fd0122aSMatthias Ringwald //! The region is automatically divided into 8 equally-sized sub-regions by 312*5fd0122aSMatthias Ringwald //! the MPU. Sub-regions can only be used in regions of size 256 bytes 313*5fd0122aSMatthias Ringwald //! or larger. Any of these 8 sub-regions can be disabled, allowing for 314*5fd0122aSMatthias Ringwald //! creation of ``holes'' in a region which can be left open, or overlaid 315*5fd0122aSMatthias Ringwald //! by another region with different attributes. Any of the 8 sub-regions 316*5fd0122aSMatthias Ringwald //! can be disabled with a logical OR of any of the following flags: 317*5fd0122aSMatthias Ringwald //! 318*5fd0122aSMatthias Ringwald //! - \b MPU_SUB_RGN_DISABLE_0 319*5fd0122aSMatthias Ringwald //! - \b MPU_SUB_RGN_DISABLE_1 320*5fd0122aSMatthias Ringwald //! - \b MPU_SUB_RGN_DISABLE_2 321*5fd0122aSMatthias Ringwald //! - \b MPU_SUB_RGN_DISABLE_3 322*5fd0122aSMatthias Ringwald //! - \b MPU_SUB_RGN_DISABLE_4 323*5fd0122aSMatthias Ringwald //! - \b MPU_SUB_RGN_DISABLE_5 324*5fd0122aSMatthias Ringwald //! - \b MPU_SUB_RGN_DISABLE_6 325*5fd0122aSMatthias Ringwald //! - \b MPU_SUB_RGN_DISABLE_7 326*5fd0122aSMatthias Ringwald //! 327*5fd0122aSMatthias Ringwald //! Finally, the region can be initially enabled or disabled with one of 328*5fd0122aSMatthias Ringwald //! the following flags: 329*5fd0122aSMatthias Ringwald //! 330*5fd0122aSMatthias Ringwald //! - \b MPU_RGN_ENABLE 331*5fd0122aSMatthias Ringwald //! - \b MPU_RGN_DISABLE 332*5fd0122aSMatthias Ringwald //! 333*5fd0122aSMatthias Ringwald //! As an example, to set a region with the following attributes: size of 334*5fd0122aSMatthias Ringwald //! 32 KB, execution enabled, read-only for both privileged and user, one 335*5fd0122aSMatthias Ringwald //! sub-region disabled, and initially enabled; the \e flags parameter would 336*5fd0122aSMatthias Ringwald //! have the following value: 337*5fd0122aSMatthias Ringwald //! 338*5fd0122aSMatthias Ringwald //! <code> 339*5fd0122aSMatthias Ringwald //! (MPU_RGN_SIZE_32K | MPU_RGN_PERM_EXEC | MPU_RGN_PERM_PRV_RO_USR_RO | 340*5fd0122aSMatthias Ringwald //! MPU_SUB_RGN_DISABLE_2 | MPU_RGN_ENABLE) 341*5fd0122aSMatthias Ringwald //! </code> 342*5fd0122aSMatthias Ringwald //! 343*5fd0122aSMatthias Ringwald //! \note This function writes to multiple registers and is not protected 344*5fd0122aSMatthias Ringwald //! from interrupts. It is possible that an interrupt which accesses a 345*5fd0122aSMatthias Ringwald //! region may occur while that region is in the process of being changed. 346*5fd0122aSMatthias Ringwald //! The safest way to handle this is to disable a region before changing it. 347*5fd0122aSMatthias Ringwald //! Refer to the discussion of this in the API Detailed Description section. 348*5fd0122aSMatthias Ringwald //! 349*5fd0122aSMatthias Ringwald //! \return None. 350*5fd0122aSMatthias Ringwald // 351*5fd0122aSMatthias Ringwald //***************************************************************************** 352*5fd0122aSMatthias Ringwald extern void MPU_setRegion(uint32_t region, uint32_t addr, uint32_t flags); 353*5fd0122aSMatthias Ringwald 354*5fd0122aSMatthias Ringwald //***************************************************************************** 355*5fd0122aSMatthias Ringwald // 356*5fd0122aSMatthias Ringwald //! Gets the current settings for a specific region. 357*5fd0122aSMatthias Ringwald //! 358*5fd0122aSMatthias Ringwald //! \param region is the region number to get. Valid values are between 359*5fd0122aSMatthias Ringwald //! 0 and 7 inclusively. 360*5fd0122aSMatthias Ringwald //! \param addr points to storage for the base address of the region. 361*5fd0122aSMatthias Ringwald //! \param pflags points to the attribute flags for the region. 362*5fd0122aSMatthias Ringwald //! 363*5fd0122aSMatthias Ringwald //! This function retrieves the configuration of a specific region. The 364*5fd0122aSMatthias Ringwald //! meanings and format of the parameters is the same as that of the 365*5fd0122aSMatthias Ringwald //! MPU_setRegion() function. 366*5fd0122aSMatthias Ringwald //! 367*5fd0122aSMatthias Ringwald //! This function can be used to save the configuration of a region for later 368*5fd0122aSMatthias Ringwald //! use with the MPU_setRegion() function. The region's enable state is 369*5fd0122aSMatthias Ringwald //! preserved in the attributes that are saved. 370*5fd0122aSMatthias Ringwald //! 371*5fd0122aSMatthias Ringwald //! \return None. 372*5fd0122aSMatthias Ringwald // 373*5fd0122aSMatthias Ringwald //***************************************************************************** 374*5fd0122aSMatthias Ringwald extern void MPU_getRegion(uint32_t region, uint32_t *addr, uint32_t *pflags); 375*5fd0122aSMatthias Ringwald 376*5fd0122aSMatthias Ringwald //***************************************************************************** 377*5fd0122aSMatthias Ringwald // 378*5fd0122aSMatthias Ringwald //! Registers an interrupt handler for the memory management fault. 379*5fd0122aSMatthias Ringwald //! 380*5fd0122aSMatthias Ringwald //! \param intHandler is a pointer to the function to be called when the 381*5fd0122aSMatthias Ringwald //! memory management fault occurs. 382*5fd0122aSMatthias Ringwald //! 383*5fd0122aSMatthias Ringwald //! This function sets and enables the handler to be called when the MPU 384*5fd0122aSMatthias Ringwald //! generates a memory management fault due to a protection region access 385*5fd0122aSMatthias Ringwald //! violation. 386*5fd0122aSMatthias Ringwald //! 387*5fd0122aSMatthias Ringwald //! \sa Interrupt_registerInterrupt() for important information about 388*5fd0122aSMatthias Ringwald //! registering interrupt handlers. 389*5fd0122aSMatthias Ringwald //! 390*5fd0122aSMatthias Ringwald //! \return None. 391*5fd0122aSMatthias Ringwald // 392*5fd0122aSMatthias Ringwald //***************************************************************************** 393*5fd0122aSMatthias Ringwald extern void MPU_registerInterrupt(void (*intHandler)(void)); 394*5fd0122aSMatthias Ringwald 395*5fd0122aSMatthias Ringwald //***************************************************************************** 396*5fd0122aSMatthias Ringwald // 397*5fd0122aSMatthias Ringwald //! Unregisters an interrupt handler for the memory management fault. 398*5fd0122aSMatthias Ringwald //! 399*5fd0122aSMatthias Ringwald //! This function disables and clears the handler to be called when a 400*5fd0122aSMatthias Ringwald //! memory management fault occurs. 401*5fd0122aSMatthias Ringwald //! 402*5fd0122aSMatthias Ringwald //! \sa Interrupt_registerInterrupt() for important information about 403*5fd0122aSMatthias Ringwald //! registering interrupt handlers. 404*5fd0122aSMatthias Ringwald //! 405*5fd0122aSMatthias Ringwald //! \return None. 406*5fd0122aSMatthias Ringwald // 407*5fd0122aSMatthias Ringwald //***************************************************************************** 408*5fd0122aSMatthias Ringwald extern void MPU_unregisterInterrupt(void); 409*5fd0122aSMatthias Ringwald 410*5fd0122aSMatthias Ringwald //***************************************************************************** 411*5fd0122aSMatthias Ringwald // 412*5fd0122aSMatthias Ringwald //! Enables the interrupt for the memory management fault. 413*5fd0122aSMatthias Ringwald //! 414*5fd0122aSMatthias Ringwald //! \return None. 415*5fd0122aSMatthias Ringwald // 416*5fd0122aSMatthias Ringwald //***************************************************************************** 417*5fd0122aSMatthias Ringwald extern void MPU_enableInterrupt(void); 418*5fd0122aSMatthias Ringwald 419*5fd0122aSMatthias Ringwald //***************************************************************************** 420*5fd0122aSMatthias Ringwald // 421*5fd0122aSMatthias Ringwald //! Disables the interrupt for the memory management fault. 422*5fd0122aSMatthias Ringwald //! 423*5fd0122aSMatthias Ringwald //! \return None. 424*5fd0122aSMatthias Ringwald // 425*5fd0122aSMatthias Ringwald //***************************************************************************** 426*5fd0122aSMatthias Ringwald extern void MPU_disableInterrupt(void); 427*5fd0122aSMatthias Ringwald 428*5fd0122aSMatthias Ringwald //***************************************************************************** 429*5fd0122aSMatthias Ringwald // 430*5fd0122aSMatthias Ringwald // Mark the end of the C bindings section for C++ compilers. 431*5fd0122aSMatthias Ringwald // 432*5fd0122aSMatthias Ringwald //***************************************************************************** 433*5fd0122aSMatthias Ringwald #ifdef __cplusplus 434*5fd0122aSMatthias Ringwald } 435*5fd0122aSMatthias Ringwald #endif 436*5fd0122aSMatthias Ringwald 437*5fd0122aSMatthias Ringwald //***************************************************************************** 438*5fd0122aSMatthias Ringwald // 439*5fd0122aSMatthias Ringwald // Close the Doxygen group. 440*5fd0122aSMatthias Ringwald //! @} 441*5fd0122aSMatthias Ringwald // 442*5fd0122aSMatthias Ringwald //***************************************************************************** 443*5fd0122aSMatthias Ringwald 444*5fd0122aSMatthias Ringwald #endif // __MPU_H__ 445