1 /* --COPYRIGHT--,BSD 2 * Copyright (c) 2017, Texas Instruments Incorporated 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * * Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 12 * * Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * * Neither the name of Texas Instruments Incorporated nor the names of 17 * its contributors may be used to endorse or promote products derived 18 * from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 22 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 25 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 26 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 27 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 28 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 29 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 30 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 * --/COPYRIGHT--*/ 32 /* Standard Includes */ 33 #include <stdint.h> 34 35 /* DriverLib Includes */ 36 #include <ti/devices/msp432p4xx/driverlib/gpio.h> 37 #include <ti/devices/msp432p4xx/driverlib/debug.h> 38 #include <ti/devices/msp432p4xx/driverlib/interrupt.h> 39 40 41 static const uint32_t GPIO_PORT_TO_INT[] = 42 { 0x00, 43 INT_PORT1, 44 INT_PORT2, 45 INT_PORT3, 46 INT_PORT4, 47 INT_PORT5, 48 INT_PORT6 }; 49 50 static const uint32_t GPIO_PORT_TO_BASE[] = 51 { 0x00, 52 (uint32_t)P1, 53 (uint32_t)P1+1, 54 (uint32_t)P3, 55 (uint32_t)P3+1, 56 (uint32_t)P5, 57 (uint32_t)P5+1, 58 (uint32_t)P7, 59 (uint32_t)P7+1, 60 (uint32_t)P9, 61 (uint32_t)P9+1, 62 (uint32_t)PJ 63 }; 64 65 void GPIO_setAsOutputPin(uint_fast8_t selectedPort, uint_fast16_t selectedPins) 66 { 67 uint32_t baseAddress = GPIO_PORT_TO_BASE[selectedPort]; 68 69 HWREG16(baseAddress + OFS_LIB_PASEL0) &= ~selectedPins; 70 HWREG16(baseAddress + OFS_LIB_PASEL1) &= ~selectedPins; 71 HWREG16(baseAddress + OFS_LIB_PADIR) |= selectedPins; 72 } 73 74 75 void GPIO_setAsInputPin(uint_fast8_t selectedPort, uint_fast16_t selectedPins) 76 { 77 uint32_t baseAddress = GPIO_PORT_TO_BASE[selectedPort]; 78 79 HWREG16(baseAddress + OFS_LIB_PASEL0) &= ~selectedPins; 80 HWREG16(baseAddress + OFS_LIB_PASEL1) &= ~selectedPins; 81 HWREG16(baseAddress + OFS_LIB_PADIR) &= ~selectedPins; 82 HWREG16(baseAddress + OFS_LIB_PAREN) &= ~selectedPins; 83 } 84 85 86 void GPIO_setAsPeripheralModuleFunctionOutputPin(uint_fast8_t selectedPort, 87 uint_fast16_t selectedPins, uint_fast8_t mode) 88 { 89 90 uint32_t baseAddress = GPIO_PORT_TO_BASE[selectedPort]; 91 92 HWREG16(baseAddress + OFS_LIB_PADIR) |= selectedPins; 93 switch (mode) 94 { 95 case GPIO_PRIMARY_MODULE_FUNCTION: 96 HWREG16(baseAddress + OFS_LIB_PASEL0) |= selectedPins; 97 HWREG16(baseAddress + OFS_LIB_PASEL1) &= ~selectedPins; 98 break; 99 case GPIO_SECONDARY_MODULE_FUNCTION: 100 HWREG16(baseAddress + OFS_LIB_PASEL0) &= ~selectedPins; 101 HWREG16(baseAddress + OFS_LIB_PASEL1) |= selectedPins; 102 break; 103 case GPIO_TERTIARY_MODULE_FUNCTION: 104 HWREG16(baseAddress + OFS_LIB_PASEL0) |= selectedPins; 105 HWREG16(baseAddress + OFS_LIB_PASEL1) |= selectedPins; 106 break; 107 } 108 } 109 110 111 void GPIO_setAsPeripheralModuleFunctionInputPin(uint_fast8_t selectedPort, 112 uint_fast16_t selectedPins, uint_fast8_t mode) 113 { 114 uint32_t baseAddress = GPIO_PORT_TO_BASE[selectedPort]; 115 116 HWREG16(baseAddress + OFS_LIB_PADIR) &= ~selectedPins; 117 switch (mode) 118 { 119 case GPIO_PRIMARY_MODULE_FUNCTION: 120 HWREG16(baseAddress + OFS_LIB_PASEL0) |= selectedPins; 121 HWREG16(baseAddress + OFS_LIB_PASEL1) &= ~selectedPins; 122 break; 123 case GPIO_SECONDARY_MODULE_FUNCTION: 124 HWREG16(baseAddress + OFS_LIB_PASEL0) &= ~selectedPins; 125 HWREG16(baseAddress + OFS_LIB_PASEL1) |= selectedPins; 126 break; 127 case GPIO_TERTIARY_MODULE_FUNCTION: 128 HWREG16(baseAddress + OFS_LIB_PASEL0) |= selectedPins; 129 HWREG16(baseAddress + OFS_LIB_PASEL1) |= selectedPins; 130 break; 131 } 132 } 133 134 135 void GPIO_setOutputHighOnPin(uint_fast8_t selectedPort, 136 uint_fast16_t selectedPins) 137 { 138 139 uint32_t baseAddress = GPIO_PORT_TO_BASE[selectedPort]; 140 141 HWREG16(baseAddress + OFS_LIB_PAOUT) |= selectedPins; 142 } 143 144 145 void GPIO_setOutputLowOnPin(uint_fast8_t selectedPort, 146 uint_fast16_t selectedPins) 147 { 148 149 uint32_t baseAddress = GPIO_PORT_TO_BASE[selectedPort]; 150 151 HWREG16(baseAddress + OFS_LIB_PAOUT) &= ~selectedPins; 152 } 153 154 155 void GPIO_toggleOutputOnPin(uint_fast8_t selectedPort, 156 uint_fast16_t selectedPins) 157 { 158 159 uint32_t baseAddress = GPIO_PORT_TO_BASE[selectedPort]; 160 161 HWREG16(baseAddress + OFS_LIB_PAOUT) ^= selectedPins; 162 } 163 164 165 void GPIO_setAsInputPinWithPullDownResistor(uint_fast8_t selectedPort, 166 uint_fast16_t selectedPins) 167 { 168 169 uint32_t baseAddress = GPIO_PORT_TO_BASE[selectedPort]; 170 171 HWREG16(baseAddress + OFS_LIB_PASEL0) &= ~selectedPins; 172 HWREG16(baseAddress + OFS_LIB_PASEL1) &= ~selectedPins; 173 174 HWREG16(baseAddress + OFS_LIB_PADIR) &= ~selectedPins; 175 HWREG16(baseAddress + OFS_LIB_PAREN) |= selectedPins; 176 HWREG16(baseAddress + OFS_LIB_PAOUT) &= ~selectedPins; 177 } 178 179 180 void GPIO_setAsInputPinWithPullUpResistor(uint_fast8_t selectedPort, 181 uint_fast16_t selectedPins) 182 { 183 184 uint32_t baseAddress = GPIO_PORT_TO_BASE[selectedPort]; 185 186 HWREG16(baseAddress + OFS_LIB_PASEL0) &= ~selectedPins; 187 HWREG16(baseAddress + OFS_LIB_PASEL1) &= ~selectedPins; 188 HWREG16(baseAddress + OFS_LIB_PADIR) &= ~selectedPins; 189 HWREG16(baseAddress + OFS_LIB_PAREN) |= selectedPins; 190 HWREG16(baseAddress + OFS_LIB_PAOUT) |= selectedPins; 191 } 192 193 194 uint8_t GPIO_getInputPinValue(uint_fast8_t selectedPort, 195 uint_fast16_t selectedPins) 196 { 197 uint_fast16_t inputPinValue; 198 uint32_t baseAddress = GPIO_PORT_TO_BASE[selectedPort]; 199 200 inputPinValue = HWREG16(baseAddress + OFS_LIB_PAIN) & (selectedPins); 201 202 if (inputPinValue > 0) 203 return GPIO_INPUT_PIN_HIGH; 204 return GPIO_INPUT_PIN_LOW; 205 } 206 207 208 void GPIO_enableInterrupt(uint_fast8_t selectedPort, uint_fast16_t selectedPins) 209 { 210 211 uint32_t baseAddress = GPIO_PORT_TO_BASE[selectedPort]; 212 213 HWREG16(baseAddress + OFS_LIB_PAIE) |= selectedPins; 214 } 215 216 217 void GPIO_disableInterrupt(uint_fast8_t selectedPort, 218 uint_fast16_t selectedPins) 219 { 220 221 uint32_t baseAddress = GPIO_PORT_TO_BASE[selectedPort]; 222 223 HWREG16(baseAddress + OFS_LIB_PAIE) &= ~selectedPins; 224 } 225 226 227 uint_fast16_t GPIO_getInterruptStatus(uint_fast8_t selectedPort, 228 uint_fast16_t selectedPins) 229 { 230 231 uint32_t baseAddress = GPIO_PORT_TO_BASE[selectedPort]; 232 233 return HWREG16(baseAddress + OFS_LIB_PAIFG) & selectedPins; 234 } 235 236 237 void GPIO_clearInterruptFlag(uint_fast8_t selectedPort, 238 uint_fast16_t selectedPins) 239 { 240 241 uint32_t baseAddress = GPIO_PORT_TO_BASE[selectedPort]; 242 243 244 HWREG16(baseAddress + OFS_LIB_PAIFG) &= ~selectedPins; 245 } 246 247 248 void GPIO_interruptEdgeSelect(uint_fast8_t selectedPort, 249 uint_fast16_t selectedPins, uint_fast8_t edgeSelect) 250 { 251 252 uint32_t baseAddress = GPIO_PORT_TO_BASE[selectedPort]; 253 254 255 if (GPIO_LOW_TO_HIGH_TRANSITION == edgeSelect) 256 HWREG16(baseAddress + OFS_LIB_PAIES) &= ~selectedPins; 257 else 258 HWREG16(baseAddress + OFS_LIB_PAIES) |= selectedPins; 259 } 260 261 uint_fast16_t GPIO_getEnabledInterruptStatus(uint_fast8_t selectedPort) 262 { 263 uint_fast16_t pendingInts; 264 uint32_t baseAddr; 265 266 pendingInts = GPIO_getInterruptStatus(selectedPort, 0xFFFF); 267 baseAddr = GPIO_PORT_TO_BASE[selectedPort]; 268 269 ASSERT(baseAddr != 0xFFFF); 270 271 switch (selectedPort) 272 { 273 case GPIO_PORT_P1: 274 case GPIO_PORT_P3: 275 case GPIO_PORT_P5: 276 case GPIO_PORT_P7: 277 case GPIO_PORT_P9: 278 return (HWREG8(baseAddr + OFS_LIB_P1IE) & pendingInts); 279 case GPIO_PORT_P2: 280 case GPIO_PORT_P4: 281 case GPIO_PORT_P6: 282 case GPIO_PORT_P8: 283 case GPIO_PORT_P10: 284 return (HWREG8(baseAddr + OFS_LIB_P2IE) & pendingInts); 285 case GPIO_PORT_PJ: 286 return (HWREG16(baseAddr + OFS_LIB_PAIE) & pendingInts); 287 default: 288 return 0; 289 } 290 } 291 292 293 void GPIO_setDriveStrengthHigh(uint_fast8_t selectedPort, 294 uint_fast8_t selectedPins) 295 { 296 uint32_t baseAddr; 297 298 baseAddr = GPIO_PORT_TO_BASE[selectedPort]; 299 300 HWREG8(baseAddr + OFS_LIB_PADS) |= selectedPins; 301 302 } 303 304 void GPIO_setDriveStrengthLow(uint_fast8_t selectedPort, 305 uint_fast8_t selectedPins) 306 { 307 uint32_t baseAddr; 308 309 baseAddr = GPIO_PORT_TO_BASE[selectedPort]; 310 311 HWREG8(baseAddr + OFS_LIB_PADS) &= ~selectedPins; 312 313 } 314 315 void GPIO_registerInterrupt(uint_fast8_t selectedPort, void (*intHandler)(void)) 316 { 317 uint32_t wPortInt; 318 319 wPortInt = GPIO_PORT_TO_INT[selectedPort]; 320 321 // 322 // Register the interrupt handler, returning an error if an error occurs. 323 // 324 Interrupt_registerInterrupt(wPortInt, intHandler); 325 326 // 327 // Enable the system control interrupt. 328 // 329 Interrupt_enableInterrupt(wPortInt); 330 } 331 332 333 void GPIO_unregisterInterrupt(uint_fast8_t selectedPort) 334 { 335 uint32_t wPortInt; 336 337 wPortInt = GPIO_PORT_TO_INT[selectedPort]; 338 339 // 340 // Disable the interrupt. 341 // 342 Interrupt_disableInterrupt(wPortInt); 343 344 // 345 // Unregister the interrupt handler. 346 // 347 Interrupt_unregisterInterrupt(wPortInt); 348 } 349 350 351