xref: /btstack/port/max32630-fthr/src/btstack_port.c (revision d40c3de009bce6994e726da5a427e08951b353d9)
1 /*******************************************************************************
2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
3 * Author: Ismail H. Kose <[email protected]>
4 *
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15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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33 */
34 
35 #include "hal_tick.h"
36 #include <stdio.h>
37 #include <string.h>
38 #include "lp.h"
39 #include "uart.h"
40 #include "board.h"
41 #include "btstack_debug.h"
42 
43 #include "btstack.h"
44 #include "btstack_config.h"
45 #include "btstack_run_loop_embedded.h"
46 #include "btstack_chipset_cc256x.h"
47 #include "btstack_port.h"
48 
49 #define CC256X_UART_ID             0
50 #define UART_RXFIFO_USABLE     (MXC_UART_FIFO_DEPTH-3)
51 
52 static uint32_t baud_rate;
53 
54 // rx state
55 static int  bytes_to_read = 0;
56 static uint8_t * rx_buffer_ptr = 0;
57 
58 // tx state
59 static int bytes_to_write = 0;
60 static uint8_t * tx_buffer_ptr = 0;
61 
62 const gpio_cfg_t PAN1326_SLOW_CLK = { PORT_1, PIN_7, GPIO_FUNC_GPIO,
63 		GPIO_PAD_NORMAL };
64 const gpio_cfg_t PAN1326_nSHUTD = { PORT_1, PIN_6, GPIO_FUNC_GPIO,
65 		GPIO_PAD_NORMAL };
66 const gpio_cfg_t PAN1326_HCIRTS = { PORT_0, PIN_3, GPIO_FUNC_GPIO,
67 		GPIO_PAD_NORMAL };
68 
69 static void dummy_handler(void) {};
70 static void (*rx_done_handler)(void) = dummy_handler;
71 static void (*tx_done_handler)(void) = dummy_handler;
72 
73 void hal_cpu_disable_irqs(void)
74 {
75 	__disable_irq();
76 }
77 
78 void hal_cpu_enable_irqs(void)
79 {
80 	__enable_irq();
81 }
82 void hal_cpu_enable_irqs_and_sleep(void)
83 {
84 
85 }
86 
87 void hal_uart_dma_send_block(const uint8_t *buffer, uint16_t len)
88 {
89 	tx_buffer_ptr = (uint8_t *)buffer;
90 	bytes_to_write = len;
91 }
92 
93 void hal_uart_dma_receive_block(uint8_t *buffer, uint16_t len)
94 {
95 	rx_buffer_ptr = buffer;
96 	bytes_to_read = len;
97 }
98 
99 void hal_btstack_run_loop_execute_once(void)
100 {
101 	int rx_avail;
102 	int num_rx_bytes;
103 	int tx_avail;
104 	int rx_bytes;
105 	int tx_bytes;
106 	int ret;
107 
108     while (bytes_to_read) {
109 		rx_avail = UART_NumReadAvail(MXC_UART_GET_UART(CC256X_UART_ID));
110 		if (!rx_avail)
111 			break;
112 
113 		if (bytes_to_read > rx_avail)
114 			num_rx_bytes = rx_avail;
115 		else
116 			num_rx_bytes = bytes_to_read;
117 
118 		ret = UART_Read(MXC_UART_GET_UART(CC256X_UART_ID), rx_buffer_ptr, num_rx_bytes, &rx_bytes);
119 		if (ret < 0)
120 			break;
121 
122 		rx_buffer_ptr += rx_bytes;
123         bytes_to_read -= rx_bytes;
124 
125 		 if (bytes_to_read < 0) {
126 			bytes_to_read = 0;
127 		}
128 
129          if (bytes_to_read == 0){
130              (*rx_done_handler)();
131          }
132      }
133 
134      while (bytes_to_write) {
135 		tx_avail = UART_NumWriteAvail(MXC_UART_GET_UART(CC256X_UART_ID));
136 		if (!tx_avail)
137 			break;
138 
139 		if (bytes_to_write > tx_avail)
140 			tx_bytes = tx_avail;
141 		else
142 			tx_bytes = bytes_to_write;
143 
144 		ret = UART_Write(MXC_UART_GET_UART(CC256X_UART_ID), tx_buffer_ptr, tx_bytes);
145 		if (ret < 0)
146 			break;
147 		bytes_to_write -= tx_bytes;
148 		tx_buffer_ptr += tx_bytes;
149 		if (bytes_to_write < 0) {
150 			bytes_to_write = 0;
151 		}
152 
153         if (bytes_to_write == 0){
154              (*tx_done_handler)();
155         }
156      }
157 
158 	btstack_run_loop_embedded_execute_once();
159 }
160 
161 void hal_uart_init(void)
162 {
163 	int error = 0;
164 	uart_cfg_t cfg;
165 
166 	cfg.parity = UART_PARITY_DISABLE;
167 	cfg.size = UART_DATA_SIZE_8_BITS;
168 	cfg.extra_stop = 0;
169 	cfg.cts = 1;
170 	cfg.rts = 1;
171 
172 	cfg.baud = baud_rate;
173 
174 	sys_cfg_uart_t sys_cfg;
175 	sys_cfg.clk_scale = CLKMAN_SCALE_AUTO;
176 
177 	sys_cfg.io_cfg = (ioman_cfg_t )IOMAN_UART(0,
178 			IOMAN_MAP_B, // io_map
179 			IOMAN_MAP_B, // cts_map
180 			IOMAN_MAP_B, // rts_map
181 			1, // io_en
182 			1, // cts_en
183 			1); //rts_en
184 
185 	if ((error = UART_Init(MXC_UART_GET_UART(CC256X_UART_ID), &cfg, &sys_cfg)) != E_NO_ERROR) {
186 		printf("Error initializing UART %d\n", error);
187 		while (1);
188 	} else {
189 		printf("BTSTACK UART Initialized\n");
190 	}
191 
192 	MXC_UART_GET_UART(CC256X_UART_ID)->ctrl |= MXC_F_UART_CTRL_CTS_POLARITY | MXC_F_UART_CTRL_RTS_POLARITY;
193 	MXC_UART_GET_UART(CC256X_UART_ID)->ctrl &= ~((MXC_UART_FIFO_DEPTH - 4) << (MXC_F_UART_CTRL_RTS_LEVEL_POS));
194 	MXC_UART_GET_UART(CC256X_UART_ID)->ctrl |= ((UART_RXFIFO_USABLE) << MXC_F_UART_CTRL_RTS_LEVEL_POS);
195 }
196 
197 int hal_uart_dma_set_baud(uint32_t baud){
198 	baud_rate = baud;
199 	printf("BAUD RATE IS = %d \n", baud);
200 	hal_uart_init();
201 	return baud_rate;
202 }
203 
204 void hal_uart_dma_init(void){
205 	bytes_to_write = 0;
206 	bytes_to_read = 0;
207 	hal_uart_dma_set_baud(115200);
208 }
209 
210 void hal_uart_dma_set_block_received( void (*block_handler)(void)){
211 	rx_done_handler = block_handler;
212 }
213 
214 void hal_uart_dma_set_block_sent( void (*block_handler)(void)){
215 
216 	tx_done_handler = block_handler;
217 }
218 
219 void hal_uart_dma_set_csr_irq_handler( void (*csr_irq_handler)(void)){
220 
221 }
222 
223 void hal_uart_dma_set_sleep(uint8_t sleep){
224 
225 }
226 
227 void init_slow_clock(void)
228 {
229 	MXC_PWRSEQ->reg0 &= ~(MXC_F_PWRSEQ_REG0_PWR_RTCEN_RUN | MXC_F_PWRSEQ_REG0_PWR_RTCEN_SLP);
230 	MXC_PWRSEQ->reg4 &= ~MXC_F_PWRSEQ_REG4_PWR_PSEQ_32K_EN;
231 	MXC_PWRSEQ->reg0 |= MXC_F_PWRSEQ_REG0_PWR_RTCEN_RUN | MXC_F_PWRSEQ_REG0_PWR_RTCEN_SLP; // Enable RTC
232 	hal_delay_us(1);
233 	MXC_PWRSEQ->reg4 |= MXC_F_PWRSEQ_REG4_PWR_PSEQ_32K_EN; // Enable the RTC out of P1.7
234 }
235 
236 int bt_comm_init() {
237 	int error = 0;
238 	int cnt = 0;
239 
240 	hal_tick_init();
241 	hal_delay_us(1);
242 	if ((error = GPIO_Config(&PAN1326_HCIRTS)) != E_NO_ERROR) {
243 		printf("Error setting PAN1326_HCIRTS %d\n", error);
244 	}
245 	GPIO_OutSet(&PAN1326_HCIRTS);
246 	init_slow_clock();
247 	/*
248 	 * when enabling the P1.7 RTC output, P1.6 will be hardcoded to an input with 25k pullup enabled.
249 	 * There is an internal pullup, so when it is set as an input, it will float high.
250 	 * The PAN1326B data sheet says the NSHUTD pin is pulled down, but the input impedance is stated at 1Meg Ohm,
251 	 * The so the 25k pullup should be enough to reach the minimum 1.42V to enable the device.
252 	 * */
253 	while (GPIO_InGet(&PAN1326_HCIRTS)) {
254 		cnt++;
255 	}
256 
257 	printf("%s CC256X init completed. cnt: %d \n", __func__, cnt);
258 	return 0;
259 }
260 
261 static hci_transport_config_uart_t config = {
262 	    HCI_TRANSPORT_CONFIG_UART,
263 	    115200,
264 	    4000000,
265 	    1, // flow control
266 	    "max32630fthr",
267 	};
268 
269 // hal_led.h implementation
270 #include "hal_led.h"
271 void hal_led_off(void){
272 }
273 void hal_led_on(void){
274 }
275 void hal_led_toggle(void){
276 }
277 
278 int bluetooth_main(void)
279 {
280 	bt_comm_init();
281 	/* BT Stack Initialization */
282 	btstack_memory_init();
283 	btstack_run_loop_init(btstack_run_loop_embedded_get_instance());
284 
285 	/* Init HCI */
286 	const hci_transport_t * transport = hci_transport_h4_instance(btstack_uart_block_embedded_instance());
287 	const btstack_link_key_db_t *link_key_db = NULL;
288 
289 	hci_init(transport, &config);
290 	hci_set_link_key_db(link_key_db);
291 
292 	hci_set_chipset(btstack_chipset_cc256x_instance());
293 	btstack_main(0, (void *)NULL);
294 
295 	return 0;
296 }
297