1*1664436fSMatthias Ringwald /**
2*1664436fSMatthias Ringwald * @file hal_board.c
3*1664436fSMatthias Ringwald *
4*1664436fSMatthias Ringwald * Copyright 2008 Texas Instruments, Inc.
5*1664436fSMatthias Ringwald ******************************************************************************/
6*1664436fSMatthias Ringwald #include "hal_board.h"
7*1664436fSMatthias Ringwald
8*1664436fSMatthias Ringwald #include "msp430x54x.h"
9*1664436fSMatthias Ringwald
10*1664436fSMatthias Ringwald #include "hal_compat.h"
11*1664436fSMatthias Ringwald #include "hal_adc.h"
12*1664436fSMatthias Ringwald #include "hal_usb.h"
13*1664436fSMatthias Ringwald
14*1664436fSMatthias Ringwald static void halBoardSetVCoreUp(unsigned char level);
15*1664436fSMatthias Ringwald static void halBoardSetVCoreDown(unsigned char level);
16*1664436fSMatthias Ringwald static void halBoardGetSystemClockSettings(unsigned char systemClockSpeed,
17*1664436fSMatthias Ringwald unsigned char *setDcoRange,
18*1664436fSMatthias Ringwald unsigned char *setVCore,
19*1664436fSMatthias Ringwald unsigned int *setMultiplier);
20*1664436fSMatthias Ringwald
21*1664436fSMatthias Ringwald /************************************************************************
22*1664436fSMatthias Ringwald * @brief Increments the VCore setting.
23*1664436fSMatthias Ringwald *
24*1664436fSMatthias Ringwald * @param level The target VCore setting
25*1664436fSMatthias Ringwald *
26*1664436fSMatthias Ringwald * @return none
27*1664436fSMatthias Ringwald *************************************************************************/
halBoardSetVCoreUp(unsigned char level)28*1664436fSMatthias Ringwald static void halBoardSetVCoreUp (unsigned char level)
29*1664436fSMatthias Ringwald {
30*1664436fSMatthias Ringwald // Open PMM module registers for write access
31*1664436fSMatthias Ringwald PMMCTL0_H = 0xA5;
32*1664436fSMatthias Ringwald
33*1664436fSMatthias Ringwald // Set SVS/M high side to new level
34*1664436fSMatthias Ringwald SVSMHCTL = (SVSMHCTL & ~(SVSHRVL0*3 + SVSMHRRL0)) | \
35*1664436fSMatthias Ringwald (SVSHE + SVSHRVL0 * level + SVMHE + SVSMHRRL0 * level);
36*1664436fSMatthias Ringwald
37*1664436fSMatthias Ringwald // Set SVM new Level
38*1664436fSMatthias Ringwald SVSMLCTL = SVSLE + SVMLE + SVSMLRRL0 * level;
39*1664436fSMatthias Ringwald // Set SVS/M low side to new level
40*1664436fSMatthias Ringwald SVSMLCTL = (SVSMLCTL & ~(SVSMLRRL_3)) | (SVMLE + SVSMLRRL0 * level);
41*1664436fSMatthias Ringwald
42*1664436fSMatthias Ringwald while ((PMMIFG & SVSMLDLYIFG) == 0); // Wait till SVM is settled (Delay)
43*1664436fSMatthias Ringwald PMMCTL0_L = PMMCOREV0 * level; // Set VCore to x
44*1664436fSMatthias Ringwald PMMIFG &= ~(SVMLVLRIFG + SVMLIFG); // Clear already set flags
45*1664436fSMatthias Ringwald
46*1664436fSMatthias Ringwald if ((PMMIFG & SVMLIFG))
47*1664436fSMatthias Ringwald while ((PMMIFG & SVMLVLRIFG) == 0); // Wait till level is reached
48*1664436fSMatthias Ringwald
49*1664436fSMatthias Ringwald // Set SVS/M Low side to new level
50*1664436fSMatthias Ringwald SVSMLCTL = (SVSMLCTL & ~(SVSLRVL0*3 + SVSMLRRL_3)) | \
51*1664436fSMatthias Ringwald (SVSLE + SVSLRVL0 * level + SVMLE + SVSMLRRL0 * level);
52*1664436fSMatthias Ringwald
53*1664436fSMatthias Ringwald // Lock PMM module registers from write access
54*1664436fSMatthias Ringwald PMMCTL0_H = 0x00;
55*1664436fSMatthias Ringwald }
56*1664436fSMatthias Ringwald
57*1664436fSMatthias Ringwald /************************************************************************
58*1664436fSMatthias Ringwald * @brief Decrements the VCore setting.
59*1664436fSMatthias Ringwald *
60*1664436fSMatthias Ringwald * @param level The target VCore.
61*1664436fSMatthias Ringwald *
62*1664436fSMatthias Ringwald * @return none
63*1664436fSMatthias Ringwald *************************************************************************/
halBoardSetVCoreDown(unsigned char level)64*1664436fSMatthias Ringwald static void halBoardSetVCoreDown(unsigned char level)
65*1664436fSMatthias Ringwald {
66*1664436fSMatthias Ringwald // Open PMM module registers for write access
67*1664436fSMatthias Ringwald PMMCTL0_H = 0xA5;
68*1664436fSMatthias Ringwald
69*1664436fSMatthias Ringwald // Set SVS/M low side to new level
70*1664436fSMatthias Ringwald SVSMLCTL = (SVSMLCTL & ~(SVSLRVL0*3 + SVSMLRRL_3)) | \
71*1664436fSMatthias Ringwald (SVSLRVL0 * level + SVMLE + SVSMLRRL0 * level);
72*1664436fSMatthias Ringwald
73*1664436fSMatthias Ringwald while ((PMMIFG & SVSMLDLYIFG) == 0); // Wait till SVM is settled (Delay)
74*1664436fSMatthias Ringwald PMMCTL0_L = (level * PMMCOREV0); // Set VCore to new level
75*1664436fSMatthias Ringwald // Lock PMM module registers for write access
76*1664436fSMatthias Ringwald
77*1664436fSMatthias Ringwald PMMCTL0_H = 0x00;
78*1664436fSMatthias Ringwald }
79*1664436fSMatthias Ringwald
80*1664436fSMatthias Ringwald /************************************************************************
81*1664436fSMatthias Ringwald * @brief Get function for the DCORSEL, VCORE, and DCO multiplier settings
82*1664436fSMatthias Ringwald * that map to a given clock speed.
83*1664436fSMatthias Ringwald *
84*1664436fSMatthias Ringwald * @param systemClockSpeed Target DCO frequency - SYSCLK_xxMHZ.
85*1664436fSMatthias Ringwald *
86*1664436fSMatthias Ringwald * @param setDcoRange Pointer to the DCO range select bits.
87*1664436fSMatthias Ringwald *
88*1664436fSMatthias Ringwald * @param setVCore Pointer to the VCore level bits.
89*1664436fSMatthias Ringwald *
90*1664436fSMatthias Ringwald * @param setMultiplier Pointer to the DCO multiplier bits.
91*1664436fSMatthias Ringwald *
92*1664436fSMatthias Ringwald * @return none
93*1664436fSMatthias Ringwald ************************************************************************/
halBoardGetSystemClockSettings(unsigned char systemClockSpeed,unsigned char * setDcoRange,unsigned char * setVCore,unsigned int * setMultiplier)94*1664436fSMatthias Ringwald static void halBoardGetSystemClockSettings(unsigned char systemClockSpeed,
95*1664436fSMatthias Ringwald unsigned char *setDcoRange,
96*1664436fSMatthias Ringwald unsigned char *setVCore,
97*1664436fSMatthias Ringwald unsigned int *setMultiplier)
98*1664436fSMatthias Ringwald {
99*1664436fSMatthias Ringwald switch (systemClockSpeed)
100*1664436fSMatthias Ringwald {
101*1664436fSMatthias Ringwald case SYSCLK_1MHZ:
102*1664436fSMatthias Ringwald *setDcoRange = DCORSEL_1MHZ;
103*1664436fSMatthias Ringwald *setVCore = VCORE_1MHZ;
104*1664436fSMatthias Ringwald *setMultiplier = DCO_MULT_1MHZ;
105*1664436fSMatthias Ringwald break;
106*1664436fSMatthias Ringwald case SYSCLK_4MHZ:
107*1664436fSMatthias Ringwald *setDcoRange = DCORSEL_4MHZ;
108*1664436fSMatthias Ringwald *setVCore = VCORE_4MHZ;
109*1664436fSMatthias Ringwald *setMultiplier = DCO_MULT_4MHZ;
110*1664436fSMatthias Ringwald break;
111*1664436fSMatthias Ringwald case SYSCLK_8MHZ:
112*1664436fSMatthias Ringwald *setDcoRange = DCORSEL_8MHZ;
113*1664436fSMatthias Ringwald *setVCore = VCORE_8MHZ;
114*1664436fSMatthias Ringwald *setMultiplier = DCO_MULT_8MHZ;
115*1664436fSMatthias Ringwald break;
116*1664436fSMatthias Ringwald case SYSCLK_12MHZ:
117*1664436fSMatthias Ringwald *setDcoRange = DCORSEL_12MHZ;
118*1664436fSMatthias Ringwald *setVCore = VCORE_12MHZ;
119*1664436fSMatthias Ringwald *setMultiplier = DCO_MULT_12MHZ;
120*1664436fSMatthias Ringwald break;
121*1664436fSMatthias Ringwald case SYSCLK_16MHZ:
122*1664436fSMatthias Ringwald *setDcoRange = DCORSEL_16MHZ;
123*1664436fSMatthias Ringwald *setVCore = VCORE_16MHZ;
124*1664436fSMatthias Ringwald *setMultiplier = DCO_MULT_16MHZ;
125*1664436fSMatthias Ringwald break;
126*1664436fSMatthias Ringwald /*-------------------------------------
127*1664436fSMatthias Ringwald * Commented out because fmax = 18 MHz
128*1664436fSMatthias Ringwald * ------------------------------------
129*1664436fSMatthias Ringwald case SYSCLK_20MHZ:
130*1664436fSMatthias Ringwald *setDcoRange = DCORSEL_20MHZ;
131*1664436fSMatthias Ringwald *setVCore = VCORE_20MHZ;
132*1664436fSMatthias Ringwald *setMultiplier = DCO_MULT_20MHZ;
133*1664436fSMatthias Ringwald break;
134*1664436fSMatthias Ringwald case SYSCLK_25MHZ:
135*1664436fSMatthias Ringwald *setDcoRange = DCORSEL_25MHZ;
136*1664436fSMatthias Ringwald *setVCore = VCORE_25MHZ;
137*1664436fSMatthias Ringwald *setMultiplier = DCO_MULT_25MHZ;
138*1664436fSMatthias Ringwald break;
139*1664436fSMatthias Ringwald *-------------------------------------*/
140*1664436fSMatthias Ringwald }
141*1664436fSMatthias Ringwald }
142*1664436fSMatthias Ringwald
143*1664436fSMatthias Ringwald /************************************************************************
144*1664436fSMatthias Ringwald * @brief Set function for the PMM core voltage (PMMCOREV) setting
145*1664436fSMatthias Ringwald *
146*1664436fSMatthias Ringwald * @param level Target VCore setting
147*1664436fSMatthias Ringwald *
148*1664436fSMatthias Ringwald * @return none
149*1664436fSMatthias Ringwald *************************************************************************/
halBoardSetVCore(unsigned char level)150*1664436fSMatthias Ringwald void halBoardSetVCore(unsigned char level)
151*1664436fSMatthias Ringwald {
152*1664436fSMatthias Ringwald unsigned int currentVCore;
153*1664436fSMatthias Ringwald
154*1664436fSMatthias Ringwald currentVCore = PMMCTL0 & PMMCOREV_3; // Get actual VCore
155*1664436fSMatthias Ringwald // Change VCore step by step
156*1664436fSMatthias Ringwald while (level != currentVCore)
157*1664436fSMatthias Ringwald {
158*1664436fSMatthias Ringwald if (level > currentVCore)
159*1664436fSMatthias Ringwald halBoardSetVCoreUp(++currentVCore);
160*1664436fSMatthias Ringwald else
161*1664436fSMatthias Ringwald halBoardSetVCoreDown(--currentVCore);
162*1664436fSMatthias Ringwald }
163*1664436fSMatthias Ringwald }
164*1664436fSMatthias Ringwald
165*1664436fSMatthias Ringwald /************************************************************************
166*1664436fSMatthias Ringwald * @brief Disables all supply voltage supervision and monitoring.
167*1664436fSMatthias Ringwald *
168*1664436fSMatthias Ringwald * @param none
169*1664436fSMatthias Ringwald *
170*1664436fSMatthias Ringwald * @return none
171*1664436fSMatthias Ringwald *************************************************************************/
halBoardDisableSVS(void)172*1664436fSMatthias Ringwald void halBoardDisableSVS(void)
173*1664436fSMatthias Ringwald {
174*1664436fSMatthias Ringwald // Open PMM module registers for write access
175*1664436fSMatthias Ringwald PMMCTL0_H = 0xA5;
176*1664436fSMatthias Ringwald
177*1664436fSMatthias Ringwald SVSMLCTL &= ~( SVMLE + SVSLE + SVSLFP + SVMLFP ); // Disable Low side SVM
178*1664436fSMatthias Ringwald SVSMHCTL &= ~( SVMHE + SVSHE + SVSHFP + SVMHFP ); // Disable High side SVM
179*1664436fSMatthias Ringwald PMMCTL1 = PMMREFMD;
180*1664436fSMatthias Ringwald
181*1664436fSMatthias Ringwald // Lock PMM module registers for write access
182*1664436fSMatthias Ringwald PMMCTL0_H = 0x00;
183*1664436fSMatthias Ringwald }
184*1664436fSMatthias Ringwald
185*1664436fSMatthias Ringwald /************************************************************************
186*1664436fSMatthias Ringwald * @brief Enables all supply voltage supervision and monitoring
187*1664436fSMatthias Ringwald *
188*1664436fSMatthias Ringwald * @param none
189*1664436fSMatthias Ringwald *
190*1664436fSMatthias Ringwald * @return none
191*1664436fSMatthias Ringwald *************************************************************************/
halBoardEnableSVS(void)192*1664436fSMatthias Ringwald void halBoardEnableSVS(void)
193*1664436fSMatthias Ringwald {
194*1664436fSMatthias Ringwald // Open PMM module registers for write access
195*1664436fSMatthias Ringwald PMMCTL0_H = 0xA5;
196*1664436fSMatthias Ringwald
197*1664436fSMatthias Ringwald /*-----------
198*1664436fSMatthias Ringwald * NOTE: To attain the expected < 6 us wakeup from LPM modes, the following
199*1664436fSMatthias Ringwald * two lines must be commented out due to the fact that the PMM will hold
200*1664436fSMatthias Ringwald * the CPU until the reference is fully settled.
201*1664436fSMatthias Ringwald *----------*/
202*1664436fSMatthias Ringwald SVSMHCTL &= ~(SVSHFP+SVMHFP); // Disable full-performance mode
203*1664436fSMatthias Ringwald SVSMLCTL &= ~(SVSLFP+SVMLFP); // Disable full-performance mode
204*1664436fSMatthias Ringwald SVSMLCTL |= ( SVMLE + SVSLE); // Enable Low side SVM
205*1664436fSMatthias Ringwald SVSMHCTL |= ( SVMHE + SVSHE); // Enable High side SVM
206*1664436fSMatthias Ringwald PMMCTL1 &= ~PMMREFMD;
207*1664436fSMatthias Ringwald
208*1664436fSMatthias Ringwald // Lock PMM module registers for write access
209*1664436fSMatthias Ringwald PMMCTL0_H = 0x00;
210*1664436fSMatthias Ringwald }
211*1664436fSMatthias Ringwald
212*1664436fSMatthias Ringwald /************************************************************************
213*1664436fSMatthias Ringwald * @brief Initialization routine for XT1.
214*1664436fSMatthias Ringwald *
215*1664436fSMatthias Ringwald * Sets the necessary internal capacitor values and loops until all
216*1664436fSMatthias Ringwald * ocillator fault flags remain cleared.
217*1664436fSMatthias Ringwald *
218*1664436fSMatthias Ringwald * @param none
219*1664436fSMatthias Ringwald *
220*1664436fSMatthias Ringwald * @return none
221*1664436fSMatthias Ringwald *************************************************************************/
halBoardStartXT1(void)222*1664436fSMatthias Ringwald void halBoardStartXT1(void)
223*1664436fSMatthias Ringwald {
224*1664436fSMatthias Ringwald // Set up XT1 Pins to analog function, and to lowest drive
225*1664436fSMatthias Ringwald P7SEL |= 0x03;
226*1664436fSMatthias Ringwald UCSCTL6 |= XCAP_3 ; // Set internal cap values
227*1664436fSMatthias Ringwald
228*1664436fSMatthias Ringwald while(SFRIFG1 & OFIFG) { // Check OFIFG fault flag
229*1664436fSMatthias Ringwald while ( (SFRIFG1 & OFIFG)) // Check OFIFG fault flag
230*1664436fSMatthias Ringwald {
231*1664436fSMatthias Ringwald // Clear OSC fault flags
232*1664436fSMatthias Ringwald UCSCTL7 &= ~(DCOFFG + XT1LFOFFG + XT1HFOFFG + XT2OFFG);
233*1664436fSMatthias Ringwald SFRIFG1 &= ~OFIFG; // Clear OFIFG fault flag
234*1664436fSMatthias Ringwald }
235*1664436fSMatthias Ringwald UCSCTL6 &= ~(XT1DRIVE1_L+XT1DRIVE0); // Reduce the drive strength
236*1664436fSMatthias Ringwald }
237*1664436fSMatthias Ringwald }
238*1664436fSMatthias Ringwald
239*1664436fSMatthias Ringwald /************************************************************************
240*1664436fSMatthias Ringwald * @brief Set function for MCLK frequency.
241*1664436fSMatthias Ringwald *
242*1664436fSMatthias Ringwald * @param systemClockSpeed Intended frequency of operation - SYSCLK_xxMHZ.
243*1664436fSMatthias Ringwald *
244*1664436fSMatthias Ringwald * @return none
245*1664436fSMatthias Ringwald *************************************************************************/
halBoardSetSystemClock(unsigned char systemClockSpeed)246*1664436fSMatthias Ringwald void halBoardSetSystemClock(unsigned char systemClockSpeed)
247*1664436fSMatthias Ringwald {
248*1664436fSMatthias Ringwald unsigned char setDcoRange = 0;
249*1664436fSMatthias Ringwald unsigned char setVCore = 0;
250*1664436fSMatthias Ringwald unsigned int setMultiplier = 0;
251*1664436fSMatthias Ringwald
252*1664436fSMatthias Ringwald halBoardGetSystemClockSettings( systemClockSpeed, &setDcoRange, \
253*1664436fSMatthias Ringwald &setVCore, &setMultiplier);
254*1664436fSMatthias Ringwald
255*1664436fSMatthias Ringwald if (setVCore > (PMMCTL0 & PMMCOREV_3)) // Only change VCore if necessary
256*1664436fSMatthias Ringwald halBoardSetVCore( setVCore );
257*1664436fSMatthias Ringwald
258*1664436fSMatthias Ringwald UCSCTL0 = 0x00; // Set lowest possible DCOx, MODx
259*1664436fSMatthias Ringwald UCSCTL1 = setDcoRange; // Select suitable range
260*1664436fSMatthias Ringwald
261*1664436fSMatthias Ringwald UCSCTL2 = setMultiplier + FLLD_1; // Set DCO Multiplier
262*1664436fSMatthias Ringwald UCSCTL4 = SELA__XT1CLK | SELS__DCOCLKDIV | SELM__DCOCLKDIV ;
263*1664436fSMatthias Ringwald
264*1664436fSMatthias Ringwald // Worst-case settling time for the DCO when the DCO range bits have been
265*1664436fSMatthias Ringwald // changed is n x 32 x 32 x f_FLL_reference. See UCS chapter in 5xx UG
266*1664436fSMatthias Ringwald // for optimization.
267*1664436fSMatthias Ringwald // 32 x 32 x / f_FLL_reference (32,768 Hz) = .03125 = t_DCO_settle
268*1664436fSMatthias Ringwald // t_DCO_settle / (1 / 18 MHz) = 562500 = counts_DCO_settle
269*1664436fSMatthias Ringwald
270*1664436fSMatthias Ringwald // __delay_cycles(562500);
271*1664436fSMatthias Ringwald int i;
272*1664436fSMatthias Ringwald for (i=0;i<10;i++){
273*1664436fSMatthias Ringwald __delay_cycles(56250);
274*1664436fSMatthias Ringwald }
275*1664436fSMatthias Ringwald }
276*1664436fSMatthias Ringwald
277*1664436fSMatthias Ringwald /************************************************************************
278*1664436fSMatthias Ringwald * @brief Initializes ACLK, MCLK, SMCLK outputs on P11.0, P11.1,
279*1664436fSMatthias Ringwald * and P11.2, respectively.
280*1664436fSMatthias Ringwald *
281*1664436fSMatthias Ringwald * @param none
282*1664436fSMatthias Ringwald *
283*1664436fSMatthias Ringwald * @return none
284*1664436fSMatthias Ringwald *************************************************************************/
halBoardOutputSystemClock(void)285*1664436fSMatthias Ringwald void halBoardOutputSystemClock(void)
286*1664436fSMatthias Ringwald {
287*1664436fSMatthias Ringwald P11DIR |= 0x07;
288*1664436fSMatthias Ringwald P11SEL |= 0x07;
289*1664436fSMatthias Ringwald }
290*1664436fSMatthias Ringwald
291*1664436fSMatthias Ringwald /************************************************************************
292*1664436fSMatthias Ringwald * @brief Stops the output of ACLK, MCLK, SMCLK on P11.0, P11.1, and P11.2.
293*1664436fSMatthias Ringwald *
294*1664436fSMatthias Ringwald * @param none
295*1664436fSMatthias Ringwald *
296*1664436fSMatthias Ringwald * @return none
297*1664436fSMatthias Ringwald *************************************************************************/
halBoardStopOutputSystemClock(void)298*1664436fSMatthias Ringwald void halBoardStopOutputSystemClock(void)
299*1664436fSMatthias Ringwald {
300*1664436fSMatthias Ringwald P11OUT &= ~0x07;
301*1664436fSMatthias Ringwald P11DIR |= 0x07;
302*1664436fSMatthias Ringwald P11SEL &= ~0x07;
303*1664436fSMatthias Ringwald }
304*1664436fSMatthias Ringwald
305*1664436fSMatthias Ringwald /************************************************************************
306*1664436fSMatthias Ringwald * @brief Initializes all GPIO configurations.
307*1664436fSMatthias Ringwald * TI example did set all ports to OUTPUT, we don't.
308*1664436fSMatthias Ringwald * @param none
309*1664436fSMatthias Ringwald *
310*1664436fSMatthias Ringwald * @return none
311*1664436fSMatthias Ringwald *************************************************************************/
halBoardInit(void)312*1664436fSMatthias Ringwald void halBoardInit(void)
313*1664436fSMatthias Ringwald {
314*1664436fSMatthias Ringwald #if 0
315*1664436fSMatthias Ringwald // ORIGINAL EP
316*1664436fSMatthias Ringwald //Tie unused ports
317*1664436fSMatthias Ringwald PAOUT = 0;
318*1664436fSMatthias Ringwald PADIR = 0xFFFF;
319*1664436fSMatthias Ringwald PASEL = 0;
320*1664436fSMatthias Ringwald PBOUT = 0;
321*1664436fSMatthias Ringwald PBDIR = 0xFFFF;
322*1664436fSMatthias Ringwald PBSEL = 0;
323*1664436fSMatthias Ringwald PCOUT = 0;
324*1664436fSMatthias Ringwald PCDIR = 0xFFFF;
325*1664436fSMatthias Ringwald PCSEL = 0;
326*1664436fSMatthias Ringwald PDOUT = 0;
327*1664436fSMatthias Ringwald PDDIR = 0xFFFF;
328*1664436fSMatthias Ringwald PDSEL = 0;
329*1664436fSMatthias Ringwald PEOUT = 0;
330*1664436fSMatthias Ringwald PEDIR = 0xFEFF; // P10.0 to USB RST pin,
331*1664436fSMatthias Ringwald // ...if enabled with J5
332*1664436fSMatthias Ringwald PESEL = 0;
333*1664436fSMatthias Ringwald P11OUT = 0;
334*1664436fSMatthias Ringwald P11DIR = 0xFF;
335*1664436fSMatthias Ringwald PJOUT = 0;
336*1664436fSMatthias Ringwald PJDIR = 0xFF;
337*1664436fSMatthias Ringwald P11SEL = 0;
338*1664436fSMatthias Ringwald #else
339*1664436fSMatthias Ringwald //Tie unused ports
340*1664436fSMatthias Ringwald PAOUT = 0;
341*1664436fSMatthias Ringwald PADIR = 0;
342*1664436fSMatthias Ringwald PASEL = 0;
343*1664436fSMatthias Ringwald PBOUT = 0;
344*1664436fSMatthias Ringwald PBDIR = 0;
345*1664436fSMatthias Ringwald PBSEL = 0;
346*1664436fSMatthias Ringwald PCOUT = 0;
347*1664436fSMatthias Ringwald PCDIR = 0;
348*1664436fSMatthias Ringwald PCSEL = 0;
349*1664436fSMatthias Ringwald PDOUT = 0;
350*1664436fSMatthias Ringwald PDDIR = 0;
351*1664436fSMatthias Ringwald PDSEL = 0;
352*1664436fSMatthias Ringwald PEOUT = 0;
353*1664436fSMatthias Ringwald PEDIR = 0;
354*1664436fSMatthias Ringwald PESEL = 0;
355*1664436fSMatthias Ringwald P11OUT = 0;
356*1664436fSMatthias Ringwald P11DIR = 0;
357*1664436fSMatthias Ringwald PJOUT = 0;
358*1664436fSMatthias Ringwald PJDIR = 0;
359*1664436fSMatthias Ringwald P11SEL = 0;
360*1664436fSMatthias Ringwald #endif
361*1664436fSMatthias Ringwald
362*1664436fSMatthias Ringwald AUDIO_PORT_OUT = AUDIO_OUT_PWR_PIN ;
363*1664436fSMatthias Ringwald USB_PORT_DIR &= ~USB_PIN_RXD; // USB RX Pin, Input with
364*1664436fSMatthias Ringwald // ...pulled down Resistor
365*1664436fSMatthias Ringwald USB_PORT_OUT &= ~USB_PIN_RXD;
366*1664436fSMatthias Ringwald USB_PORT_REN |= USB_PIN_RXD;
367*1664436fSMatthias Ringwald }
368