xref: /btstack/chipset/sx128x/SMTC_Drivers/sx1280-driver-c/sx1280-hal.c (revision b22bcb2c4dff490d7633c2ea6dcd20cfac61f55f)
1cb5466b0SMatthias Ringwald /*
2cb5466b0SMatthias Ringwald   ______                              _
3cb5466b0SMatthias Ringwald  / _____)             _              | |
4cb5466b0SMatthias Ringwald ( (____  _____ ____ _| |_ _____  ____| |__
5cb5466b0SMatthias Ringwald  \____ \| ___ |    (_   _) ___ |/ ___)  _ \
6cb5466b0SMatthias Ringwald  _____) ) ____| | | || |_| ____( (___| | | |
7cb5466b0SMatthias Ringwald (______/|_____)_|_|_| \__)_____)\____)_| |_|
8cb5466b0SMatthias Ringwald     (C)2016 Semtech
9cb5466b0SMatthias Ringwald 
10cb5466b0SMatthias Ringwald Description: Handling of the node configuration protocol
11cb5466b0SMatthias Ringwald 
12cb5466b0SMatthias Ringwald License: Revised BSD License, see LICENSE.TXT file include in the project
13cb5466b0SMatthias Ringwald 
14cb5466b0SMatthias Ringwald Maintainer: Miguel Luis, Matthieu Verdy and Benjamin Boulet
15cb5466b0SMatthias Ringwald */
16cb5466b0SMatthias Ringwald #include "hw.h"
17cb5466b0SMatthias Ringwald #include "sx1280-hal.h"
18cb5466b0SMatthias Ringwald #include "radio.h"
19cb5466b0SMatthias Ringwald #include <string.h>
20cb5466b0SMatthias Ringwald 
21cb5466b0SMatthias Ringwald // logging on
22cb5466b0SMatthias Ringwald #include "SEGGER_RTT.h"
23cb5466b0SMatthias Ringwald #define printf(format, ...) SEGGER_RTT_printf(0, format,  ## __VA_ARGS__)
24cb5466b0SMatthias Ringwald 
25351edbb3SMatthias Ringwald // make CubeMX defines usable
26351edbb3SMatthias Ringwald #ifndef RADIO_BUSY_PORT
27351edbb3SMatthias Ringwald #define RADIO_BUSY_PORT RADIO_BUSY_GPIO_Port
28351edbb3SMatthias Ringwald #endif
29351edbb3SMatthias Ringwald #ifndef RADIO_BUSY_PIN
30351edbb3SMatthias Ringwald #define RADIO_BUSY_PIN RADIO_BUSY_Pin
31351edbb3SMatthias Ringwald #endif
32351edbb3SMatthias Ringwald #ifndef RADIO_nRESET_PORT
33351edbb3SMatthias Ringwald #define RADIO_nRESET_PORT RADIO_nRESET_GPIO_Port
34351edbb3SMatthias Ringwald #endif
35351edbb3SMatthias Ringwald #ifndef RADIO_nRESET_PIN
36351edbb3SMatthias Ringwald #define RADIO_nRESET_PIN RADIO_nRESET_Pin
37351edbb3SMatthias Ringwald #endif
38351edbb3SMatthias Ringwald #ifndef RADIO_NSS_PORT
39351edbb3SMatthias Ringwald #define RADIO_NSS_PORT RADIO_NSS_GPIO_Port
40351edbb3SMatthias Ringwald #endif
41351edbb3SMatthias Ringwald #ifndef RADIO_NSS_PIN
42351edbb3SMatthias Ringwald #define RADIO_NSS_PIN RADIO_NSS_Pin
43351edbb3SMatthias Ringwald #endif
44cb5466b0SMatthias Ringwald /*!
45cb5466b0SMatthias Ringwald  * \brief Define the size of tx and rx hal buffers
46cb5466b0SMatthias Ringwald  *
47cb5466b0SMatthias Ringwald  * The Tx and Rx hal buffers are used for SPI communication to
48cb5466b0SMatthias Ringwald  * store data to be sent/receive to/from the chip.
49cb5466b0SMatthias Ringwald  *
50cb5466b0SMatthias Ringwald  * \warning The application must ensure the maximal useful size to be much lower
51cb5466b0SMatthias Ringwald  *          than the MAX_HAL_BUFFER_SIZE
52cb5466b0SMatthias Ringwald  */
53cb5466b0SMatthias Ringwald #define MAX_HAL_BUFFER_SIZE   0xFFF
54cb5466b0SMatthias Ringwald 
55cb5466b0SMatthias Ringwald #define IRQ_HIGH_PRIORITY  0
56cb5466b0SMatthias Ringwald 
57cb5466b0SMatthias Ringwald /*!
58cb5466b0SMatthias Ringwald  * Radio driver structure initialization
59cb5466b0SMatthias Ringwald  */
60cb5466b0SMatthias Ringwald const struct Radio_s Radio =
61cb5466b0SMatthias Ringwald {
62cb5466b0SMatthias Ringwald     SX1280Init,
63cb5466b0SMatthias Ringwald     SX1280HalReset,
64cb5466b0SMatthias Ringwald     SX1280GetStatus,
65cb5466b0SMatthias Ringwald     SX1280HalWriteCommand,
66cb5466b0SMatthias Ringwald     SX1280HalReadCommand,
67cb5466b0SMatthias Ringwald     SX1280HalWriteRegisters,
68cb5466b0SMatthias Ringwald     SX1280HalWriteRegister,
69cb5466b0SMatthias Ringwald     SX1280HalReadRegisters,
70cb5466b0SMatthias Ringwald     SX1280HalReadRegister,
71cb5466b0SMatthias Ringwald     SX1280HalWriteBuffer,
72cb5466b0SMatthias Ringwald     SX1280HalReadBuffer,
73cb5466b0SMatthias Ringwald     SX1280HalGetDioStatus,
74cb5466b0SMatthias Ringwald     SX1280GetFirmwareVersion,
75cb5466b0SMatthias Ringwald     SX1280SetRegulatorMode,
76cb5466b0SMatthias Ringwald     SX1280SetStandby,
77cb5466b0SMatthias Ringwald     SX1280SetPacketType,
78cb5466b0SMatthias Ringwald     SX1280SetModulationParams,
79cb5466b0SMatthias Ringwald     SX1280SetPacketParams,
80cb5466b0SMatthias Ringwald     SX1280SetRfFrequency,
81cb5466b0SMatthias Ringwald     SX1280SetBufferBaseAddresses,
82cb5466b0SMatthias Ringwald     SX1280SetTxParams,
83cb5466b0SMatthias Ringwald     SX1280SetDioIrqParams,
84cb5466b0SMatthias Ringwald     SX1280SetSyncWord,
85cb5466b0SMatthias Ringwald     SX1280SetRx,
86cb5466b0SMatthias Ringwald     SX1280GetPayload,
87cb5466b0SMatthias Ringwald     SX1280SendPayload,
88cb5466b0SMatthias Ringwald     SX1280SetRangingRole,
89cb5466b0SMatthias Ringwald     SX1280SetPollingMode,
90cb5466b0SMatthias Ringwald     SX1280SetInterruptMode,
91cb5466b0SMatthias Ringwald     SX1280SetRegistersDefault,
92cb5466b0SMatthias Ringwald     SX1280GetOpMode,
93cb5466b0SMatthias Ringwald     SX1280SetSleep,
94cb5466b0SMatthias Ringwald     SX1280SetFs,
95cb5466b0SMatthias Ringwald     SX1280SetTx,
96cb5466b0SMatthias Ringwald     SX1280SetRxDutyCycle,
97cb5466b0SMatthias Ringwald     SX1280SetCad,
98cb5466b0SMatthias Ringwald     SX1280SetTxContinuousWave,
99cb5466b0SMatthias Ringwald     SX1280SetTxContinuousPreamble,
100cb5466b0SMatthias Ringwald     SX1280GetPacketType,
101cb5466b0SMatthias Ringwald     SX1280SetCadParams,
102cb5466b0SMatthias Ringwald     SX1280GetRxBufferStatus,
103cb5466b0SMatthias Ringwald     SX1280GetPacketStatus,
104cb5466b0SMatthias Ringwald     SX1280GetRssiInst,
105cb5466b0SMatthias Ringwald     SX1280GetIrqStatus,
106cb5466b0SMatthias Ringwald     SX1280ClearIrqStatus,
107cb5466b0SMatthias Ringwald     SX1280Calibrate,
108cb5466b0SMatthias Ringwald     SX1280SetSaveContext,
109cb5466b0SMatthias Ringwald     SX1280SetAutoTx,
110cb5466b0SMatthias Ringwald     SX1280StopAutoTx,
111cb5466b0SMatthias Ringwald     SX1280SetAutoFS,
112cb5466b0SMatthias Ringwald     SX1280SetLongPreamble,
113cb5466b0SMatthias Ringwald     SX1280SetPayload,
114cb5466b0SMatthias Ringwald     SX1280SetSyncWordErrorTolerance,
115cb5466b0SMatthias Ringwald     SX1280SetCrcSeed,
116cb5466b0SMatthias Ringwald     SX1280SetBleAccessAddress,
117cb5466b0SMatthias Ringwald     SX1280SetBleAdvertizerAccessAddress,
118cb5466b0SMatthias Ringwald     SX1280SetCrcPolynomial,
119cb5466b0SMatthias Ringwald     SX1280SetWhiteningSeed,
120cb5466b0SMatthias Ringwald     SX1280EnableManualGain,
121cb5466b0SMatthias Ringwald     SX1280DisableManualGain,
122cb5466b0SMatthias Ringwald     SX1280SetManualGainValue,
123cb5466b0SMatthias Ringwald     SX1280SetLNAGainSetting,
124cb5466b0SMatthias Ringwald     SX1280SetRangingIdLength,
125cb5466b0SMatthias Ringwald     SX1280SetDeviceRangingAddress,
126cb5466b0SMatthias Ringwald     SX1280SetRangingRequestAddress,
127cb5466b0SMatthias Ringwald     SX1280GetRangingResult,
128cb5466b0SMatthias Ringwald     SX1280SetRangingCalibration,
129cb5466b0SMatthias Ringwald     SX1280GetRangingPowerDeltaThresholdIndicator,
130cb5466b0SMatthias Ringwald     SX1280RangingClearFilterResult,
131cb5466b0SMatthias Ringwald     SX1280RangingSetFilterNumSamples,
132cb5466b0SMatthias Ringwald     SX1280GetFrequencyError,
133cb5466b0SMatthias Ringwald };
134cb5466b0SMatthias Ringwald 
135cb5466b0SMatthias Ringwald #ifndef USE_BK_SPI
136cb5466b0SMatthias Ringwald static uint8_t halRxBuffer[MAX_HAL_BUFFER_SIZE] = {0x00};
137cb5466b0SMatthias Ringwald #endif
138cb5466b0SMatthias Ringwald static uint8_t halTxBuffer[MAX_HAL_BUFFER_SIZE] = {0x00};
139cb5466b0SMatthias Ringwald 
140cb5466b0SMatthias Ringwald static DioIrqHandler **dioIrqHandlers;
141cb5466b0SMatthias Ringwald 
142cb5466b0SMatthias Ringwald extern SPI_HandleTypeDef RADIO_SPI_HANDLE;
143cb5466b0SMatthias Ringwald 
144351edbb3SMatthias Ringwald #ifdef USE_BK_SPI
145351edbb3SMatthias Ringwald 
146cb5466b0SMatthias Ringwald static void spi_tx_then_rx(SPI_HandleTypeDef *hspi, const uint8_t * tx_data, uint16_t tx_len, uint8_t * rx_buffer, uint16_t rx_len){
147cb5466b0SMatthias Ringwald 
148cb5466b0SMatthias Ringwald     /* Set fiforxthreshold according the reception data length: 8bit */
149cb5466b0SMatthias Ringwald     SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
150cb5466b0SMatthias Ringwald 
151cb5466b0SMatthias Ringwald     /* Check if the SPI is already enabled */
152cb5466b0SMatthias Ringwald     if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
153cb5466b0SMatthias Ringwald     {
154cb5466b0SMatthias Ringwald         /* Enable SPI peripheral */
155cb5466b0SMatthias Ringwald         __HAL_SPI_ENABLE(hspi);
156cb5466b0SMatthias Ringwald     }
157cb5466b0SMatthias Ringwald 
158cb5466b0SMatthias Ringwald     // send tx / ignore rx
159cb5466b0SMatthias Ringwald 
160cb5466b0SMatthias Ringwald     uint8_t tx_byte = *tx_data++;
161cb5466b0SMatthias Ringwald     while (tx_len > 0){
162cb5466b0SMatthias Ringwald         tx_len--;
163cb5466b0SMatthias Ringwald         // while (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE) == 0);
164cb5466b0SMatthias Ringwald         *(__IO uint8_t *)&hspi->Instance->DR = tx_byte;
165cb5466b0SMatthias Ringwald         tx_byte = *tx_data++;
166cb5466b0SMatthias Ringwald         while (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE) == 0);
167cb5466b0SMatthias Ringwald         // *rx_buffer++ = *(__IO uint8_t *)&hspi->Instance->DR;
168cb5466b0SMatthias Ringwald         uint8_t rx_byte = *(__IO uint8_t *)&hspi->Instance->DR;
169cb5466b0SMatthias Ringwald         (void) rx_byte;
170cb5466b0SMatthias Ringwald     }
171cb5466b0SMatthias Ringwald 
172cb5466b0SMatthias Ringwald     // send NOP / store rx
173cb5466b0SMatthias Ringwald 
174cb5466b0SMatthias Ringwald     while (rx_len > 0){
175cb5466b0SMatthias Ringwald         rx_len--;
176cb5466b0SMatthias Ringwald         // while (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE) == 0);
177cb5466b0SMatthias Ringwald         *(__IO uint8_t *)&hspi->Instance->DR = 0;
178cb5466b0SMatthias Ringwald         while (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE) == 0);
179cb5466b0SMatthias Ringwald         *rx_buffer++ = *(__IO uint8_t *)&hspi->Instance->DR;
180cb5466b0SMatthias Ringwald     }
181cb5466b0SMatthias Ringwald }
182*b22bcb2cSMatthias Ringwald #endif
183*b22bcb2cSMatthias Ringwald 
184*b22bcb2cSMatthias Ringwald // assert: tx_data == tx_buffer (local call)
185*b22bcb2cSMatthias Ringwald void SX1280HalSpiTxThenRx(uint16_t tx_len, uint8_t * rx_buffer, uint16_t rx_len){
186*b22bcb2cSMatthias Ringwald 
187*b22bcb2cSMatthias Ringwald #ifdef USE_BK_SPI
188*b22bcb2cSMatthias Ringwald 	spi_tx_then_rx(&RADIO_SPI_HANDLE, halTxBuffer, tx_len, rx_buffer, rx_len);
189351edbb3SMatthias Ringwald #else
190*b22bcb2cSMatthias Ringwald 	if (rx_len == 0){
191*b22bcb2cSMatthias Ringwald 
192*b22bcb2cSMatthias Ringwald 		// SPI Transfer
193*b22bcb2cSMatthias Ringwald 		HAL_SPI_Transmit( &RADIO_SPI_HANDLE, halTxBuffer, size, HAL_MAX_DELAY );
194*b22bcb2cSMatthias Ringwald 
195*b22bcb2cSMatthias Ringwald 	} else {
196*b22bcb2cSMatthias Ringwald 		// fill TX buffer with zeros
197*b22bcb2cSMatthias Ringwald 		memset(&halTxBuffer[tx_len], 0, rx_len);
198*b22bcb2cSMatthias Ringwald 
199*b22bcb2cSMatthias Ringwald 		// SPI Transfer
200351edbb3SMatthias Ringwald #ifdef STM32L4XX_FAMILY
201351edbb3SMatthias Ringwald 		// Comment For STM32L0XX and STM32L1XX Intégration, uncomment for STM32L4XX Intégration
2026c52fbaaSMatthias Ringwald 		HAL_SPIEx_FlushRxFifo( &RADIO_SPI_HANDLE );
203351edbb3SMatthias Ringwald #endif
204*b22bcb2cSMatthias Ringwald 	    HAL_SPI_TransmitReceive( &RADIO_SPI_HANDLE, halTxBuffer, halRxBuffer, size, HAL_MAX_DELAY );
205*b22bcb2cSMatthias Ringwald 
206*b22bcb2cSMatthias Ringwald 		// return rx data
207*b22bcb2cSMatthias Ringwald 	    memcpy( rx_buffer, &halRxBuffer[tx_len], size );
208351edbb3SMatthias Ringwald 	}
209cb5466b0SMatthias Ringwald #endif
210*b22bcb2cSMatthias Ringwald }
211cb5466b0SMatthias Ringwald 
212cb5466b0SMatthias Ringwald /*!
213cb5466b0SMatthias Ringwald  * \brief Used to block execution waiting for low state on radio busy pin.
214cb5466b0SMatthias Ringwald  *        Essentially used in SPI communications
215cb5466b0SMatthias Ringwald  */
216cb5466b0SMatthias Ringwald void SX1280HalWaitOnBusy( void )
217cb5466b0SMatthias Ringwald {
218cb5466b0SMatthias Ringwald     while( HAL_GPIO_ReadPin( RADIO_BUSY_PORT, RADIO_BUSY_PIN ) == 1 );
219cb5466b0SMatthias Ringwald }
220cb5466b0SMatthias Ringwald 
221cb5466b0SMatthias Ringwald void SX1280HalInit( DioIrqHandler **irqHandlers )
222cb5466b0SMatthias Ringwald {
223cb5466b0SMatthias Ringwald     SX1280HalReset( );
224cb5466b0SMatthias Ringwald     SX1280HalIoIrqInit( irqHandlers );
225cb5466b0SMatthias Ringwald }
226cb5466b0SMatthias Ringwald 
227cb5466b0SMatthias Ringwald void HAL_GPIO_EXTI_Callback( uint16_t GPIO_Pin )
228cb5466b0SMatthias Ringwald {
229cb5466b0SMatthias Ringwald     dioIrqHandlers[0]();
230cb5466b0SMatthias Ringwald }
231cb5466b0SMatthias Ringwald 
232cb5466b0SMatthias Ringwald void SX1280HalIoIrqInit( DioIrqHandler **irqHandlers )
233cb5466b0SMatthias Ringwald {
234cb5466b0SMatthias Ringwald     dioIrqHandlers = irqHandlers;
235cb5466b0SMatthias Ringwald }
236cb5466b0SMatthias Ringwald 
237cb5466b0SMatthias Ringwald void SX1280HalReset( void )
238cb5466b0SMatthias Ringwald {
239cb5466b0SMatthias Ringwald     HAL_Delay( 20 );
240cb5466b0SMatthias Ringwald     HAL_GPIO_WritePin( RADIO_nRESET_PORT, RADIO_nRESET_PIN, 0 );
241cb5466b0SMatthias Ringwald     HAL_Delay( 50 );
242cb5466b0SMatthias Ringwald     HAL_GPIO_WritePin( RADIO_nRESET_PORT, RADIO_nRESET_PIN, 1 );
243cb5466b0SMatthias Ringwald     HAL_Delay( 20 );
244cb5466b0SMatthias Ringwald }
245cb5466b0SMatthias Ringwald 
246*b22bcb2cSMatthias Ringwald #if 0
247*b22bcb2cSMatthias Ringwald // commented out as (3+IRAM_SIZE) > sizeof(halTxBuffer)
248cb5466b0SMatthias Ringwald void SX1280HalClearInstructionRam( void )
249cb5466b0SMatthias Ringwald {
250cb5466b0SMatthias Ringwald     // Clearing the instruction RAM is writing 0x00s on every bytes of the
251cb5466b0SMatthias Ringwald     // instruction RAM
252cb5466b0SMatthias Ringwald     uint16_t halSize = 3 + IRAM_SIZE;
253cb5466b0SMatthias Ringwald     halTxBuffer[0] = RADIO_WRITE_REGISTER;
254cb5466b0SMatthias Ringwald     halTxBuffer[1] = ( IRAM_START_ADDRESS >> 8 ) & 0x00FF;
255cb5466b0SMatthias Ringwald     halTxBuffer[2] = IRAM_START_ADDRESS & 0x00FF;
256cb5466b0SMatthias Ringwald     for( uint16_t index = 0; index < IRAM_SIZE; index++ )
257cb5466b0SMatthias Ringwald     {
258cb5466b0SMatthias Ringwald         halTxBuffer[3+index] = 0x00;
259cb5466b0SMatthias Ringwald     }
260cb5466b0SMatthias Ringwald 
261cb5466b0SMatthias Ringwald     SX1280HalWaitOnBusy( );
262cb5466b0SMatthias Ringwald 
263cb5466b0SMatthias Ringwald     HAL_GPIO_WritePin( RADIO_NSS_PORT, RADIO_NSS_PIN, 0 );
264cb5466b0SMatthias Ringwald 
265*b22bcb2cSMatthias Ringwald 	SX1280HalSpiTxThenRx( halTxBuffer, halSize, NULL, 0);
266cb5466b0SMatthias Ringwald 
267cb5466b0SMatthias Ringwald     HAL_GPIO_WritePin( RADIO_NSS_PORT, RADIO_NSS_PIN, 1 );
268cb5466b0SMatthias Ringwald 
269cb5466b0SMatthias Ringwald     SX1280HalWaitOnBusy( );
270cb5466b0SMatthias Ringwald }
271*b22bcb2cSMatthias Ringwald #endif
272cb5466b0SMatthias Ringwald 
273cb5466b0SMatthias Ringwald void SX1280HalWakeup( void )
274cb5466b0SMatthias Ringwald {
275cb5466b0SMatthias Ringwald     __disable_irq( );
276cb5466b0SMatthias Ringwald 
277cb5466b0SMatthias Ringwald     HAL_GPIO_WritePin( RADIO_NSS_PORT, RADIO_NSS_PIN, 0 );
278cb5466b0SMatthias Ringwald 
279cb5466b0SMatthias Ringwald     uint16_t halSize = 2;
280cb5466b0SMatthias Ringwald     halTxBuffer[0] = RADIO_GET_STATUS;
281cb5466b0SMatthias Ringwald     halTxBuffer[1] = 0x00;
282cb5466b0SMatthias Ringwald 
283*b22bcb2cSMatthias Ringwald 	SX1280HalSpiTxThenRx( halSize, NULL, 0);
284cb5466b0SMatthias Ringwald 
285cb5466b0SMatthias Ringwald     HAL_GPIO_WritePin( RADIO_NSS_PORT, RADIO_NSS_PIN, 1 );
286cb5466b0SMatthias Ringwald 
287cb5466b0SMatthias Ringwald     // Wait for chip to be ready.
288cb5466b0SMatthias Ringwald     SX1280HalWaitOnBusy( );
289cb5466b0SMatthias Ringwald 
290cb5466b0SMatthias Ringwald     __enable_irq( );
291cb5466b0SMatthias Ringwald }
292cb5466b0SMatthias Ringwald 
293cb5466b0SMatthias Ringwald void SX1280HalWriteCommand( RadioCommands_t command, uint8_t *buffer, uint16_t size )
294cb5466b0SMatthias Ringwald {
295cb5466b0SMatthias Ringwald     uint16_t halSize  = size + 1;
296cb5466b0SMatthias Ringwald     SX1280HalWaitOnBusy( );
297cb5466b0SMatthias Ringwald 
298cb5466b0SMatthias Ringwald     HAL_GPIO_WritePin( RADIO_NSS_PORT, RADIO_NSS_PIN, 0 );
299cb5466b0SMatthias Ringwald 
300cb5466b0SMatthias Ringwald     halTxBuffer[0] = command;
301cb5466b0SMatthias Ringwald     memcpy( halTxBuffer + 1, ( uint8_t * )buffer, size * sizeof( uint8_t ) );
302cb5466b0SMatthias Ringwald 
303*b22bcb2cSMatthias Ringwald 	SX1280HalSpiTxThenRx( halSize, NULL, 0);
304cb5466b0SMatthias Ringwald 
305cb5466b0SMatthias Ringwald     HAL_GPIO_WritePin( RADIO_NSS_PORT, RADIO_NSS_PIN, 1 );
306cb5466b0SMatthias Ringwald 
307cb5466b0SMatthias Ringwald     if( command != RADIO_SET_SLEEP )
308cb5466b0SMatthias Ringwald     {
309cb5466b0SMatthias Ringwald         SX1280HalWaitOnBusy( );
310cb5466b0SMatthias Ringwald     }
311cb5466b0SMatthias Ringwald }
312cb5466b0SMatthias Ringwald 
313cb5466b0SMatthias Ringwald void SX1280HalReadCommand( RadioCommands_t command, uint8_t *buffer, uint16_t size )
314cb5466b0SMatthias Ringwald {
315cb5466b0SMatthias Ringwald     halTxBuffer[0] = command;
316cb5466b0SMatthias Ringwald     halTxBuffer[1] = 0x00;
317cb5466b0SMatthias Ringwald 
318cb5466b0SMatthias Ringwald     SX1280HalWaitOnBusy( );
319cb5466b0SMatthias Ringwald 
320cb5466b0SMatthias Ringwald     HAL_GPIO_WritePin( RADIO_NSS_PORT, RADIO_NSS_PIN, 0 );
321cb5466b0SMatthias Ringwald 
322*b22bcb2cSMatthias Ringwald 	SX1280HalSpiTxThenRx( 2, buffer, size);
323cb5466b0SMatthias Ringwald 
324cb5466b0SMatthias Ringwald     HAL_GPIO_WritePin( RADIO_NSS_PORT, RADIO_NSS_PIN, 1 );
325cb5466b0SMatthias Ringwald 
326cb5466b0SMatthias Ringwald     SX1280HalWaitOnBusy( );
327cb5466b0SMatthias Ringwald }
328cb5466b0SMatthias Ringwald 
329cb5466b0SMatthias Ringwald void SX1280HalWriteRegisters( uint16_t address, uint8_t *buffer, uint16_t size )
330cb5466b0SMatthias Ringwald {
331cb5466b0SMatthias Ringwald     uint16_t halSize = size + 3;
332cb5466b0SMatthias Ringwald     halTxBuffer[0] = RADIO_WRITE_REGISTER;
333cb5466b0SMatthias Ringwald     halTxBuffer[1] = ( address & 0xFF00 ) >> 8;
334cb5466b0SMatthias Ringwald     halTxBuffer[2] = address & 0x00FF;
335cb5466b0SMatthias Ringwald     memcpy( halTxBuffer + 3, buffer, size );
336cb5466b0SMatthias Ringwald 
337cb5466b0SMatthias Ringwald     SX1280HalWaitOnBusy( );
338cb5466b0SMatthias Ringwald 
339cb5466b0SMatthias Ringwald     HAL_GPIO_WritePin( RADIO_NSS_PORT, RADIO_NSS_PIN, 0 );
340cb5466b0SMatthias Ringwald 
341*b22bcb2cSMatthias Ringwald 	SX1280HalSpiTxThenRx( halSize, NULL, 0);
342cb5466b0SMatthias Ringwald 
343cb5466b0SMatthias Ringwald     HAL_GPIO_WritePin( RADIO_NSS_PORT, RADIO_NSS_PIN, 1 );
344cb5466b0SMatthias Ringwald 
345cb5466b0SMatthias Ringwald     SX1280HalWaitOnBusy( );
346cb5466b0SMatthias Ringwald }
347cb5466b0SMatthias Ringwald 
348cb5466b0SMatthias Ringwald void SX1280HalWriteRegister( uint16_t address, uint8_t value )
349cb5466b0SMatthias Ringwald {
350cb5466b0SMatthias Ringwald     SX1280HalWriteRegisters( address, &value, 1 );
351cb5466b0SMatthias Ringwald }
352cb5466b0SMatthias Ringwald 
353cb5466b0SMatthias Ringwald void SX1280HalReadRegisters( uint16_t address, uint8_t *buffer, uint16_t size )
354cb5466b0SMatthias Ringwald {
355cb5466b0SMatthias Ringwald     halTxBuffer[0] = RADIO_READ_REGISTER;
356cb5466b0SMatthias Ringwald     halTxBuffer[1] = ( address & 0xFF00 ) >> 8;
357cb5466b0SMatthias Ringwald     halTxBuffer[2] = address & 0x00FF;
358cb5466b0SMatthias Ringwald     halTxBuffer[3] = 0x00;
359cb5466b0SMatthias Ringwald 
360cb5466b0SMatthias Ringwald     SX1280HalWaitOnBusy( );
361cb5466b0SMatthias Ringwald 
362cb5466b0SMatthias Ringwald     HAL_GPIO_WritePin( RADIO_NSS_PORT, RADIO_NSS_PIN, 0 );
363cb5466b0SMatthias Ringwald 
364*b22bcb2cSMatthias Ringwald 	SX1280HalSpiTxThenRx( 4, buffer, size);
365cb5466b0SMatthias Ringwald 
366cb5466b0SMatthias Ringwald     HAL_GPIO_WritePin( RADIO_NSS_PORT, RADIO_NSS_PIN, 1 );
367cb5466b0SMatthias Ringwald 
368cb5466b0SMatthias Ringwald     SX1280HalWaitOnBusy( );
369cb5466b0SMatthias Ringwald }
370cb5466b0SMatthias Ringwald 
371cb5466b0SMatthias Ringwald uint8_t SX1280HalReadRegister( uint16_t address )
372cb5466b0SMatthias Ringwald {
373cb5466b0SMatthias Ringwald     uint8_t data;
374cb5466b0SMatthias Ringwald 
375cb5466b0SMatthias Ringwald     SX1280HalReadRegisters( address, &data, 1 );
376cb5466b0SMatthias Ringwald 
377cb5466b0SMatthias Ringwald     return data;
378cb5466b0SMatthias Ringwald }
379cb5466b0SMatthias Ringwald 
380cb5466b0SMatthias Ringwald void SX1280HalWriteBuffer( uint8_t offset, uint8_t *buffer, uint8_t size )
381cb5466b0SMatthias Ringwald {
382cb5466b0SMatthias Ringwald     uint16_t halSize = size + 2;
383cb5466b0SMatthias Ringwald     halTxBuffer[0] = RADIO_WRITE_BUFFER;
384cb5466b0SMatthias Ringwald     halTxBuffer[1] = offset;
385cb5466b0SMatthias Ringwald     memcpy( halTxBuffer + 2, buffer, size );
386cb5466b0SMatthias Ringwald 
387cb5466b0SMatthias Ringwald     SX1280HalWaitOnBusy( );
388cb5466b0SMatthias Ringwald 
389cb5466b0SMatthias Ringwald     HAL_GPIO_WritePin( RADIO_NSS_PORT, RADIO_NSS_PIN, 0 );
390cb5466b0SMatthias Ringwald 
391*b22bcb2cSMatthias Ringwald 	SX1280HalSpiTxThenRx( halSize, NULL, 0);
392cb5466b0SMatthias Ringwald 
393cb5466b0SMatthias Ringwald     HAL_GPIO_WritePin( RADIO_NSS_PORT, RADIO_NSS_PIN, 1 );
394cb5466b0SMatthias Ringwald 
395cb5466b0SMatthias Ringwald     SX1280HalWaitOnBusy( );
396cb5466b0SMatthias Ringwald }
397cb5466b0SMatthias Ringwald 
398cb5466b0SMatthias Ringwald void SX1280HalReadBuffer( uint8_t offset, uint8_t *buffer, uint8_t size )
399cb5466b0SMatthias Ringwald {
400cb5466b0SMatthias Ringwald     halTxBuffer[0] = RADIO_READ_BUFFER;
401cb5466b0SMatthias Ringwald     halTxBuffer[1] = offset;
402cb5466b0SMatthias Ringwald     halTxBuffer[2] = 0x00;
403cb5466b0SMatthias Ringwald 
404cb5466b0SMatthias Ringwald     SX1280HalWaitOnBusy( );
405cb5466b0SMatthias Ringwald 
406cb5466b0SMatthias Ringwald     HAL_GPIO_WritePin( RADIO_NSS_PORT, RADIO_NSS_PIN, 0 );
407cb5466b0SMatthias Ringwald 
408*b22bcb2cSMatthias Ringwald 	SX1280HalSpiTxThenRx( 3, buffer, size);
409cb5466b0SMatthias Ringwald 
410cb5466b0SMatthias Ringwald     HAL_GPIO_WritePin( RADIO_NSS_PORT, RADIO_NSS_PIN, 1 );
411cb5466b0SMatthias Ringwald 
412cb5466b0SMatthias Ringwald     SX1280HalWaitOnBusy( );
413cb5466b0SMatthias Ringwald }
414cb5466b0SMatthias Ringwald 
415cb5466b0SMatthias Ringwald uint8_t SX1280HalGetDioStatus( void )
416cb5466b0SMatthias Ringwald {
417cb5466b0SMatthias Ringwald 	uint8_t Status = HAL_GPIO_ReadPin( RADIO_BUSY_PORT, RADIO_BUSY_PIN );
418cb5466b0SMatthias Ringwald 
419cb5466b0SMatthias Ringwald #if( RADIO_DIO1_ENABLE )
420cb5466b0SMatthias Ringwald 	Status |= (HAL_GPIO_ReadPin( RADIO_DIO1_GPIO_Port, RADIO_DIO1_Pin ) << 1);
421cb5466b0SMatthias Ringwald #endif
422cb5466b0SMatthias Ringwald #if( RADIO_DIO2_ENABLE )
423cb5466b0SMatthias Ringwald 	Status |= (HAL_GPIO_ReadPin( RADIO_DIO2_GPIO_Port, RADIO_DIO2_Pin ) << 2);
424cb5466b0SMatthias Ringwald #endif
425cb5466b0SMatthias Ringwald #if( RADIO_DIO3_ENABLE )
426cb5466b0SMatthias Ringwald 	Status |= (HAL_GPIO_ReadPin( RADIO_DIO3_GPIO_Port, RADIO_DIO3_Pin ) << 3);
427cb5466b0SMatthias Ringwald #endif
428cb5466b0SMatthias Ringwald #if( !RADIO_DIO1_ENABLE && !RADIO_DIO2_ENABLE && !RADIO_DIO3_ENABLE )
429cb5466b0SMatthias Ringwald #error "Please define a DIO"
430cb5466b0SMatthias Ringwald #endif
431cb5466b0SMatthias Ringwald 
432cb5466b0SMatthias Ringwald 	return Status;
433cb5466b0SMatthias Ringwald }
434