1 /* 2 * Copyright (C) 2014 BlueKitchen GmbH 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. Neither the name of the copyright holders nor the names of 14 * contributors may be used to endorse or promote products derived 15 * from this software without specific prior written permission. 16 * 4. Any redistribution, use, or modification is done solely for 17 * personal benefit and not for any commercial purpose or for 18 * monetary gain. 19 * 20 * THIS SOFTWARE IS PROVIDED BY BLUEKITCHEN GMBH AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 23 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL MATTHIAS 24 * RINGWALD OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 26 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS 27 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 28 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF 30 * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 * 33 * Please inquire about commercial licensing options at 34 * [email protected] 35 * 36 */ 37 38 #define __BTSTACK_FILE__ "btstack_chipset_em9301.c" 39 40 /* 41 * btstack_chipset_em9301.c 42 * 43 * Adapter to use em9301-based chipsets with BTstack 44 * 45 * Allows to set public BD ADDR 46 */ 47 48 #include "btstack_config.h" 49 #include "btstack_chipset_em9301.h" 50 #include "btstack_debug.h" 51 52 #include <stddef.h> /* NULL */ 53 #include <string.h> /* memcpy */ 54 #include "hci.h" 55 56 #include "crc32.h" 57 58 // should go to some common place 59 #define OPCODE(ogf, ocf) (ocf | ogf << 10) 60 61 #define HCI_OPCODE_EM_WRITE_PATCH_START (0xFC27) 62 #define HCI_OPCODE_EM_WRITE_PATCH_CONTINUE (0xFC28) 63 #define HCI_OPCODE_EM_WRITE_PATCH_ABORT (0xFC29) 64 #define HCI_OPCODE_EM_CPU_RESET (0xFC32) 65 #define HCI_OPCODE_EM_PATCH_QUERY (0xFC34) 66 67 static const uint32_t baudrates[] = { 68 0, 69 0, 70 0, 71 9600, 72 14400, 73 19200, 74 28800, 75 38400, 76 57600, 77 76800, 78 115200, 79 230400, 80 460800, 81 921600, 82 1843200, 83 }; 84 85 #ifdef HAVE_EM9304_PATCH_CONTAINER 86 87 extern const uint8_t container_blob_data[]; 88 extern const uint32_t container_blob_size; 89 90 static uint32_t container_blob_offset = 0; 91 static uint32_t container_end; // current container 92 static uint16_t patch_sequence_number; 93 static int em_cpu_reset_sent; 94 95 static enum { 96 UPLOAD_IDLE, 97 UPLOAD_ACTIVE, 98 } upload_state; 99 100 #endif 101 102 103 static void chipset_set_bd_addr_command(bd_addr_t addr, uint8_t *hci_cmd_buffer){ 104 little_endian_store_16(hci_cmd_buffer, 0, OPCODE(OGF_VENDOR, 0x02)); 105 hci_cmd_buffer[2] = 0x06; 106 reverse_bd_addr(addr, &hci_cmd_buffer[3]); 107 } 108 109 static void chipset_set_baudrate_command(uint32_t baudrate, uint8_t *hci_cmd_buffer){ 110 // lookup baudrates 111 int i; 112 int found = 0; 113 for (i=0 ; i < sizeof(baudrates)/sizeof(uint32_t) ; i++){ 114 if (baudrates[i] == baudrate){ 115 found = i; 116 break; 117 } 118 } 119 if (!found){ 120 log_error("Baudrate %u not found in table", baudrate); 121 return; 122 } 123 little_endian_store_16(hci_cmd_buffer, 0, OPCODE(OGF_VENDOR, 0x07)); 124 hci_cmd_buffer[2] = 0x01; 125 hci_cmd_buffer[3] = i; 126 } 127 128 #ifdef HAVE_EM9304_PATCH_CONTAINER 129 static void chipset_init(const void * config){ 130 UNUSED(config); 131 container_blob_offset = 0; 132 em_cpu_reset_sent = 0; 133 upload_state = UPLOAD_IDLE; 134 } 135 136 static btstack_chipset_result_t chipset_next_command(uint8_t * hci_cmd_buffer){ 137 log_info("pos %u, container end %u, blob size %u", container_blob_offset, container_end, container_blob_size); 138 139 if (container_blob_offset >= container_blob_size) { 140 if (0 == em_cpu_reset_sent){ 141 // send EM CPU Reset 142 little_endian_store_16(hci_cmd_buffer, 0, HCI_OPCODE_EM_CPU_RESET); 143 hci_cmd_buffer[2] = 0; 144 em_cpu_reset_sent = 1; 145 return BTSTACK_CHIPSET_VALID_COMMAND; 146 } else { 147 return BTSTACK_CHIPSET_DONE; 148 } 149 } 150 151 uint32_t tag; 152 uint16_t bytes_to_upload; 153 uint32_t crc; 154 155 switch (upload_state){ 156 case UPLOAD_IDLE: 157 // check for 'em93' tag 158 tag = little_endian_read_32(container_blob_data, container_blob_offset); 159 if (0x656d3933 != tag) { 160 log_error("Expected 0x656d3933 ('em934') but got %08x", tag); 161 return BTSTACK_CHIPSET_DONE; 162 } 163 // fetch info for current container 164 container_end = container_blob_offset + little_endian_read_32(container_blob_data, container_blob_offset + 4); 165 // start uploading (<= 59 bytes) 166 patch_sequence_number = 1; 167 bytes_to_upload = btstack_min(59, container_end - container_blob_offset); 168 crc = crc32(&container_blob_data[container_blob_offset], bytes_to_upload); 169 // build command 170 little_endian_store_16(hci_cmd_buffer, 0, HCI_OPCODE_EM_WRITE_PATCH_START); 171 hci_cmd_buffer[2] = 5 + bytes_to_upload; 172 hci_cmd_buffer[3] = 0; // upload to iRAM1 173 little_endian_store_32(hci_cmd_buffer, 4, crc); 174 memcpy(&hci_cmd_buffer[8], &container_blob_data[container_blob_offset], bytes_to_upload); 175 container_blob_offset += bytes_to_upload; 176 if (container_blob_offset < container_end){ 177 upload_state = UPLOAD_ACTIVE; 178 } 179 return BTSTACK_CHIPSET_VALID_COMMAND; 180 case UPLOAD_ACTIVE: 181 // Upload next segement 182 bytes_to_upload = btstack_min(58, container_end - container_blob_offset); 183 crc = crc32(&container_blob_data[container_blob_offset], bytes_to_upload); 184 // build command 185 little_endian_store_16(hci_cmd_buffer, 0, HCI_OPCODE_EM_WRITE_PATCH_CONTINUE); 186 hci_cmd_buffer[2] = 6 + bytes_to_upload; 187 little_endian_store_16(hci_cmd_buffer, 3, patch_sequence_number++); 188 little_endian_store_32(hci_cmd_buffer, 5, crc); 189 memcpy(&hci_cmd_buffer[9], &container_blob_data[container_blob_offset], bytes_to_upload); 190 container_blob_offset += bytes_to_upload; 191 if (container_blob_offset >= container_end){ 192 log_info("container done maybe another one"); 193 upload_state = UPLOAD_IDLE; 194 } 195 return BTSTACK_CHIPSET_VALID_COMMAND; 196 } 197 return BTSTACK_CHIPSET_DONE; 198 } 199 #endif 200 201 static const btstack_chipset_t btstack_chipset_em9301 = { 202 "EM9301", 203 #ifdef HAVE_EM9304_PATCH_CONTAINER 204 chipset_init, 205 chipset_next_command, 206 #else 207 NULL, 208 NULL, 209 #endif 210 chipset_set_baudrate_command, 211 chipset_set_bd_addr_command, 212 }; 213 214 // MARK: public API 215 const btstack_chipset_t * btstack_chipset_em9301_instance(void){ 216 return &btstack_chipset_em9301; 217 } 218