1 /* 2 * Copyright (C) 2014 BlueKitchen GmbH 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. Neither the name of the copyright holders nor the names of 14 * contributors may be used to endorse or promote products derived 15 * from this software without specific prior written permission. 16 * 4. Any redistribution, use, or modification is done solely for 17 * personal benefit and not for any commercial purpose or for 18 * monetary gain. 19 * 20 * THIS SOFTWARE IS PROVIDED BY BLUEKITCHEN GMBH AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 23 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL MATTHIAS 24 * RINGWALD OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 26 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS 27 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 28 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF 30 * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 * 33 * Please inquire about commercial licensing options at 34 * [email protected] 35 * 36 */ 37 38 #define __BTSTACK_FILE__ "btstack_chipset_em9301.c" 39 40 /* 41 * btstack_chipset_em9301.c 42 * 43 * Adapter to use em9301-based chipsets with BTstack 44 * 45 * Allows to set public BD ADDR 46 */ 47 48 #include "btstack_config.h" 49 #include "btstack_chipset_em9301.h" 50 #include "btstack_debug.h" 51 52 #include <stddef.h> /* NULL */ 53 #include <string.h> /* memcpy */ 54 #include "hci.h" 55 56 // should go to some common place 57 #define OPCODE(ogf, ocf) (ocf | ogf << 10) 58 59 #define HCI_OPCODE_EM_WRITE_PATCH_START (0xFC27) 60 #define HCI_OPCODE_EM_WRITE_PATCH_CONTINUE (0xFC28) 61 #define HCI_OPCODE_EM_WRITE_PATCH_ABORT (0xFC29) 62 #define HCI_OPCODE_EM_CPU_RESET (0xFC32) 63 #define HCI_OPCODE_EM_PATCH_QUERY (0xFC34) 64 65 static const uint32_t baudrates[] = { 66 0, 67 0, 68 0, 69 9600, 70 14400, 71 19200, 72 28800, 73 38400, 74 57600, 75 76800, 76 115200, 77 230400, 78 460800, 79 921600, 80 1843200, 81 }; 82 83 #ifdef HAVE_EM9304_PATCH_CONTAINER 84 85 extern const uint8_t container_blob_data[]; 86 extern const uint32_t container_blob_size; 87 88 static uint32_t container_blob_offset = 0; 89 static uint32_t container_end; // current container 90 static uint16_t patch_sequence_number; 91 static int em_cpu_reset_sent; 92 93 static enum { 94 UPLOAD_IDLE, 95 UPLOAD_ACTIVE, 96 } upload_state; 97 98 #endif 99 100 // Quick CRC32 implementation using 4-bit lookup table 101 static const uint32_t crc32_table[16] = { 102 0x00000000, 0x1db71064, 0x3b6e20c8, 0x26d930ac, 0x76dc4190, 0x6b6b51f4, 0x4db26158, 0x5005713c, 103 0xedb88320, 0xf00f9344, 0xd6d6a3e8, 0xcb61b38c, 0x9b64c2b0, 0x86d3d2d4, 0xa00ae278, 0xbdbdf21c 104 }; 105 106 uint32_t btstack_crc32(const uint8_t *buf, uint16_t size){ 107 uint16_t pos; 108 uint32_t crc32 = 0xffffffff; 109 for (pos=0 ; pos<size ; pos++){ 110 uint8_t b = buf[pos]; 111 crc32 = (crc32 >> 4) ^ crc32_table[(crc32 & 0x0F) ^ (b & 0x0F)]; 112 crc32 = (crc32 >> 4) ^ crc32_table[(crc32 & 0x0F) ^ (b >> 4)]; 113 } 114 return ~crc32; 115 } 116 117 static void chipset_set_bd_addr_command(bd_addr_t addr, uint8_t *hci_cmd_buffer){ 118 little_endian_store_16(hci_cmd_buffer, 0, OPCODE(OGF_VENDOR, 0x02)); 119 hci_cmd_buffer[2] = 0x06; 120 reverse_bd_addr(addr, &hci_cmd_buffer[3]); 121 } 122 123 static void chipset_set_baudrate_command(uint32_t baudrate, uint8_t *hci_cmd_buffer){ 124 // lookup baudrates 125 int i; 126 int found = 0; 127 for (i=0 ; i < sizeof(baudrates)/sizeof(uint32_t) ; i++){ 128 if (baudrates[i] == baudrate){ 129 found = i; 130 break; 131 } 132 } 133 if (!found){ 134 log_error("Baudrate %u not found in table", baudrate); 135 return; 136 } 137 little_endian_store_16(hci_cmd_buffer, 0, OPCODE(OGF_VENDOR, 0x07)); 138 hci_cmd_buffer[2] = 0x01; 139 hci_cmd_buffer[3] = i; 140 } 141 142 #ifdef HAVE_EM9304_PATCH_CONTAINER 143 static void chipset_init(const void * config){ 144 UNUSED(config); 145 container_blob_offset = 0; 146 em_cpu_reset_sent = 0; 147 upload_state = UPLOAD_IDLE; 148 } 149 150 static btstack_chipset_result_t chipset_next_command(uint8_t * hci_cmd_buffer){ 151 log_info("pos %u, container end %u, blob size %u", container_blob_offset, container_end, container_blob_size); 152 153 if (container_blob_offset >= container_blob_size) { 154 if (0 == em_cpu_reset_sent){ 155 // send EM CPU Reset 156 little_endian_store_16(hci_cmd_buffer, 0, HCI_OPCODE_EM_CPU_RESET); 157 hci_cmd_buffer[2] = 0; 158 em_cpu_reset_sent = 1; 159 return BTSTACK_CHIPSET_VALID_COMMAND; 160 } else { 161 return BTSTACK_CHIPSET_DONE; 162 } 163 } 164 165 uint32_t tag; 166 uint16_t bytes_to_upload; 167 uint32_t crc; 168 169 switch (upload_state){ 170 case UPLOAD_IDLE: 171 // check for 'em93' tag 172 tag = little_endian_read_32(container_blob_data, container_blob_offset); 173 if (0x656d3933 != tag) { 174 log_error("Expected 0x656d3933 ('em934') but got %08x", tag); 175 return BTSTACK_CHIPSET_DONE; 176 } 177 // fetch info for current container 178 container_end = container_blob_offset + little_endian_read_32(container_blob_data, container_blob_offset + 4); 179 // start uploading (<= 59 bytes) 180 patch_sequence_number = 1; 181 bytes_to_upload = btstack_min(59, container_end - container_blob_offset); 182 crc = btstack_crc32(&container_blob_data[container_blob_offset], bytes_to_upload); 183 // build command 184 little_endian_store_16(hci_cmd_buffer, 0, HCI_OPCODE_EM_WRITE_PATCH_START); 185 hci_cmd_buffer[2] = 5 + bytes_to_upload; 186 hci_cmd_buffer[3] = 0; // upload to iRAM1 187 little_endian_store_32(hci_cmd_buffer, 4, crc); 188 memcpy(&hci_cmd_buffer[8], &container_blob_data[container_blob_offset], bytes_to_upload); 189 container_blob_offset += bytes_to_upload; 190 if (container_blob_offset < container_end){ 191 upload_state = UPLOAD_ACTIVE; 192 } 193 return BTSTACK_CHIPSET_VALID_COMMAND; 194 case UPLOAD_ACTIVE: 195 // Upload next segement 196 bytes_to_upload = btstack_min(58, container_end - container_blob_offset); 197 crc = btstack_crc32(&container_blob_data[container_blob_offset], bytes_to_upload); 198 // build command 199 little_endian_store_16(hci_cmd_buffer, 0, HCI_OPCODE_EM_WRITE_PATCH_CONTINUE); 200 hci_cmd_buffer[2] = 6 + bytes_to_upload; 201 little_endian_store_16(hci_cmd_buffer, 3, patch_sequence_number++); 202 little_endian_store_32(hci_cmd_buffer, 5, crc); 203 memcpy(&hci_cmd_buffer[9], &container_blob_data[container_blob_offset], bytes_to_upload); 204 container_blob_offset += bytes_to_upload; 205 if (container_blob_offset >= container_end){ 206 log_info("container done maybe another one"); 207 upload_state = UPLOAD_IDLE; 208 } 209 return BTSTACK_CHIPSET_VALID_COMMAND; 210 } 211 return BTSTACK_CHIPSET_DONE; 212 } 213 #endif 214 215 static const btstack_chipset_t btstack_chipset_em9301 = { 216 "EM9301", 217 #ifdef HAVE_EM9304_PATCH_CONTAINER 218 chipset_init, 219 chipset_next_command, 220 #else 221 NULL, 222 NULL, 223 #endif 224 chipset_set_baudrate_command, 225 chipset_set_bd_addr_command, 226 }; 227 228 // MARK: public API 229 const btstack_chipset_t * btstack_chipset_em9301_instance(void){ 230 return &btstack_chipset_em9301; 231 } 232