xref: /btstack/chipset/em9301/btstack_chipset_em9301.c (revision 1882d12dc36ae7b48f7f4ed3fd8d029fba3b08b1)
1 /*
2  * Copyright (C) 2014 BlueKitchen GmbH
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions
6  * are met:
7  *
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  * 3. Neither the name of the copyright holders nor the names of
14  *    contributors may be used to endorse or promote products derived
15  *    from this software without specific prior written permission.
16  * 4. Any redistribution, use, or modification is done solely for
17  *    personal benefit and not for any commercial purpose or for
18  *    monetary gain.
19  *
20  * THIS SOFTWARE IS PROVIDED BY BLUEKITCHEN GMBH AND CONTRIBUTORS
21  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
23  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL MATTHIAS
24  * RINGWALD OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
25  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
26  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
27  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
28  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
30  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31  * SUCH DAMAGE.
32  *
33  * Please inquire about commercial licensing options at
34  * [email protected]
35  *
36  */
37 
38 #define __BTSTACK_FILE__ "btstack_chipset_em9301.c"
39 
40 /*
41  *  btstack_chipset_em9301.c
42  *
43  *  Adapter to use em9301-based chipsets with BTstack
44  *
45  *  Allows to set public BD ADDR
46  */
47 
48 #include "btstack_config.h"
49 #include "btstack_chipset_em9301.h"
50 #include "btstack_debug.h"
51 
52 #include <stddef.h>   /* NULL */
53 #include <string.h>   /* memcpy */
54 #include "hci.h"
55 
56 // should go to some common place
57 #define OPCODE(ogf, ocf) (ocf | ogf << 10)
58 
59 #define HCI_OPCODE_EM_WRITE_PATCH_START        (0xFC27)
60 #define HCI_OPCODE_EM_WRITE_PATCH_CONTINUE     (0xFC28)
61 #define HCI_OPCODE_EM_WRITE_PATCH_ABORT        (0xFC29)
62 #define HCI_OPCODE_EM_CPU_RESET                (0xFC32)
63 #define HCI_OPCODE_EM_PATCH_QUERY              (0xFC34)
64 
65 static const uint32_t baudrates[] = {
66 	      0,
67 	      0,
68 	      0,
69 	   9600,
70 	  14400,
71 	  19200,
72 	  28800,
73 	  38400,
74 	  57600,
75 	  76800,
76 	 115200,
77 	 230400,
78 	 460800,
79 	 921600,
80 	1843200,
81 };
82 
83 #ifdef HAVE_EM9304_PATCH_CONTAINER
84 
85 extern const uint8_t   container_blob_data[];
86 extern const uint32_t  container_blob_size;
87 
88 static uint32_t container_blob_offset  = 0;
89 static uint32_t container_end;	// current container
90 static uint16_t patch_sequence_number;
91 static int      em_cpu_reset_sent;
92 
93 static enum {
94 	UPLOAD_IDLE,
95 	UPLOAD_ACTIVE,
96 } upload_state;
97 
98 #endif
99 
100 // CRC32 implementation using 4-bit lookup table created by pycrc v0.9.1, https://pycrc.org
101 // ./pycrc.py --model crc-32 --algorithm table-driven --table-idx-width=4 --generate c
102 static const uint32_t crc32_table[16] = {
103 	0x00000000, 0x1db71064, 0x3b6e20c8, 0x26d930ac, 0x76dc4190, 0x6b6b51f4, 0x4db26158, 0x5005713c,
104 	0xedb88320, 0xf00f9344, 0xd6d6a3e8, 0xcb61b38c, 0x9b64c2b0, 0x86d3d2d4, 0xa00ae278, 0xbdbdf21c
105 };
106 
107 uint32_t btstack_crc32(const uint8_t *buf, uint16_t size){
108 	uint16_t pos;
109 	uint32_t crc = 0xffffffff;
110 	for (pos=0 ; pos<size ; pos++){
111         int tbl_idx = crc ^ buf[pos];
112         crc = crc32_table[tbl_idx & 0x0f] ^ (crc >> 4);
113         tbl_idx = crc ^ (buf[pos] >> 4);
114         crc = crc32_table[tbl_idx & 0x0f] ^ (crc >> 4);
115     }
116 	return ~crc;
117 }
118 
119 static void chipset_set_bd_addr_command(bd_addr_t addr, uint8_t *hci_cmd_buffer){
120     little_endian_store_16(hci_cmd_buffer, 0, OPCODE(OGF_VENDOR, 0x02));
121     hci_cmd_buffer[2] = 0x06;
122     reverse_bd_addr(addr, &hci_cmd_buffer[3]);
123 }
124 
125 static void chipset_set_baudrate_command(uint32_t baudrate, uint8_t *hci_cmd_buffer){
126 	// lookup baudrates
127 	int i;
128 	int found = 0;
129 	for (i=0 ; i < sizeof(baudrates)/sizeof(uint32_t) ; i++){
130 		if (baudrates[i] == baudrate){
131 			found = i;
132 			break;
133 		}
134 	}
135 	if (!found){
136 		log_error("Baudrate %u not found in table", baudrate);
137 		return;
138 	}
139     little_endian_store_16(hci_cmd_buffer, 0, OPCODE(OGF_VENDOR, 0x07));
140     hci_cmd_buffer[2] = 0x01;
141     hci_cmd_buffer[3] = i;
142 }
143 
144 #ifdef HAVE_EM9304_PATCH_CONTAINER
145 static void chipset_init(const void * config){
146 	UNUSED(config);
147 	container_blob_offset = 0;
148 	em_cpu_reset_sent = 0;
149 	upload_state = UPLOAD_IDLE;
150 }
151 
152 static btstack_chipset_result_t chipset_next_command(uint8_t * hci_cmd_buffer){
153 	log_info("pos %u, container end %u, blob size %u", container_blob_offset, container_end, container_blob_size);
154 
155     if (container_blob_offset >= container_blob_size) {
156     	if (0 == em_cpu_reset_sent){
157     		// send EM CPU Reset
158 		    little_endian_store_16(hci_cmd_buffer, 0, HCI_OPCODE_EM_CPU_RESET);
159 		    hci_cmd_buffer[2] = 0;
160 		    em_cpu_reset_sent = 1;
161 		    return BTSTACK_CHIPSET_VALID_COMMAND;
162     	} else {
163 	        return BTSTACK_CHIPSET_DONE;
164     	}
165     }
166 
167     uint32_t tag;
168     uint16_t bytes_to_upload;
169     uint32_t crc;
170     uint32_t container_size;
171 
172 	switch (upload_state){
173 		case UPLOAD_IDLE:
174 			// check for 'em93' tag
175 			tag = little_endian_read_32(container_blob_data, container_blob_offset);
176 			if (0x656d3933 != tag) {
177 				log_error("Expected 0x656d3933 ('em934') but got %08x", (int) tag);
178 				return BTSTACK_CHIPSET_DONE;
179 			}
180 			// fetch info for current container
181 			container_size = little_endian_read_32(container_blob_data, container_blob_offset + 4);
182 			container_end = container_blob_offset + container_size;
183 			// start uploading (<= 59 bytes)
184 			patch_sequence_number = 1;
185 			bytes_to_upload = btstack_min(59, container_end - container_blob_offset);
186 			crc = btstack_crc32(&container_blob_data[container_blob_offset], bytes_to_upload);
187 			log_info("Container type 0x%02x, id %u, build nr %u, user build nr %u, size %u",
188 				(int) container_blob_data[container_blob_offset+9],
189 				(int) container_blob_data[container_blob_offset+10],
190 				(int) little_endian_read_16(container_blob_data, container_blob_offset+12),
191 				(int) little_endian_read_16(container_blob_data, container_blob_offset+14),
192 				(int) container_size);
193 			// build command
194 		    little_endian_store_16(hci_cmd_buffer, 0, HCI_OPCODE_EM_WRITE_PATCH_START);
195 		    hci_cmd_buffer[2] = 5 + bytes_to_upload;
196 		    hci_cmd_buffer[3] = 0;	// upload to iRAM1
197 		    little_endian_store_32(hci_cmd_buffer, 4, crc);
198 		    memcpy(&hci_cmd_buffer[8], &container_blob_data[container_blob_offset], bytes_to_upload);
199 		    container_blob_offset += bytes_to_upload;
200 		    if (container_blob_offset < container_end){
201 		    	upload_state = UPLOAD_ACTIVE;
202 		    }
203 		    return BTSTACK_CHIPSET_VALID_COMMAND;
204 		case UPLOAD_ACTIVE:
205 			// Upload next segement
206 			bytes_to_upload = btstack_min(58, container_end - container_blob_offset);
207 			crc = btstack_crc32(&container_blob_data[container_blob_offset], bytes_to_upload);
208 			// build command
209 		    little_endian_store_16(hci_cmd_buffer, 0, HCI_OPCODE_EM_WRITE_PATCH_CONTINUE);
210 		    hci_cmd_buffer[2] = 6 + bytes_to_upload;
211 		    little_endian_store_16(hci_cmd_buffer, 3, patch_sequence_number++);
212 		    little_endian_store_32(hci_cmd_buffer, 5, crc);
213 		    memcpy(&hci_cmd_buffer[9], &container_blob_data[container_blob_offset], bytes_to_upload);
214 		    container_blob_offset += bytes_to_upload;
215 		    if (container_blob_offset >= container_end){
216 		    	log_info("container done maybe another one");
217 		    	upload_state = UPLOAD_IDLE;
218 		    }
219 		    return BTSTACK_CHIPSET_VALID_COMMAND;
220 	}
221 	return BTSTACK_CHIPSET_DONE;
222 }
223 #endif
224 
225 static const btstack_chipset_t btstack_chipset_em9301 = {
226     "EM9301",
227 #ifdef HAVE_EM9304_PATCH_CONTAINER
228     chipset_init,
229     chipset_next_command,
230 #else
231     NULL,
232     NULL,
233 #endif
234     chipset_set_baudrate_command,
235     chipset_set_bd_addr_command,
236 };
237 
238 // MARK: public API
239 const btstack_chipset_t * btstack_chipset_em9301_instance(void){
240     return &btstack_chipset_em9301;
241 }
242