1 /********************************************************************* 2 * SEGGER MICROCONTROLLER GmbH & Co. KG * 3 * Solutions for real time microcontroller applications * 4 ********************************************************************** 5 * * 6 * (c) 2014 - 2017 SEGGER Microcontroller GmbH & Co. KG * 7 * * 8 * www.segger.com Support: [email protected] * 9 * * 10 ********************************************************************** 11 * * 12 * SEGGER RTT * Real Time Transfer for embedded targets * 13 * * 14 ********************************************************************** 15 * * 16 * All rights reserved. * 17 * * 18 * SEGGER strongly recommends to not make any changes * 19 * to or modify the source code of this software in order to stay * 20 * compatible with the RTT protocol and J-Link. * 21 * * 22 * Redistribution and use in source and binary forms, with or * 23 * without modification, are permitted provided that the following * 24 * conditions are met: * 25 * * 26 * o Redistributions of source code must retain the above copyright * 27 * notice, this list of conditions and the following disclaimer. * 28 * * 29 * o Redistributions in binary form must reproduce the above * 30 * copyright notice, this list of conditions and the following * 31 * disclaimer in the documentation and/or other materials provided * 32 * with the distribution. * 33 * * 34 * o Neither the name of SEGGER Microcontroller GmbH & Co. KG * 35 * nor the names of its contributors may be used to endorse or * 36 * promote products derived from this software without specific * 37 * prior written permission. * 38 * * 39 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * 40 * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * 41 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * 42 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * 43 * DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR * 44 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * 45 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * 46 * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * 47 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * 48 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * 49 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * 50 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * 51 * DAMAGE. * 52 * * 53 ********************************************************************** 54 ---------------------------END-OF-HEADER------------------------------ 55 File : SEGGER_RTT_Conf.h 56 Purpose : Implementation of SEGGER real-time transfer (RTT) which 57 allows real-time communication on targets which support 58 debugger memory accesses while the CPU is running. 59 Revision: $Rev: 7859 $ 60 61 */ 62 63 #ifndef SEGGER_RTT_CONF_H 64 #define SEGGER_RTT_CONF_H 65 66 #ifdef __IAR_SYSTEMS_ICC__ 67 #include <intrinsics.h> 68 #endif 69 70 /********************************************************************* 71 * 72 * Defines, configurable 73 * 74 ********************************************************************** 75 */ 76 77 #define SEGGER_RTT_MAX_NUM_UP_BUFFERS (3) // Max. number of up-buffers (T->H) available on this target (Default: 3) 78 #define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (3) // Max. number of down-buffers (H->T) available on this target (Default: 3) 79 80 #define BUFFER_SIZE_UP (1024) // Size of the buffer for terminal output of target, up to host (Default: 1k) 81 #define BUFFER_SIZE_DOWN (16) // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16) 82 83 #define SEGGER_RTT_PRINTF_BUFFER_SIZE (64u) // Size of buffer for RTT printf to bulk-send chars via RTT (Default: 64) 84 85 #define SEGGER_RTT_MODE_DEFAULT SEGGER_RTT_MODE_NO_BLOCK_SKIP // Mode for pre-initialized terminal channel (buffer 0) 86 87 #define USE_RTT_ASM (0) // Use assembler version of SEGGER_RTT.c when 1 88 89 /********************************************************************* 90 * 91 * RTT memcpy configuration 92 * 93 * memcpy() is good for large amounts of data, 94 * but the overhead is big for small amounts, which are usually stored via RTT. 95 * With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead. 96 * 97 * SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions. 98 * This is may be required with memory access restrictions, 99 * such as on Cortex-A devices with MMU. 100 */ 101 #define SEGGER_RTT_MEMCPY_USE_BYTELOOP 0 // 0: Use memcpy/SEGGER_RTT_MEMCPY, 1: Use a simple byte-loop 102 // 103 // Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets 104 // 105 //#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__)) 106 // #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) SEGGER_memcpy((pDest), (pSrc), (NumBytes)) 107 //#endif 108 109 // 110 // Target is not allowed to perform other RTT operations while string still has not been stored completely. 111 // Otherwise we would probably end up with a mixed string in the buffer. 112 // If using RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here. 113 // 114 // SEGGER_RTT_MAX_INTERRUPT_PRIORITY can be used in the sample lock routines on Cortex-M3/4. 115 // Make sure to mask all interrupts which can send RTT data, i.e. generate SystemView events, or cause task switches. 116 // When high-priority interrupts must not be masked while sending RTT data, SEGGER_RTT_MAX_INTERRUPT_PRIORITY needs to be adjusted accordingly. 117 // (Higher priority = lower priority number) 118 // Default value for embOS: 128u 119 // Default configuration in FreeRTOS: configMAX_SYSCALL_INTERRUPT_PRIORITY: ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) ) 120 // In case of doubt mask all interrupts: 1 << (8 - BASEPRI_PRIO_BITS) i.e. 1 << 5 when 3 bits are implemented in NVIC 121 // or define SEGGER_RTT_LOCK() to completely disable interrupts. 122 // 123 124 #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) // Interrupt priority to lock on SEGGER_RTT_LOCK on Cortex-M3/4 (Default: 0x20) 125 126 /********************************************************************* 127 * 128 * RTT lock configuration for SEGGER Embedded Studio, 129 * Rowley CrossStudio and GCC 130 */ 131 #if (defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__) 132 #ifdef __ARM_ARCH_6M__ 133 #define SEGGER_RTT_LOCK() { \ 134 unsigned int LockState; \ 135 __asm volatile ("mrs %0, primask \n\t" \ 136 "mov r1, $1 \n\t" \ 137 "msr primask, r1 \n\t" \ 138 : "=r" (LockState) \ 139 : \ 140 : "r1" \ 141 ); 142 143 #define SEGGER_RTT_UNLOCK() __asm volatile ("msr primask, %0 \n\t" \ 144 : \ 145 : "r" (LockState) \ 146 : \ 147 ); \ 148 } 149 150 #elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__)) 151 #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY 152 #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) 153 #endif 154 #define SEGGER_RTT_LOCK() { \ 155 unsigned int LockState; \ 156 __asm volatile ("mrs %0, basepri \n\t" \ 157 "mov r1, %1 \n\t" \ 158 "msr basepri, r1 \n\t" \ 159 : "=r" (LockState) \ 160 : "i"(SEGGER_RTT_MAX_INTERRUPT_PRIORITY) \ 161 : "r1" \ 162 ); 163 164 #define SEGGER_RTT_UNLOCK() __asm volatile ("msr basepri, %0 \n\t" \ 165 : \ 166 : "r" (LockState) \ 167 : \ 168 ); \ 169 } 170 171 #elif defined(__ARM_ARCH_7A__) 172 #define SEGGER_RTT_LOCK() { \ 173 unsigned int LockState; \ 174 __asm volatile ("mrs r1, CPSR \n\t" \ 175 "mov %0, r1 \n\t" \ 176 "orr r1, r1, #0xC0 \n\t" \ 177 "msr CPSR_c, r1 \n\t" \ 178 : "=r" (LockState) \ 179 : \ 180 : "r1" \ 181 ); 182 183 #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ 184 "mrs r1, CPSR \n\t" \ 185 "bic r1, r1, #0xC0 \n\t" \ 186 "and r0, r0, #0xC0 \n\t" \ 187 "orr r1, r1, r0 \n\t" \ 188 "msr CPSR_c, r1 \n\t" \ 189 : \ 190 : "r" (LockState) \ 191 : "r0", "r1" \ 192 ); \ 193 } 194 #else 195 #define SEGGER_RTT_LOCK() 196 #define SEGGER_RTT_UNLOCK() 197 #endif 198 #endif 199 200 /********************************************************************* 201 * 202 * RTT lock configuration for IAR EWARM 203 */ 204 #ifdef __ICCARM__ 205 #if (defined (__ARM6M__) && (__CORE__ == __ARM6M__)) 206 #define SEGGER_RTT_LOCK() { \ 207 unsigned int LockState; \ 208 LockState = __get_PRIMASK(); \ 209 __set_PRIMASK(1); 210 211 #define SEGGER_RTT_UNLOCK() __set_PRIMASK(LockState); \ 212 } 213 #elif ((defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)) || (defined (__ARM7M__) && (__CORE__ == __ARM7M__))) 214 #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY 215 #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) 216 #endif 217 #define SEGGER_RTT_LOCK() { \ 218 unsigned int LockState; \ 219 LockState = __get_BASEPRI(); \ 220 __set_BASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); 221 222 #define SEGGER_RTT_UNLOCK() __set_BASEPRI(LockState); \ 223 } 224 #endif 225 #endif 226 227 /********************************************************************* 228 * 229 * RTT lock configuration for IAR RX 230 */ 231 #ifdef __ICCRX__ 232 #define SEGGER_RTT_LOCK() { \ 233 unsigned long LockState; \ 234 LockState = __get_interrupt_state(); \ 235 __disable_interrupt(); 236 237 #define SEGGER_RTT_UNLOCK() __set_interrupt_state(LockState); \ 238 } 239 #endif 240 241 /********************************************************************* 242 * 243 * RTT lock configuration for IAR RL78 244 */ 245 #ifdef __ICCRL78__ 246 #define SEGGER_RTT_LOCK() { \ 247 __istate_t LockState; \ 248 LockState = __get_interrupt_state(); \ 249 __disable_interrupt(); 250 251 #define SEGGER_RTT_UNLOCK() __set_interrupt_state(LockState); \ 252 } 253 #endif 254 255 /********************************************************************* 256 * 257 * RTT lock configuration for KEIL ARM 258 */ 259 #ifdef __CC_ARM 260 #if (defined __TARGET_ARCH_6S_M) 261 #define SEGGER_RTT_LOCK() { \ 262 unsigned int LockState; \ 263 register unsigned char PRIMASK __asm( "primask"); \ 264 LockState = PRIMASK; \ 265 PRIMASK = 1u; \ 266 __schedule_barrier(); 267 268 #define SEGGER_RTT_UNLOCK() PRIMASK = LockState; \ 269 __schedule_barrier(); \ 270 } 271 #elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M)) 272 #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY 273 #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) 274 #endif 275 #define SEGGER_RTT_LOCK() { \ 276 unsigned int LockState; \ 277 register unsigned char BASEPRI __asm( "basepri"); \ 278 LockState = BASEPRI; \ 279 BASEPRI = SEGGER_RTT_MAX_INTERRUPT_PRIORITY; \ 280 __schedule_barrier(); 281 282 #define SEGGER_RTT_UNLOCK() BASEPRI = LockState; \ 283 __schedule_barrier(); \ 284 } 285 #endif 286 #endif 287 288 /********************************************************************* 289 * 290 * RTT lock configuration for TI ARM 291 */ 292 #ifdef __TI_ARM__ 293 #if defined (__TI_ARM_V6M0__) 294 #define SEGGER_RTT_LOCK() { \ 295 unsigned int LockState; \ 296 LockState = __get_PRIMASK(); \ 297 __set_PRIMASK(1); 298 299 #define SEGGER_RTT_UNLOCK() __set_PRIMASK(LockState); \ 300 } 301 #elif (defined (__TI_ARM_V7M3__) || defined (__TI_ARM_V7M4__)) 302 #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY 303 #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) 304 #endif 305 #define SEGGER_RTT_LOCK() { \ 306 unsigned int LockState; \ 307 LockState = OS_GetBASEPRI(); \ 308 OS_SetBASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); 309 310 #define SEGGER_RTT_UNLOCK() OS_SetBASEPRI(LockState); \ 311 } 312 #endif 313 #endif 314 315 /********************************************************************* 316 * 317 * RTT lock configuration fallback 318 */ 319 #ifndef SEGGER_RTT_LOCK 320 #define SEGGER_RTT_LOCK() // Lock RTT (nestable) (i.e. disable interrupts) 321 #endif 322 323 #ifndef SEGGER_RTT_UNLOCK 324 #define SEGGER_RTT_UNLOCK() // Unlock RTT (nestable) (i.e. enable previous interrupt lock state) 325 #endif 326 327 #endif 328 /*************************** End of file ****************************/ 329