1 /********************************************************************* 2 * SEGGER Microcontroller GmbH * 3 * The Embedded Experts * 4 ********************************************************************** 5 * * 6 * (c) 1995 - 2019 SEGGER Microcontroller GmbH * 7 * * 8 * www.segger.com Support: [email protected] * 9 * * 10 ********************************************************************** 11 * * 12 * SEGGER RTT * Real Time Transfer for embedded targets * 13 * * 14 ********************************************************************** 15 * * 16 * All rights reserved. * 17 * * 18 * SEGGER strongly recommends to not make any changes * 19 * to or modify the source code of this software in order to stay * 20 * compatible with the RTT protocol and J-Link. * 21 * * 22 * Redistribution and use in source and binary forms, with or * 23 * without modification, are permitted provided that the following * 24 * condition is met: * 25 * * 26 * o Redistributions of source code must retain the above copyright * 27 * notice, this condition and the following disclaimer. * 28 * * 29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * 30 * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * 31 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * 32 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * 33 * DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR * 34 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * 35 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * 36 * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * 37 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * 38 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * 39 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * 40 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * 41 * DAMAGE. * 42 * * 43 ********************************************************************** 44 ---------------------------END-OF-HEADER------------------------------ 45 File : SEGGER_RTT.h 46 Purpose : Implementation of SEGGER real-time transfer which allows 47 real-time communication on targets which support debugger 48 memory accesses while the CPU is running. 49 Revision: $Rev: 25842 $ 50 ---------------------------------------------------------------------- 51 */ 52 53 #ifndef SEGGER_RTT_H 54 #define SEGGER_RTT_H 55 56 #include "SEGGER_RTT_Conf.h" 57 58 /********************************************************************* 59 * 60 * Defines, defaults 61 * 62 ********************************************************************** 63 */ 64 65 #ifndef RTT_USE_ASM 66 // 67 // Some cores support out-of-order memory accesses (reordering of memory accesses in the core) 68 // For such cores, we need to define a memory barrier to guarantee the order of certain accesses to the RTT ring buffers. 69 // Needed for: 70 // Cortex-M7 (ARMv7-M) 71 // Cortex-M23 (ARM-v8M) 72 // Cortex-M33 (ARM-v8M) 73 // Cortex-A/R (ARM-v7A/R) 74 // 75 // We do not explicitly check for "Embedded Studio" as the compiler in use determines what we support. 76 // You can use an external toolchain like IAR inside ES. So there is no point in checking for "Embedded Studio" 77 // 78 #if (defined __CROSSWORKS_ARM) // Rowley Crossworks 79 #define _CC_HAS_RTT_ASM_SUPPORT 1 80 #if (defined __ARM_ARCH_7M__) // Cortex-M3 81 #define _CORE_HAS_RTT_ASM_SUPPORT 1 82 #elif (defined __ARM_ARCH_7EM__) // Cortex-M4/M7 83 #define _CORE_HAS_RTT_ASM_SUPPORT 1 84 #define _CORE_NEEDS_DMB 1 85 #define RTT__DMB() __asm volatile ("dmb\n" : : :); 86 #elif (defined __ARM_ARCH_8M_BASE__) // Cortex-M23 87 #define _CORE_HAS_RTT_ASM_SUPPORT 0 88 #define _CORE_NEEDS_DMB 1 89 #define RTT__DMB() __asm volatile ("dmb\n" : : :); 90 #elif (defined __ARM_ARCH_8M_MAIN__) // Cortex-M33 91 #define _CORE_HAS_RTT_ASM_SUPPORT 1 92 #define _CORE_NEEDS_DMB 1 93 #define RTT__DMB() __asm volatile ("dmb\n" : : :); 94 #else 95 #define _CORE_HAS_RTT_ASM_SUPPORT 0 96 #endif 97 #elif (defined __ARMCC_VERSION) 98 // 99 // ARM compiler 100 // ARM compiler V6.0 and later is clang based. 101 // Our ASM part is compatible to clang. 102 // 103 #if (__ARMCC_VERSION >= 6000000) 104 #define _CC_HAS_RTT_ASM_SUPPORT 1 105 #else 106 #define _CC_HAS_RTT_ASM_SUPPORT 0 107 #endif 108 #if (defined __ARM_ARCH_6M__) // Cortex-M0 / M1 109 #define _CORE_HAS_RTT_ASM_SUPPORT 0 // No ASM support for this architecture 110 #elif (defined __ARM_ARCH_7M__) // Cortex-M3 111 #define _CORE_HAS_RTT_ASM_SUPPORT 1 112 #elif (defined __ARM_ARCH_7EM__) // Cortex-M4/M7 113 #define _CORE_HAS_RTT_ASM_SUPPORT 1 114 #define _CORE_NEEDS_DMB 1 115 #define RTT__DMB() __asm volatile ("dmb\n" : : :); 116 #elif (defined __ARM_ARCH_8M_BASE__) // Cortex-M23 117 #define _CORE_HAS_RTT_ASM_SUPPORT 0 118 #define _CORE_NEEDS_DMB 1 119 #define RTT__DMB() __asm volatile ("dmb\n" : : :); 120 #elif (defined __ARM_ARCH_8M_MAIN__) // Cortex-M33 121 #define _CORE_HAS_RTT_ASM_SUPPORT 1 122 #define _CORE_NEEDS_DMB 1 123 #define RTT__DMB() __asm volatile ("dmb\n" : : :); 124 #elif ((defined __ARM_ARCH_7A__) || (defined __ARM_ARCH_7R__)) // Cortex-A/R 32-bit ARMv7-A/R 125 #define _CORE_NEEDS_DMB 1 126 #define RTT__DMB() __asm volatile ("dmb\n" : : :); 127 #else 128 #define _CORE_HAS_RTT_ASM_SUPPORT 0 129 #endif 130 #elif ((defined __GNUC__) || (defined __clang__)) 131 // 132 // GCC / Clang 133 // 134 #define _CC_HAS_RTT_ASM_SUPPORT 1 135 // ARM 7/9: __ARM_ARCH_5__ / __ARM_ARCH_5E__ / __ARM_ARCH_5T__ / __ARM_ARCH_5T__ / __ARM_ARCH_5TE__ 136 #if (defined __ARM_ARCH_7M__) // Cortex-M3 137 #define _CORE_HAS_RTT_ASM_SUPPORT 1 138 #elif (defined __ARM_ARCH_7EM__) // Cortex-M4/M7 139 #define _CORE_HAS_RTT_ASM_SUPPORT 1 140 #define _CORE_NEEDS_DMB 1 // Only Cortex-M7 needs a DMB but we cannot distinguish M4 and M7 here... 141 #define RTT__DMB() __asm volatile ("dmb\n" : : :); 142 #elif (defined __ARM_ARCH_8M_BASE__) // Cortex-M23 143 #define _CORE_HAS_RTT_ASM_SUPPORT 0 144 #define _CORE_NEEDS_DMB 1 145 #define RTT__DMB() __asm volatile ("dmb\n" : : :); 146 #elif (defined __ARM_ARCH_8M_MAIN__) // Cortex-M33 147 #define _CORE_HAS_RTT_ASM_SUPPORT 1 148 #define _CORE_NEEDS_DMB 1 149 #define RTT__DMB() __asm volatile ("dmb\n" : : :); 150 #elif ((defined __ARM_ARCH_7A__) || (defined __ARM_ARCH_7R__)) // Cortex-A/R 32-bit ARMv7-A/R 151 #define _CORE_NEEDS_DMB 1 152 #define RTT__DMB() __asm volatile ("dmb\n" : : :); 153 #else 154 #define _CORE_HAS_RTT_ASM_SUPPORT 0 155 #endif 156 #elif ((defined __IASMARM__) || (defined __ICCARM__)) 157 // 158 // IAR assembler/compiler 159 // 160 #define _CC_HAS_RTT_ASM_SUPPORT 1 161 #if (__VER__ < 6300000) 162 #define VOLATILE 163 #else 164 #define VOLATILE volatile 165 #endif 166 #if (defined __ARM7M__) // Needed for old versions that do not know the define yet 167 #if (__CORE__ == __ARM7M__) // Cortex-M3 168 #define _CORE_HAS_RTT_ASM_SUPPORT 1 169 #endif 170 #endif 171 #if (defined __ARM7EM__) 172 #if (__CORE__ == __ARM7EM__) // Cortex-M4/M7 173 #define _CORE_HAS_RTT_ASM_SUPPORT 1 174 #define _CORE_NEEDS_DMB 1 175 #define RTT__DMB() asm VOLATILE ("DMB"); 176 #endif 177 #endif 178 #if (defined __ARM8M_BASELINE__) 179 #if (__CORE__ == __ARM8M_BASELINE__) // Cortex-M23 180 #define _CORE_HAS_RTT_ASM_SUPPORT 0 181 #define _CORE_NEEDS_DMB 1 182 #define RTT__DMB() asm VOLATILE ("DMB"); 183 #endif 184 #endif 185 #if (defined __ARM8M_MAINLINE__) 186 #if (__CORE__ == __ARM8M_MAINLINE__) // Cortex-M33 187 #define _CORE_HAS_RTT_ASM_SUPPORT 1 188 #define _CORE_NEEDS_DMB 1 189 #define RTT__DMB() asm VOLATILE ("DMB"); 190 #endif 191 #endif 192 #if (defined __ARM8EM_MAINLINE__) 193 #if (__CORE__ == __ARM8EM_MAINLINE__) // Cortex-??? 194 #define _CORE_HAS_RTT_ASM_SUPPORT 1 195 #define _CORE_NEEDS_DMB 1 196 #define RTT__DMB() asm VOLATILE ("DMB"); 197 #endif 198 #endif 199 #if (defined __ARM7A__) 200 #if (__CORE__ == __ARM7A__) // Cortex-A 32-bit ARMv7-A 201 #define _CORE_NEEDS_DMB 1 202 #define RTT__DMB() asm VOLATILE ("DMB"); 203 #endif 204 #endif 205 #if (defined __ARM7R__) 206 #if (__CORE__ == __ARM7R__) // Cortex-R 32-bit ARMv7-R 207 #define _CORE_NEEDS_DMB 1 208 #define RTT__DMB() asm VOLATILE ("DMB"); 209 #endif 210 #endif 211 // TBD: __ARM8A__ => Cortex-A 64-bit ARMv8-A 212 // TBD: __ARM8R__ => Cortex-R 64-bit ARMv8-R 213 #else 214 // 215 // Other compilers 216 // 217 #define _CC_HAS_RTT_ASM_SUPPORT 0 218 #define _CORE_HAS_RTT_ASM_SUPPORT 0 219 #endif 220 // 221 // If IDE and core support the ASM version, enable ASM version by default 222 // 223 #ifndef _CORE_HAS_RTT_ASM_SUPPORT 224 #define _CORE_HAS_RTT_ASM_SUPPORT 0 // Default for unknown cores 225 #endif 226 #if (_CC_HAS_RTT_ASM_SUPPORT && _CORE_HAS_RTT_ASM_SUPPORT) 227 #define RTT_USE_ASM (1) 228 #else 229 #define RTT_USE_ASM (0) 230 #endif 231 #endif 232 233 #ifndef _CORE_NEEDS_DMB 234 #define _CORE_NEEDS_DMB 0 235 #endif 236 237 #ifndef RTT__DMB 238 #if _CORE_NEEDS_DMB 239 #error "Don't know how to place inline assembly for DMB" 240 #else 241 #define RTT__DMB() 242 #endif 243 #endif 244 245 #ifndef SEGGER_RTT_CPU_CACHE_LINE_SIZE 246 #define SEGGER_RTT_CPU_CACHE_LINE_SIZE (0) // On most target systems where RTT is used, we do not have a CPU cache, therefore 0 is a good default here 247 #endif 248 249 #ifndef SEGGER_RTT_UNCACHED_OFF 250 #if SEGGER_RTT_CPU_CACHE_LINE_SIZE 251 #error "SEGGER_RTT_UNCACHED_OFF must be defined when setting SEGGER_RTT_CPU_CACHE_LINE_SIZE != 0" 252 #else 253 #define SEGGER_RTT_UNCACHED_OFF (0) 254 #endif 255 #endif 256 #if RTT_USE_ASM 257 #if SEGGER_RTT_CPU_CACHE_LINE_SIZE 258 #error "RTT_USE_ASM is not available if SEGGER_RTT_CPU_CACHE_LINE_SIZE != 0" 259 #endif 260 #endif 261 262 #ifndef SEGGER_RTT_ASM // defined when SEGGER_RTT.h is included from assembly file 263 #include <stdlib.h> 264 #include <stdarg.h> 265 266 /********************************************************************* 267 * 268 * Defines, fixed 269 * 270 ********************************************************************** 271 */ 272 273 // 274 // Determine how much we must pad the control block to make it a multiple of a cache line in size 275 // Assuming: U8 = 1B 276 // U16 = 2B 277 // U32 = 4B 278 // U8/U16/U32* = 4B 279 // 280 #if SEGGER_RTT_CPU_CACHE_LINE_SIZE // Avoid division by zero in case we do not have any cache 281 #define SEGGER_RTT__ROUND_UP_2_CACHE_LINE_SIZE(NumBytes) (((NumBytes + SEGGER_RTT_CPU_CACHE_LINE_SIZE - 1) / SEGGER_RTT_CPU_CACHE_LINE_SIZE) * SEGGER_RTT_CPU_CACHE_LINE_SIZE) 282 #else 283 #define SEGGER_RTT__ROUND_UP_2_CACHE_LINE_SIZE(NumBytes) (NumBytes) 284 #endif 285 #define SEGGER_RTT__CB_SIZE (16 + 4 + 4 + (SEGGER_RTT_MAX_NUM_UP_BUFFERS * 24) + (SEGGER_RTT_MAX_NUM_DOWN_BUFFERS * 24)) 286 #define SEGGER_RTT__CB_PADDING (SEGGER_RTT__ROUND_UP_2_CACHE_LINE_SIZE(SEGGER_RTT__CB_SIZE) - SEGGER_RTT__CB_SIZE) 287 288 /********************************************************************* 289 * 290 * Types 291 * 292 ********************************************************************** 293 */ 294 295 // 296 // Description for a circular buffer (also called "ring buffer") 297 // which is used as up-buffer (T->H) 298 // 299 typedef struct { 300 const char* sName; // Optional name. Standard names so far are: "Terminal", "SysView", "J-Scope_t4i4" 301 char* pBuffer; // Pointer to start of buffer 302 unsigned SizeOfBuffer; // Buffer size in bytes. Note that one byte is lost, as this implementation does not fill up the buffer in order to avoid the problem of being unable to distinguish between full and empty. 303 unsigned WrOff; // Position of next item to be written by either target. 304 volatile unsigned RdOff; // Position of next item to be read by host. Must be volatile since it may be modified by host. 305 unsigned Flags; // Contains configuration flags. Flags[31:24] are used for validity check and must be zero. Flags[23:2] are reserved for future use. Flags[1:0] = RTT operating mode. 306 } SEGGER_RTT_BUFFER_UP; 307 308 // 309 // Description for a circular buffer (also called "ring buffer") 310 // which is used as down-buffer (H->T) 311 // 312 typedef struct { 313 const char* sName; // Optional name. Standard names so far are: "Terminal", "SysView", "J-Scope_t4i4" 314 char* pBuffer; // Pointer to start of buffer 315 unsigned SizeOfBuffer; // Buffer size in bytes. Note that one byte is lost, as this implementation does not fill up the buffer in order to avoid the problem of being unable to distinguish between full and empty. 316 volatile unsigned WrOff; // Position of next item to be written by host. Must be volatile since it may be modified by host. 317 unsigned RdOff; // Position of next item to be read by target (down-buffer). 318 unsigned Flags; // Contains configuration flags. Flags[31:24] are used for validity check and must be zero. Flags[23:2] are reserved for future use. Flags[1:0] = RTT operating mode. 319 } SEGGER_RTT_BUFFER_DOWN; 320 321 // 322 // RTT control block which describes the number of buffers available 323 // as well as the configuration for each buffer 324 // 325 // 326 typedef struct { 327 char acID[16]; // Initialized to "SEGGER RTT" 328 int MaxNumUpBuffers; // Initialized to SEGGER_RTT_MAX_NUM_UP_BUFFERS (type. 2) 329 int MaxNumDownBuffers; // Initialized to SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (type. 2) 330 SEGGER_RTT_BUFFER_UP aUp[SEGGER_RTT_MAX_NUM_UP_BUFFERS]; // Up buffers, transferring information up from target via debug probe to host 331 SEGGER_RTT_BUFFER_DOWN aDown[SEGGER_RTT_MAX_NUM_DOWN_BUFFERS]; // Down buffers, transferring information down from host via debug probe to target 332 #if SEGGER_RTT__CB_PADDING 333 unsigned char aDummy[SEGGER_RTT__CB_PADDING]; 334 #endif 335 } SEGGER_RTT_CB; 336 337 /********************************************************************* 338 * 339 * Global data 340 * 341 ********************************************************************** 342 */ 343 extern SEGGER_RTT_CB _SEGGER_RTT; 344 345 /********************************************************************* 346 * 347 * RTT API functions 348 * 349 ********************************************************************** 350 */ 351 #ifdef __cplusplus 352 extern "C" { 353 #endif 354 int SEGGER_RTT_AllocDownBuffer (const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags); 355 int SEGGER_RTT_AllocUpBuffer (const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags); 356 int SEGGER_RTT_ConfigUpBuffer (unsigned BufferIndex, const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags); 357 int SEGGER_RTT_ConfigDownBuffer (unsigned BufferIndex, const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags); 358 int SEGGER_RTT_GetKey (void); 359 unsigned SEGGER_RTT_HasData (unsigned BufferIndex); 360 int SEGGER_RTT_HasKey (void); 361 unsigned SEGGER_RTT_HasDataUp (unsigned BufferIndex); 362 void SEGGER_RTT_Init (void); 363 unsigned SEGGER_RTT_Read (unsigned BufferIndex, void* pBuffer, unsigned BufferSize); 364 unsigned SEGGER_RTT_ReadNoLock (unsigned BufferIndex, void* pData, unsigned BufferSize); 365 int SEGGER_RTT_SetNameDownBuffer (unsigned BufferIndex, const char* sName); 366 int SEGGER_RTT_SetNameUpBuffer (unsigned BufferIndex, const char* sName); 367 int SEGGER_RTT_SetFlagsDownBuffer (unsigned BufferIndex, unsigned Flags); 368 int SEGGER_RTT_SetFlagsUpBuffer (unsigned BufferIndex, unsigned Flags); 369 int SEGGER_RTT_WaitKey (void); 370 unsigned SEGGER_RTT_Write (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes); 371 unsigned SEGGER_RTT_WriteNoLock (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes); 372 unsigned SEGGER_RTT_WriteSkipNoLock (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes); 373 unsigned SEGGER_RTT_ASM_WriteSkipNoLock (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes); 374 unsigned SEGGER_RTT_WriteString (unsigned BufferIndex, const char* s); 375 void SEGGER_RTT_WriteWithOverwriteNoLock(unsigned BufferIndex, const void* pBuffer, unsigned NumBytes); 376 unsigned SEGGER_RTT_PutChar (unsigned BufferIndex, char c); 377 unsigned SEGGER_RTT_PutCharSkip (unsigned BufferIndex, char c); 378 unsigned SEGGER_RTT_PutCharSkipNoLock (unsigned BufferIndex, char c); 379 unsigned SEGGER_RTT_GetAvailWriteSpace (unsigned BufferIndex); 380 unsigned SEGGER_RTT_GetBytesInBuffer (unsigned BufferIndex); 381 // 382 // Function macro for performance optimization 383 // 384 #define SEGGER_RTT_HASDATA(n) (((SEGGER_RTT_BUFFER_DOWN*)((char*)&_SEGGER_RTT.aDown[n] + SEGGER_RTT_UNCACHED_OFF))->WrOff - ((SEGGER_RTT_BUFFER_DOWN*)((char*)&_SEGGER_RTT.aDown[n] + SEGGER_RTT_UNCACHED_OFF))->RdOff) 385 386 #if RTT_USE_ASM 387 #define SEGGER_RTT_WriteSkipNoLock SEGGER_RTT_ASM_WriteSkipNoLock 388 #endif 389 390 /********************************************************************* 391 * 392 * RTT transfer functions to send RTT data via other channels. 393 * 394 ********************************************************************** 395 */ 396 unsigned SEGGER_RTT_ReadUpBuffer (unsigned BufferIndex, void* pBuffer, unsigned BufferSize); 397 unsigned SEGGER_RTT_ReadUpBufferNoLock (unsigned BufferIndex, void* pData, unsigned BufferSize); 398 unsigned SEGGER_RTT_WriteDownBuffer (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes); 399 unsigned SEGGER_RTT_WriteDownBufferNoLock (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes); 400 401 #define SEGGER_RTT_HASDATA_UP(n) (((SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[n] + SEGGER_RTT_UNCACHED_OFF))->WrOff - ((SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[n] + SEGGER_RTT_UNCACHED_OFF))->RdOff) // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly 402 403 /********************************************************************* 404 * 405 * RTT "Terminal" API functions 406 * 407 ********************************************************************** 408 */ 409 int SEGGER_RTT_SetTerminal (unsigned char TerminalId); 410 int SEGGER_RTT_TerminalOut (unsigned char TerminalId, const char* s); 411 412 /********************************************************************* 413 * 414 * RTT printf functions (require SEGGER_RTT_printf.c) 415 * 416 ********************************************************************** 417 */ 418 int SEGGER_RTT_printf(unsigned BufferIndex, const char * sFormat, ...); 419 int SEGGER_RTT_vprintf(unsigned BufferIndex, const char * sFormat, va_list * pParamList); 420 421 #ifdef __cplusplus 422 } 423 #endif 424 425 #endif // ifndef(SEGGER_RTT_ASM) 426 427 /********************************************************************* 428 * 429 * Defines 430 * 431 ********************************************************************** 432 */ 433 434 // 435 // Operating modes. Define behavior if buffer is full (not enough space for entire message) 436 // 437 #define SEGGER_RTT_MODE_NO_BLOCK_SKIP (0) // Skip. Do not block, output nothing. (Default) 438 #define SEGGER_RTT_MODE_NO_BLOCK_TRIM (1) // Trim: Do not block, output as much as fits. 439 #define SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL (2) // Block: Wait until there is space in the buffer. 440 #define SEGGER_RTT_MODE_MASK (3) 441 442 // 443 // Control sequences, based on ANSI. 444 // Can be used to control color, and clear the screen 445 // 446 #define RTT_CTRL_RESET "\x1B[0m" // Reset to default colors 447 #define RTT_CTRL_CLEAR "\x1B[2J" // Clear screen, reposition cursor to top left 448 449 #define RTT_CTRL_TEXT_BLACK "\x1B[2;30m" 450 #define RTT_CTRL_TEXT_RED "\x1B[2;31m" 451 #define RTT_CTRL_TEXT_GREEN "\x1B[2;32m" 452 #define RTT_CTRL_TEXT_YELLOW "\x1B[2;33m" 453 #define RTT_CTRL_TEXT_BLUE "\x1B[2;34m" 454 #define RTT_CTRL_TEXT_MAGENTA "\x1B[2;35m" 455 #define RTT_CTRL_TEXT_CYAN "\x1B[2;36m" 456 #define RTT_CTRL_TEXT_WHITE "\x1B[2;37m" 457 458 #define RTT_CTRL_TEXT_BRIGHT_BLACK "\x1B[1;30m" 459 #define RTT_CTRL_TEXT_BRIGHT_RED "\x1B[1;31m" 460 #define RTT_CTRL_TEXT_BRIGHT_GREEN "\x1B[1;32m" 461 #define RTT_CTRL_TEXT_BRIGHT_YELLOW "\x1B[1;33m" 462 #define RTT_CTRL_TEXT_BRIGHT_BLUE "\x1B[1;34m" 463 #define RTT_CTRL_TEXT_BRIGHT_MAGENTA "\x1B[1;35m" 464 #define RTT_CTRL_TEXT_BRIGHT_CYAN "\x1B[1;36m" 465 #define RTT_CTRL_TEXT_BRIGHT_WHITE "\x1B[1;37m" 466 467 #define RTT_CTRL_BG_BLACK "\x1B[24;40m" 468 #define RTT_CTRL_BG_RED "\x1B[24;41m" 469 #define RTT_CTRL_BG_GREEN "\x1B[24;42m" 470 #define RTT_CTRL_BG_YELLOW "\x1B[24;43m" 471 #define RTT_CTRL_BG_BLUE "\x1B[24;44m" 472 #define RTT_CTRL_BG_MAGENTA "\x1B[24;45m" 473 #define RTT_CTRL_BG_CYAN "\x1B[24;46m" 474 #define RTT_CTRL_BG_WHITE "\x1B[24;47m" 475 476 #define RTT_CTRL_BG_BRIGHT_BLACK "\x1B[4;40m" 477 #define RTT_CTRL_BG_BRIGHT_RED "\x1B[4;41m" 478 #define RTT_CTRL_BG_BRIGHT_GREEN "\x1B[4;42m" 479 #define RTT_CTRL_BG_BRIGHT_YELLOW "\x1B[4;43m" 480 #define RTT_CTRL_BG_BRIGHT_BLUE "\x1B[4;44m" 481 #define RTT_CTRL_BG_BRIGHT_MAGENTA "\x1B[4;45m" 482 #define RTT_CTRL_BG_BRIGHT_CYAN "\x1B[4;46m" 483 #define RTT_CTRL_BG_BRIGHT_WHITE "\x1B[4;47m" 484 485 486 #endif 487 488 /*************************** End of file ****************************/ 489