1*df25739fSMilanka Ringwald /****************************************************************************** 2*df25739fSMilanka Ringwald * 3*df25739fSMilanka Ringwald * Copyright (C) 1999-2012 Broadcom Corporation 4*df25739fSMilanka Ringwald * 5*df25739fSMilanka Ringwald * Licensed under the Apache License, Version 2.0 (the "License"); 6*df25739fSMilanka Ringwald * you may not use this file except in compliance with the License. 7*df25739fSMilanka Ringwald * You may obtain a copy of the License at: 8*df25739fSMilanka Ringwald * 9*df25739fSMilanka Ringwald * http://www.apache.org/licenses/LICENSE-2.0 10*df25739fSMilanka Ringwald * 11*df25739fSMilanka Ringwald * Unless required by applicable law or agreed to in writing, software 12*df25739fSMilanka Ringwald * distributed under the License is distributed on an "AS IS" BASIS, 13*df25739fSMilanka Ringwald * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14*df25739fSMilanka Ringwald * See the License for the specific language governing permissions and 15*df25739fSMilanka Ringwald * limitations under the License. 16*df25739fSMilanka Ringwald * 17*df25739fSMilanka Ringwald ******************************************************************************/ 18*df25739fSMilanka Ringwald 19*df25739fSMilanka Ringwald /****************************************************************************** 20*df25739fSMilanka Ringwald * 21*df25739fSMilanka Ringwald * This file contains the code that performs Analysis of the input audio 22*df25739fSMilanka Ringwald * stream. 23*df25739fSMilanka Ringwald * 24*df25739fSMilanka Ringwald ******************************************************************************/ 25*df25739fSMilanka Ringwald #include <string.h> 26*df25739fSMilanka Ringwald #include "sbc_encoder.h" 27*df25739fSMilanka Ringwald #include "sbc_enc_func_declare.h" 28*df25739fSMilanka Ringwald /*#include <math.h>*/ 29*df25739fSMilanka Ringwald 30*df25739fSMilanka Ringwald #if (SBC_IS_64_MULT_IN_WINDOW_ACCU == TRUE) 31*df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_0_1 (SINT32)0x01659F45 /* gas32CoeffFor4SBs[8] = -gas32CoeffFor4SBs[32] = 0x01659F45 */ 32*df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_0_2 (SINT32)0x115B1ED2 /* gas32CoeffFor4SBs[16] = -gas32CoeffFor4SBs[24] = 0x115B1ED2 */ 33*df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_1_0 (SINT32)0x001194E6 /* gas32CoeffFor4SBs[1 et 39] = 0x001194E6 */ 34*df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_1_1 (SINT32)0x029DBAA3 /* gas32CoeffFor4SBs[9 et 31] = 0x029DBAA3 */ 35*df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_1_2 (SINT32)0x18F55C90 /* gas32CoeffFor4SBs[17 et 23] = 0x18F55C90 */ 36*df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_1_3 (SINT32)0xF60FAF37 /* gas32CoeffFor4SBs[15 et 25] = 0xF60FAF37 */ 37*df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_1_4 (SINT32)0xFF9BB9D5 /* gas32CoeffFor4SBs[7 et 33] = 0xFF9BB9D5 */ 38*df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_2_0 (SINT32)0x0030E2D3 /* gas32CoeffFor4SBs[2 et 38] = 0x0030E2D3 */ 39*df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_2_1 (SINT32)0x03B23341 /* gas32CoeffFor4SBs[10 et 30] = 0x03B23341 */ 40*df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_2_2 (SINT32)0x1F91CA46 /* gas32CoeffFor4SBs[18 et 22] = 0x1F91CA46 */ 41*df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_2_3 (SINT32)0xFC4F91D4 /* gas32CoeffFor4SBs[14 et 26] = 0xFC4F91D4 */ 42*df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_2_4 (SINT32)0x003D239B /* gas32CoeffFor4SBs[6 et 34] = 0x003D239B */ 43*df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_3_0 (SINT32)0x00599403 /* gas32CoeffFor4SBs[3 et 37] = 0x00599403 */ 44*df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_3_1 (SINT32)0x041EEE40 /* gas32CoeffFor4SBs[11 et 29] = 0x041EEE40 */ 45*df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_3_2 (SINT32)0x2412F251 /* gas32CoeffFor4SBs[19 et 21] = 0x2412F251 */ 46*df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_3_3 (SINT32)0x00C8F2BC /* gas32CoeffFor4SBs[13 et 27] = 0x00C8F2BC */ 47*df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_3_4 (SINT32)0x007F88E4 /* gas32CoeffFor4SBs[5 et 35] = 0x007F88E4 */ 48*df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_4_0 (SINT32)0x007DBCC8 /* gas32CoeffFor4SBs[4 et 36] = 0x007DBCC8 */ 49*df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_4_1 (SINT32)0x034FEE2C /* gas32CoeffFor4SBs[12 et 28] = 0x034FEE2C */ 50*df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_4_2 (SINT32)0x25AC1FF2 /* gas32CoeffFor4SBs[20] = 0x25AC1FF2 */ 51*df25739fSMilanka Ringwald 52*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_0_1 (SINT32)0x00B97348 /* 16 0x00B97348 */ 53*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_0_2 (SINT32)0x08B4307A /* 32 0x08B4307A */ 54*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_1_0 (SINT32)0x00052173 /* 1 et 79 = 0x00052173 */ 55*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_1_1 (SINT32)0x01071B96 /* 17 et 63 = 0x01071B96 */ 56*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_1_2 (SINT32)0x0A9F3E9A /* 33 et 47 = 0x0A9F3E9A*/ 57*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_1_3 (SINT32)0xF9312891 /* 31 et 49 = 0xF9312891 */ 58*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_1_4 (SINT32)0xFF8D6793 /* 15 et 65 = 0xFF8D6793 */ 59*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_2_0 (SINT32)0x000B3F71 /* 2 et 78 = 0x000B3F71 */ 60*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_2_1 (SINT32)0x0156B3CA /* 18 et 62 = 0x0156B3CA */ 61*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_2_2 (SINT32)0x0C7D59B6 /* 34 et 46 = 0x0C7D59B6 */ 62*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_2_3 (SINT32)0xFAFF95FC /* 30 et 50 = 0xFAFF95FC */ 63*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_2_4 (SINT32)0xFFC9F10E /* 14 et 66 = 0xFFC9F10E */ 64*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_3_0 (SINT32)0x00122C7D /* 3 et 77 = 0x00122C7D*/ 65*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_3_1 (SINT32)0x01A1B38B /* 19 et 61 = 0x01A1B38B */ 66*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_3_2 (SINT32)0x0E3BB16F /* 35 et 45 = 0x0E3BB16F */ 67*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_3_3 (SINT32)0xFCA86E7E /* 29 et 51 = 0xFCA86E7E */ 68*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_3_4 (SINT32)0xFFFA2413 /* 13 et 67 = 0xFFFA2413 */ 69*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_4_0 (SINT32)0x001AFF89 /* 4 et 66 = 0x001AFF89 */ 70*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_4_1 (SINT32)0x01E0224C /* 20 et 60 = 0x01E0224C */ 71*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_4_2 (SINT32)0x0FC721F9 /* 36 et 44 = 0x0FC721F9 */ 72*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_4_3 (SINT32)0xFE20435D /* 28 et 52 = 0xFE20435D */ 73*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_4_4 (SINT32)0x001D8FD2 /* 12 et 68 = 0x001D8FD2 */ 74*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_5_0 (SINT32)0x00255A62 /* 5 et 75 = 0x00255A62 */ 75*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_5_1 (SINT32)0x0209291F /* 21 et 59 = 0x0209291F */ 76*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_5_2 (SINT32)0x110ECEF0 /* 37 et 43 = 0x110ECEF0 */ 77*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_5_3 (SINT32)0xFF5EEB73 /* 27 et 53 = 0xFF5EEB73 */ 78*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_5_4 (SINT32)0x0034F8B6 /* 11 et 69 = 0x0034F8B6 */ 79*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_6_0 (SINT32)0x003060F4 /* 6 et 74 = 0x003060F4 */ 80*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_6_1 (SINT32)0x02138653 /* 22 et 58 = 0x02138653 */ 81*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_6_2 (SINT32)0x120435FA /* 38 et 42 = 0x120435FA */ 82*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_6_3 (SINT32)0x005FD0FF /* 26 et 54 = 0x005FD0FF */ 83*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_6_4 (SINT32)0x00415B75 /* 10 et 70 = 0x00415B75 */ 84*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_7_0 (SINT32)0x003A72E7 /* 7 et 73 = 0x003A72E7 */ 85*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_7_1 (SINT32)0x01F5F424 /* 23 et 57 = 0x01F5F424 */ 86*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_7_2 (SINT32)0x129C226F /* 39 et 41 = 0x129C226F */ 87*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_7_3 (SINT32)0x01223EBA /* 25 et 55 = 0x01223EBA */ 88*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_7_4 (SINT32)0x0044EF48 /* 9 et 71 = 0x0044EF48 */ 89*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_8_0 (SINT32)0x0041EC6A /* 8 et 72 = 0x0041EC6A */ 90*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_8_1 (SINT32)0x01A7ECEF /* 24 et 56 = 0x01A7ECEF */ 91*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_8_2 (SINT32)0x12CF6C75 /* 40 = 0x12CF6C75 */ 92*df25739fSMilanka Ringwald #else 93*df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_0_1 (SINT16)0x0166 /* gas32CoeffFor4SBs[8] = -gas32CoeffFor4SBs[32] = 0x01659F45 */ 94*df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_0_2 (SINT16)0x115B /* gas32CoeffFor4SBs[16] = -gas32CoeffFor4SBs[24] = 0x115B1ED2 */ 95*df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_1_0 (SINT16)0x0012 /* gas32CoeffFor4SBs[1 et 39] = 0x001194E6 */ 96*df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_1_1 (SINT16)0x029E /* gas32CoeffFor4SBs[9 et 31] = 0x029DBAA3 */ 97*df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_1_2 (SINT16)0x18F5 /* gas32CoeffFor4SBs[17 et 23] = 0x18F55C90 */ 98*df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_1_3 (SINT16)0xF610 /* gas32CoeffFor4SBs[15 et 25] = 0xF60FAF37 */ 99*df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_1_4 (SINT16)0xFF9C /* gas32CoeffFor4SBs[7 et 33] = 0xFF9BB9D5 */ 100*df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_2_0 (SINT16)0x0031 /* gas32CoeffFor4SBs[2 et 38] = 0x0030E2D3 */ 101*df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_2_1 (SINT16)0x03B2 /* gas32CoeffFor4SBs[10 et 30] = 0x03B23341 */ 102*df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_2_2 (SINT16)0x1F91 /* gas32CoeffFor4SBs[18 et 22] = 0x1F91CA46 */ 103*df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_2_3 (SINT16)0xFC50 /* gas32CoeffFor4SBs[14 et 26] = 0xFC4F91D4 */ 104*df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_2_4 (SINT16)0x003D /* gas32CoeffFor4SBs[6 et 34] = 0x003D239B */ 105*df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_3_0 (SINT16)0x005A /* gas32CoeffFor4SBs[3 et 37] = 0x00599403 */ 106*df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_3_1 (SINT16)0x041F /* gas32CoeffFor4SBs[11 et 29] = 0x041EEE40 */ 107*df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_3_2 (SINT16)0x2413 /* gas32CoeffFor4SBs[19 et 21] = 0x2412F251 */ 108*df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_3_3 (SINT16)0x00C9 /* gas32CoeffFor4SBs[13 et 27] = 0x00C8F2BC */ 109*df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_3_4 (SINT16)0x0080 /* gas32CoeffFor4SBs[5 et 35] = 0x007F88E4 */ 110*df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_4_0 (SINT16)0x007E /* gas32CoeffFor4SBs[4 et 36] = 0x007DBCC8 */ 111*df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_4_1 (SINT16)0x0350 /* gas32CoeffFor4SBs[12 et 28] = 0x034FEE2C */ 112*df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_4_2 (SINT16)0x25AC /* gas32CoeffFor4SBs[20] = 25AC1FF2 */ 113*df25739fSMilanka Ringwald 114*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_0_1 (SINT16)0x00B9 /* 16 0x12CF6C75 */ 115*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_0_2 (SINT16)0x08B4 /* 32 0x08B4307A */ 116*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_1_0 (SINT16)0x0005 /* 1 et 79 = 0x00052173 */ 117*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_1_1 (SINT16)0x0107 /* 17 et 63 = 0x01071B96 */ 118*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_1_2 (SINT16)0x0A9F /* 33 et 47 = 0x0A9F3E9A*/ 119*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_1_3 (SINT16)0xF931 /* 31 et 49 = 0xF9312891 */ 120*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_1_4 (SINT16)0xFF8D /* 15 et 65 = 0xFF8D6793 */ 121*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_2_0 (SINT16)0x000B /* 2 et 78 = 0x000B3F71 */ 122*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_2_1 (SINT16)0x0157 /* 18 et 62 = 0x0156B3CA */ 123*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_2_2 (SINT16)0x0C7D /* 34 et 46 = 0x0C7D59B6 */ 124*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_2_3 (SINT16)0xFB00 /* 30 et 50 = 0xFAFF95FC */ 125*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_2_4 (SINT16)0xFFCA /* 14 et 66 = 0xFFC9F10E */ 126*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_3_0 (SINT16)0x0012 /* 3 et 77 = 0x00122C7D*/ 127*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_3_1 (SINT16)0x01A2 /* 19 et 61 = 0x01A1B38B */ 128*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_3_2 (SINT16)0x0E3C /* 35 et 45 = 0x0E3BB16F */ 129*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_3_3 (SINT16)0xFCA8 /* 29 et 51 = 0xFCA86E7E */ 130*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_3_4 (SINT16)0xFFFA /* 13 et 67 = 0xFFFA2413 */ 131*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_4_0 (SINT16)0x001B /* 4 et 66 = 0x001AFF89 */ 132*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_4_1 (SINT16)0x01E0 /* 20 et 60 = 0x01E0224C */ 133*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_4_2 (SINT16)0x0FC7 /* 36 et 44 = 0x0FC721F9 */ 134*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_4_3 (SINT16)0xFE20 /* 28 et 52 = 0xFE20435D */ 135*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_4_4 (SINT16)0x001E /* 12 et 68 = 0x001D8FD2 */ 136*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_5_0 (SINT16)0x0025 /* 5 et 75 = 0x00255A62 */ 137*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_5_1 (SINT16)0x0209 /* 21 et 59 = 0x0209291F */ 138*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_5_2 (SINT16)0x110F /* 37 et 43 = 0x110ECEF0 */ 139*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_5_3 (SINT16)0xFF5F /* 27 et 53 = 0xFF5EEB73 */ 140*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_5_4 (SINT16)0x0035 /* 11 et 69 = 0x0034F8B6 */ 141*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_6_0 (SINT16)0x0030 /* 6 et 74 = 0x003060F4 */ 142*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_6_1 (SINT16)0x0214 /* 22 et 58 = 0x02138653 */ 143*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_6_2 (SINT16)0x1204 /* 38 et 42 = 0x120435FA */ 144*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_6_3 (SINT16)0x0060 /* 26 et 54 = 0x005FD0FF */ 145*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_6_4 (SINT16)0x0041 /* 10 et 70 = 0x00415B75 */ 146*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_7_0 (SINT16)0x003A /* 7 et 73 = 0x003A72E7 */ 147*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_7_1 (SINT16)0x01F6 /* 23 et 57 = 0x01F5F424 */ 148*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_7_2 (SINT16)0x129C /* 39 et 41 = 0x129C226F */ 149*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_7_3 (SINT16)0x0122 /* 25 et 55 = 0x01223EBA */ 150*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_7_4 (SINT16)0x0045 /* 9 et 71 = 0x0044EF48 */ 151*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_8_0 (SINT16)0x0042 /* 8 et 72 = 0x0041EC6A */ 152*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_8_1 (SINT16)0x01A8 /* 24 et 56 = 0x01A7ECEF */ 153*df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_8_2 (SINT16)0x12CF /* 40 = 0x12CF6C75 */ 154*df25739fSMilanka Ringwald #endif 155*df25739fSMilanka Ringwald 156*df25739fSMilanka Ringwald #if (SBC_USE_ARM_PRAGMA==TRUE) 157*df25739fSMilanka Ringwald #pragma arm section zidata = "sbc_s32_analysis_section" 158*df25739fSMilanka Ringwald #endif 159*df25739fSMilanka Ringwald static SINT32 s32DCTY[16] = {0}; 160*df25739fSMilanka Ringwald static SINT32 s32X[ENC_VX_BUFFER_SIZE/2]; 161*df25739fSMilanka Ringwald static SINT16 *s16X=(SINT16*) s32X; /* s16X must be 32 bits aligned cf SHIFTUP_X8_2*/ 162*df25739fSMilanka Ringwald #if (SBC_USE_ARM_PRAGMA==TRUE) 163*df25739fSMilanka Ringwald #pragma arm section zidata 164*df25739fSMilanka Ringwald #endif 165*df25739fSMilanka Ringwald 166*df25739fSMilanka Ringwald /* This macro is for 4 subbands */ 167*df25739fSMilanka Ringwald #define SHIFTUP_X4 \ 168*df25739fSMilanka Ringwald { \ 169*df25739fSMilanka Ringwald ps32X=(SINT32 *)(s16X+EncMaxShiftCounter+38); \ 170*df25739fSMilanka Ringwald for (i=0;i<9;i++) \ 171*df25739fSMilanka Ringwald { \ 172*df25739fSMilanka Ringwald *ps32X=*(ps32X-2-(ShiftCounter>>1)); ps32X--; \ 173*df25739fSMilanka Ringwald *ps32X=*(ps32X-2-(ShiftCounter>>1)); ps32X--; \ 174*df25739fSMilanka Ringwald } \ 175*df25739fSMilanka Ringwald } 176*df25739fSMilanka Ringwald #define SHIFTUP_X4_2 \ 177*df25739fSMilanka Ringwald { \ 178*df25739fSMilanka Ringwald ps32X=(SINT32 *)(s16X+EncMaxShiftCounter+38); \ 179*df25739fSMilanka Ringwald ps32X2=(SINT32 *)(s16X+(EncMaxShiftCounter<<1)+78); \ 180*df25739fSMilanka Ringwald for (i=0;i<9;i++) \ 181*df25739fSMilanka Ringwald { \ 182*df25739fSMilanka Ringwald *ps32X=*(ps32X-2-(ShiftCounter>>1)); *(ps32X2)=*(ps32X2-2-(ShiftCounter>>1)); ps32X--; ps32X2--; \ 183*df25739fSMilanka Ringwald *ps32X=*(ps32X-2-(ShiftCounter>>1)); *(ps32X2)=*(ps32X2-2-(ShiftCounter>>1)); ps32X--; ps32X2--; \ 184*df25739fSMilanka Ringwald } \ 185*df25739fSMilanka Ringwald } 186*df25739fSMilanka Ringwald 187*df25739fSMilanka Ringwald /* This macro is for 8 subbands */ 188*df25739fSMilanka Ringwald #define SHIFTUP_X8 \ 189*df25739fSMilanka Ringwald { \ 190*df25739fSMilanka Ringwald ps32X=(SINT32 *)(s16X+EncMaxShiftCounter+78); \ 191*df25739fSMilanka Ringwald for (i=0;i<9;i++) \ 192*df25739fSMilanka Ringwald { \ 193*df25739fSMilanka Ringwald *ps32X=*(ps32X-4-(ShiftCounter>>1)); ps32X--; \ 194*df25739fSMilanka Ringwald *ps32X=*(ps32X-4-(ShiftCounter>>1)); ps32X--; \ 195*df25739fSMilanka Ringwald *ps32X=*(ps32X-4-(ShiftCounter>>1)); ps32X--; \ 196*df25739fSMilanka Ringwald *ps32X=*(ps32X-4-(ShiftCounter>>1)); ps32X--; \ 197*df25739fSMilanka Ringwald } \ 198*df25739fSMilanka Ringwald } 199*df25739fSMilanka Ringwald #define SHIFTUP_X8_2 \ 200*df25739fSMilanka Ringwald { \ 201*df25739fSMilanka Ringwald ps32X=(SINT32 *)(s16X+EncMaxShiftCounter+78); \ 202*df25739fSMilanka Ringwald ps32X2=(SINT32 *)(s16X+(EncMaxShiftCounter<<1)+158); \ 203*df25739fSMilanka Ringwald for (i=0;i<9;i++) \ 204*df25739fSMilanka Ringwald { \ 205*df25739fSMilanka Ringwald *ps32X=*(ps32X-4-(ShiftCounter>>1)); *(ps32X2)=*(ps32X2-4-(ShiftCounter>>1)); ps32X--; ps32X2--; \ 206*df25739fSMilanka Ringwald *ps32X=*(ps32X-4-(ShiftCounter>>1)); *(ps32X2)=*(ps32X2-4-(ShiftCounter>>1)); ps32X--; ps32X2--; \ 207*df25739fSMilanka Ringwald *ps32X=*(ps32X-4-(ShiftCounter>>1)); *(ps32X2)=*(ps32X2-4-(ShiftCounter>>1)); ps32X--; ps32X2--; \ 208*df25739fSMilanka Ringwald *ps32X=*(ps32X-4-(ShiftCounter>>1)); *(ps32X2)=*(ps32X2-4-(ShiftCounter>>1)); ps32X--; ps32X2--; \ 209*df25739fSMilanka Ringwald } \ 210*df25739fSMilanka Ringwald } 211*df25739fSMilanka Ringwald 212*df25739fSMilanka Ringwald #if (SBC_ARM_ASM_OPT==TRUE) 213*df25739fSMilanka Ringwald #define WINDOW_ACCU_8_0 \ 214*df25739fSMilanka Ringwald {\ 215*df25739fSMilanka Ringwald __asm\ 216*df25739fSMilanka Ringwald {\ 217*df25739fSMilanka Ringwald MUL s32Hi,WIND_8_SUBBANDS_0_1,(s16X[ChOffset+16]-s16X[ChOffset+64]);\ 218*df25739fSMilanka Ringwald MLA s32Hi,WIND_8_SUBBANDS_0_2,(s16X[ChOffset+32]-s16X[ChOffset+48]),s32Hi;\ 219*df25739fSMilanka Ringwald MOV s32DCTY[0],s32Hi;\ 220*df25739fSMilanka Ringwald }\ 221*df25739fSMilanka Ringwald } 222*df25739fSMilanka Ringwald #define WINDOW_ACCU_8_1_15 \ 223*df25739fSMilanka Ringwald {\ 224*df25739fSMilanka Ringwald __asm\ 225*df25739fSMilanka Ringwald {\ 226*df25739fSMilanka Ringwald MUL s32Hi,WIND_8_SUBBANDS_1_0,s16X[ChOffset+1];\ 227*df25739fSMilanka Ringwald MUL s32Hi2,WIND_8_SUBBANDS_1_0,s16X[ChOffset+64+15];\ 228*df25739fSMilanka Ringwald MLA s32Hi,WIND_8_SUBBANDS_1_1,s16X[ChOffset+16+1],s32Hi;\ 229*df25739fSMilanka Ringwald MLA s32Hi2,WIND_8_SUBBANDS_1_1,s16X[ChOffset+48+15],s32Hi2;\ 230*df25739fSMilanka Ringwald MLA s32Hi,WIND_8_SUBBANDS_1_2,s16X[ChOffset+32+1],s32Hi;\ 231*df25739fSMilanka Ringwald MLA s32Hi2,WIND_8_SUBBANDS_1_2,s16X[ChOffset+32+15],s32Hi2;\ 232*df25739fSMilanka Ringwald MLA s32Hi,WIND_8_SUBBANDS_1_3,s16X[ChOffset+48+1],s32Hi;\ 233*df25739fSMilanka Ringwald MLA s32Hi2,WIND_8_SUBBANDS_1_3,s16X[ChOffset+16+15],s32Hi2;\ 234*df25739fSMilanka Ringwald MLA s32Hi,WIND_8_SUBBANDS_1_4,s16X[ChOffset+64+1],s32Hi;\ 235*df25739fSMilanka Ringwald MLA s32Hi2,WIND_8_SUBBANDS_1_4,s16X[ChOffset+15],s32Hi2;\ 236*df25739fSMilanka Ringwald MOV s32DCTY[1],s32Hi;\ 237*df25739fSMilanka Ringwald MOV s32DCTY[15],s32Hi2;\ 238*df25739fSMilanka Ringwald }\ 239*df25739fSMilanka Ringwald } 240*df25739fSMilanka Ringwald #define WINDOW_ACCU_8_2_14 \ 241*df25739fSMilanka Ringwald {\ 242*df25739fSMilanka Ringwald __asm\ 243*df25739fSMilanka Ringwald {\ 244*df25739fSMilanka Ringwald MUL s32Hi,WIND_8_SUBBANDS_2_0,s16X[ChOffset+2];\ 245*df25739fSMilanka Ringwald MUL s32Hi2,WIND_8_SUBBANDS_2_0,s16X[ChOffset+64+14];\ 246*df25739fSMilanka Ringwald MLA s32Hi,WIND_8_SUBBANDS_2_1,s16X[ChOffset+16+2],s32Hi;\ 247*df25739fSMilanka Ringwald MLA s32Hi2,WIND_8_SUBBANDS_2_1,s16X[ChOffset+48+14],s32Hi2;\ 248*df25739fSMilanka Ringwald MLA s32Hi,WIND_8_SUBBANDS_2_2,s16X[ChOffset+32+2],s32Hi;\ 249*df25739fSMilanka Ringwald MLA s32Hi2,WIND_8_SUBBANDS_2_2,s16X[ChOffset+32+14],s32Hi2;\ 250*df25739fSMilanka Ringwald MLA s32Hi,WIND_8_SUBBANDS_2_3,s16X[ChOffset+48+2],s32Hi;\ 251*df25739fSMilanka Ringwald MLA s32Hi2,WIND_8_SUBBANDS_2_3,s16X[ChOffset+16+14],s32Hi2;\ 252*df25739fSMilanka Ringwald MLA s32Hi,WIND_8_SUBBANDS_2_4,s16X[ChOffset+64+2],s32Hi;\ 253*df25739fSMilanka Ringwald MLA s32Hi2,WIND_8_SUBBANDS_2_4,s16X[ChOffset+14],s32Hi2;\ 254*df25739fSMilanka Ringwald MOV s32DCTY[2],s32Hi;\ 255*df25739fSMilanka Ringwald MOV s32DCTY[14],s32Hi2;\ 256*df25739fSMilanka Ringwald }\ 257*df25739fSMilanka Ringwald } 258*df25739fSMilanka Ringwald #define WINDOW_ACCU_8_3_13 \ 259*df25739fSMilanka Ringwald {\ 260*df25739fSMilanka Ringwald __asm\ 261*df25739fSMilanka Ringwald {\ 262*df25739fSMilanka Ringwald MUL s32Hi,WIND_8_SUBBANDS_3_0,s16X[ChOffset+3];\ 263*df25739fSMilanka Ringwald MUL s32Hi2,WIND_8_SUBBANDS_3_0,s16X[ChOffset+64+13];\ 264*df25739fSMilanka Ringwald MLA s32Hi,WIND_8_SUBBANDS_3_1,s16X[ChOffset+16+3],s32Hi;\ 265*df25739fSMilanka Ringwald MLA s32Hi2,WIND_8_SUBBANDS_3_1,s16X[ChOffset+48+13],s32Hi2;\ 266*df25739fSMilanka Ringwald MLA s32Hi,WIND_8_SUBBANDS_3_2,s16X[ChOffset+32+3],s32Hi;\ 267*df25739fSMilanka Ringwald MLA s32Hi2,WIND_8_SUBBANDS_3_2,s16X[ChOffset+32+13],s32Hi2;\ 268*df25739fSMilanka Ringwald MLA s32Hi,WIND_8_SUBBANDS_3_3,s16X[ChOffset+48+3],s32Hi;\ 269*df25739fSMilanka Ringwald MLA s32Hi2,WIND_8_SUBBANDS_3_3,s16X[ChOffset+16+13],s32Hi2;\ 270*df25739fSMilanka Ringwald MLA s32Hi,WIND_8_SUBBANDS_3_4,s16X[ChOffset+64+3],s32Hi;\ 271*df25739fSMilanka Ringwald MLA s32Hi2,WIND_8_SUBBANDS_3_4,s16X[ChOffset+13],s32Hi2;\ 272*df25739fSMilanka Ringwald MOV s32DCTY[3],s32Hi;\ 273*df25739fSMilanka Ringwald MOV s32DCTY[13],s32Hi2;\ 274*df25739fSMilanka Ringwald }\ 275*df25739fSMilanka Ringwald } 276*df25739fSMilanka Ringwald #define WINDOW_ACCU_8_4_12 \ 277*df25739fSMilanka Ringwald {\ 278*df25739fSMilanka Ringwald __asm\ 279*df25739fSMilanka Ringwald {\ 280*df25739fSMilanka Ringwald MUL s32Hi,WIND_8_SUBBANDS_4_0,s16X[ChOffset+4];\ 281*df25739fSMilanka Ringwald MUL s32Hi2,WIND_8_SUBBANDS_4_0,s16X[ChOffset+64+12];\ 282*df25739fSMilanka Ringwald MLA s32Hi,WIND_8_SUBBANDS_4_1,s16X[ChOffset+16+4],s32Hi;\ 283*df25739fSMilanka Ringwald MLA s32Hi2,WIND_8_SUBBANDS_4_1,s16X[ChOffset+48+12],s32Hi2;\ 284*df25739fSMilanka Ringwald MLA s32Hi,WIND_8_SUBBANDS_4_2,s16X[ChOffset+32+4],s32Hi;\ 285*df25739fSMilanka Ringwald MLA s32Hi2,WIND_8_SUBBANDS_4_2,s16X[ChOffset+32+12],s32Hi2;\ 286*df25739fSMilanka Ringwald MLA s32Hi,WIND_8_SUBBANDS_4_3,s16X[ChOffset+48+4],s32Hi;\ 287*df25739fSMilanka Ringwald MLA s32Hi2,WIND_8_SUBBANDS_4_3,s16X[ChOffset+16+12],s32Hi2;\ 288*df25739fSMilanka Ringwald MLA s32Hi,WIND_8_SUBBANDS_4_4,s16X[ChOffset+64+4],s32Hi;\ 289*df25739fSMilanka Ringwald MLA s32Hi2,WIND_8_SUBBANDS_4_4,s16X[ChOffset+12],s32Hi2;\ 290*df25739fSMilanka Ringwald MOV s32DCTY[4],s32Hi;\ 291*df25739fSMilanka Ringwald MOV s32DCTY[12],s32Hi2;\ 292*df25739fSMilanka Ringwald }\ 293*df25739fSMilanka Ringwald } 294*df25739fSMilanka Ringwald #define WINDOW_ACCU_8_5_11 \ 295*df25739fSMilanka Ringwald {\ 296*df25739fSMilanka Ringwald __asm\ 297*df25739fSMilanka Ringwald {\ 298*df25739fSMilanka Ringwald MUL s32Hi,WIND_8_SUBBANDS_5_0,s16X[ChOffset+5];\ 299*df25739fSMilanka Ringwald MUL s32Hi2,WIND_8_SUBBANDS_5_0,s16X[ChOffset+64+11];\ 300*df25739fSMilanka Ringwald MLA s32Hi,WIND_8_SUBBANDS_5_1,s16X[ChOffset+16+5],s32Hi;\ 301*df25739fSMilanka Ringwald MLA s32Hi2,WIND_8_SUBBANDS_5_1,s16X[ChOffset+48+11],s32Hi2;\ 302*df25739fSMilanka Ringwald MLA s32Hi,WIND_8_SUBBANDS_5_2,s16X[ChOffset+32+5],s32Hi;\ 303*df25739fSMilanka Ringwald MLA s32Hi2,WIND_8_SUBBANDS_5_2,s16X[ChOffset+32+11],s32Hi2;\ 304*df25739fSMilanka Ringwald MLA s32Hi,WIND_8_SUBBANDS_5_3,s16X[ChOffset+48+5],s32Hi;\ 305*df25739fSMilanka Ringwald MLA s32Hi2,WIND_8_SUBBANDS_5_3,s16X[ChOffset+16+11],s32Hi2;\ 306*df25739fSMilanka Ringwald MLA s32Hi,WIND_8_SUBBANDS_5_4,s16X[ChOffset+64+5],s32Hi;\ 307*df25739fSMilanka Ringwald MLA s32Hi2,WIND_8_SUBBANDS_5_4,s16X[ChOffset+11],s32Hi2;\ 308*df25739fSMilanka Ringwald MOV s32DCTY[5],s32Hi;\ 309*df25739fSMilanka Ringwald MOV s32DCTY[11],s32Hi2;\ 310*df25739fSMilanka Ringwald }\ 311*df25739fSMilanka Ringwald } 312*df25739fSMilanka Ringwald #define WINDOW_ACCU_8_6_10 \ 313*df25739fSMilanka Ringwald {\ 314*df25739fSMilanka Ringwald __asm\ 315*df25739fSMilanka Ringwald {\ 316*df25739fSMilanka Ringwald MUL s32Hi,WIND_8_SUBBANDS_6_0,s16X[ChOffset+6];\ 317*df25739fSMilanka Ringwald MUL s32Hi2,WIND_8_SUBBANDS_6_0,s16X[ChOffset+64+10];\ 318*df25739fSMilanka Ringwald MLA s32Hi,WIND_8_SUBBANDS_6_1,s16X[ChOffset+16+6],s32Hi;\ 319*df25739fSMilanka Ringwald MLA s32Hi2,WIND_8_SUBBANDS_6_1,s16X[ChOffset+48+10],s32Hi2;\ 320*df25739fSMilanka Ringwald MLA s32Hi,WIND_8_SUBBANDS_6_2,s16X[ChOffset+32+6],s32Hi;\ 321*df25739fSMilanka Ringwald MLA s32Hi2,WIND_8_SUBBANDS_6_2,s16X[ChOffset+32+10],s32Hi2;\ 322*df25739fSMilanka Ringwald MLA s32Hi,WIND_8_SUBBANDS_6_3,s16X[ChOffset+48+6],s32Hi;\ 323*df25739fSMilanka Ringwald MLA s32Hi2,WIND_8_SUBBANDS_6_3,s16X[ChOffset+16+10],s32Hi2;\ 324*df25739fSMilanka Ringwald MLA s32Hi,WIND_8_SUBBANDS_6_4,s16X[ChOffset+64+6],s32Hi;\ 325*df25739fSMilanka Ringwald MLA s32Hi2,WIND_8_SUBBANDS_6_4,s16X[ChOffset+10],s32Hi2;\ 326*df25739fSMilanka Ringwald MOV s32DCTY[6],s32Hi;\ 327*df25739fSMilanka Ringwald MOV s32DCTY[10],s32Hi2;\ 328*df25739fSMilanka Ringwald }\ 329*df25739fSMilanka Ringwald } 330*df25739fSMilanka Ringwald #define WINDOW_ACCU_8_7_9 \ 331*df25739fSMilanka Ringwald {\ 332*df25739fSMilanka Ringwald __asm\ 333*df25739fSMilanka Ringwald {\ 334*df25739fSMilanka Ringwald MUL s32Hi,WIND_8_SUBBANDS_7_0,s16X[ChOffset+7];\ 335*df25739fSMilanka Ringwald MUL s32Hi2,WIND_8_SUBBANDS_7_0,s16X[ChOffset+64+9];\ 336*df25739fSMilanka Ringwald MLA s32Hi,WIND_8_SUBBANDS_7_1,s16X[ChOffset+16+7],s32Hi;\ 337*df25739fSMilanka Ringwald MLA s32Hi2,WIND_8_SUBBANDS_7_1,s16X[ChOffset+48+9],s32Hi2;\ 338*df25739fSMilanka Ringwald MLA s32Hi,WIND_8_SUBBANDS_7_2,s16X[ChOffset+32+7],s32Hi;\ 339*df25739fSMilanka Ringwald MLA s32Hi2,WIND_8_SUBBANDS_7_2,s16X[ChOffset+32+9],s32Hi2;\ 340*df25739fSMilanka Ringwald MLA s32Hi,WIND_8_SUBBANDS_7_3,s16X[ChOffset+48+7],s32Hi;\ 341*df25739fSMilanka Ringwald MLA s32Hi2,WIND_8_SUBBANDS_7_3,s16X[ChOffset+16+9],s32Hi2;\ 342*df25739fSMilanka Ringwald MLA s32Hi,WIND_8_SUBBANDS_7_4,s16X[ChOffset+64+7],s32Hi;\ 343*df25739fSMilanka Ringwald MLA s32Hi2,WIND_8_SUBBANDS_7_4,s16X[ChOffset+9],s32Hi2;\ 344*df25739fSMilanka Ringwald MOV s32DCTY[7],s32Hi;\ 345*df25739fSMilanka Ringwald MOV s32DCTY[9],s32Hi2;\ 346*df25739fSMilanka Ringwald }\ 347*df25739fSMilanka Ringwald } 348*df25739fSMilanka Ringwald #define WINDOW_ACCU_8_8 \ 349*df25739fSMilanka Ringwald {\ 350*df25739fSMilanka Ringwald __asm\ 351*df25739fSMilanka Ringwald {\ 352*df25739fSMilanka Ringwald MUL s32Hi,WIND_8_SUBBANDS_8_0,(s16X[ChOffset+8]+s16X[ChOffset+8+64]);\ 353*df25739fSMilanka Ringwald MLA s32Hi,WIND_8_SUBBANDS_8_1,(s16X[ChOffset+8+16]+s16X[ChOffset+8+64]),s32Hi;\ 354*df25739fSMilanka Ringwald MLA s32Hi,WIND_8_SUBBANDS_8_2,s16X[ChOffset+8+32],s32Hi;\ 355*df25739fSMilanka Ringwald MOV s32DCTY[8],s32Hi;\ 356*df25739fSMilanka Ringwald }\ 357*df25739fSMilanka Ringwald } 358*df25739fSMilanka Ringwald #define WINDOW_ACCU_4_0 \ 359*df25739fSMilanka Ringwald {\ 360*df25739fSMilanka Ringwald __asm\ 361*df25739fSMilanka Ringwald {\ 362*df25739fSMilanka Ringwald MUL s32Hi,WIND_4_SUBBANDS_0_1,(s16X[ChOffset+8]-s16X[ChOffset+32]);\ 363*df25739fSMilanka Ringwald MLA s32Hi,WIND_4_SUBBANDS_0_2,(s16X[ChOffset+16]-s16X[ChOffset+24]),s32Hi;\ 364*df25739fSMilanka Ringwald MOV s32DCTY[0],s32Hi;\ 365*df25739fSMilanka Ringwald }\ 366*df25739fSMilanka Ringwald } 367*df25739fSMilanka Ringwald #define WINDOW_ACCU_4_1_7 \ 368*df25739fSMilanka Ringwald {\ 369*df25739fSMilanka Ringwald __asm\ 370*df25739fSMilanka Ringwald {\ 371*df25739fSMilanka Ringwald MUL s32Hi,WIND_4_SUBBANDS_1_0,s16X[ChOffset+1];\ 372*df25739fSMilanka Ringwald MUL s32Hi2,WIND_4_SUBBANDS_1_0,s16X[ChOffset+32+7];\ 373*df25739fSMilanka Ringwald MLA s32Hi,WIND_4_SUBBANDS_1_1,s16X[ChOffset+8+1],s32Hi;\ 374*df25739fSMilanka Ringwald MLA s32Hi2,WIND_4_SUBBANDS_1_1,s16X[ChOffset+24+7],s32Hi2;\ 375*df25739fSMilanka Ringwald MLA s32Hi,WIND_4_SUBBANDS_1_2,s16X[ChOffset+16+1],s32Hi;\ 376*df25739fSMilanka Ringwald MLA s32Hi2,WIND_4_SUBBANDS_1_2,s16X[ChOffset+16+7],s32Hi2;\ 377*df25739fSMilanka Ringwald MLA s32Hi,WIND_4_SUBBANDS_1_3,s16X[ChOffset+24+1],s32Hi;\ 378*df25739fSMilanka Ringwald MLA s32Hi2,WIND_4_SUBBANDS_1_3,s16X[ChOffset+8+7],s32Hi2;\ 379*df25739fSMilanka Ringwald MLA s32Hi,WIND_4_SUBBANDS_1_4,s16X[ChOffset+32+1],s32Hi;\ 380*df25739fSMilanka Ringwald MLA s32Hi2,WIND_4_SUBBANDS_1_4,s16X[ChOffset+7],s32Hi2;\ 381*df25739fSMilanka Ringwald MOV s32DCTY[1],s32Hi;\ 382*df25739fSMilanka Ringwald MOV s32DCTY[7],s32Hi2;\ 383*df25739fSMilanka Ringwald }\ 384*df25739fSMilanka Ringwald } 385*df25739fSMilanka Ringwald #define WINDOW_ACCU_4_2_6 \ 386*df25739fSMilanka Ringwald {\ 387*df25739fSMilanka Ringwald __asm\ 388*df25739fSMilanka Ringwald {\ 389*df25739fSMilanka Ringwald MUL s32Hi,WIND_4_SUBBANDS_2_0,s16X[ChOffset+2];\ 390*df25739fSMilanka Ringwald MUL s32Hi2,WIND_4_SUBBANDS_2_0,s16X[ChOffset+32+6];\ 391*df25739fSMilanka Ringwald MLA s32Hi,WIND_4_SUBBANDS_2_1,s16X[ChOffset+8+2],s32Hi;\ 392*df25739fSMilanka Ringwald MLA s32Hi2,WIND_4_SUBBANDS_2_1,s16X[ChOffset+24+6],s32Hi2;\ 393*df25739fSMilanka Ringwald MLA s32Hi,WIND_4_SUBBANDS_2_2,s16X[ChOffset+16+2],s32Hi;\ 394*df25739fSMilanka Ringwald MLA s32Hi2,WIND_4_SUBBANDS_2_2,s16X[ChOffset+16+6],s32Hi2;\ 395*df25739fSMilanka Ringwald MLA s32Hi,WIND_4_SUBBANDS_2_3,s16X[ChOffset+24+2],s32Hi;\ 396*df25739fSMilanka Ringwald MLA s32Hi2,WIND_4_SUBBANDS_2_3,s16X[ChOffset+8+6],s32Hi2;\ 397*df25739fSMilanka Ringwald MLA s32Hi,WIND_4_SUBBANDS_2_4,s16X[ChOffset+32+2],s32Hi;\ 398*df25739fSMilanka Ringwald MLA s32Hi2,WIND_4_SUBBANDS_2_4,s16X[ChOffset+6],s32Hi2;\ 399*df25739fSMilanka Ringwald MOV s32DCTY[2],s32Hi;\ 400*df25739fSMilanka Ringwald MOV s32DCTY[6],s32Hi2;\ 401*df25739fSMilanka Ringwald }\ 402*df25739fSMilanka Ringwald } 403*df25739fSMilanka Ringwald #define WINDOW_ACCU_4_3_5 \ 404*df25739fSMilanka Ringwald {\ 405*df25739fSMilanka Ringwald __asm\ 406*df25739fSMilanka Ringwald {\ 407*df25739fSMilanka Ringwald MUL s32Hi,WIND_4_SUBBANDS_3_0,s16X[ChOffset+3];\ 408*df25739fSMilanka Ringwald MUL s32Hi2,WIND_4_SUBBANDS_3_0,s16X[ChOffset+32+5];\ 409*df25739fSMilanka Ringwald MLA s32Hi,WIND_4_SUBBANDS_3_1,s16X[ChOffset+8+3],s32Hi;\ 410*df25739fSMilanka Ringwald MLA s32Hi2,WIND_4_SUBBANDS_3_1,s16X[ChOffset+24+5],s32Hi2;\ 411*df25739fSMilanka Ringwald MLA s32Hi,WIND_4_SUBBANDS_3_2,s16X[ChOffset+16+3],s32Hi;\ 412*df25739fSMilanka Ringwald MLA s32Hi2,WIND_4_SUBBANDS_3_2,s16X[ChOffset+16+5],s32Hi2;\ 413*df25739fSMilanka Ringwald MLA s32Hi,WIND_4_SUBBANDS_3_3,s16X[ChOffset+24+3],s32Hi;\ 414*df25739fSMilanka Ringwald MLA s32Hi2,WIND_4_SUBBANDS_3_3,s16X[ChOffset+8+5],s32Hi2;\ 415*df25739fSMilanka Ringwald MLA s32Hi,WIND_4_SUBBANDS_3_4,s16X[ChOffset+32+3],s32Hi;\ 416*df25739fSMilanka Ringwald MLA s32Hi2,WIND_4_SUBBANDS_3_4,s16X[ChOffset+5],s32Hi2;\ 417*df25739fSMilanka Ringwald MOV s32DCTY[3],s32Hi;\ 418*df25739fSMilanka Ringwald MOV s32DCTY[5],s32Hi2;\ 419*df25739fSMilanka Ringwald }\ 420*df25739fSMilanka Ringwald } 421*df25739fSMilanka Ringwald #define WINDOW_ACCU_4_4 \ 422*df25739fSMilanka Ringwald {\ 423*df25739fSMilanka Ringwald __asm\ 424*df25739fSMilanka Ringwald {\ 425*df25739fSMilanka Ringwald MUL s32Hi,WIND_4_SUBBANDS_4_0,(s16X[ChOffset+4]+s16X[ChOffset+4+32]);\ 426*df25739fSMilanka Ringwald MLA s32Hi,WIND_4_SUBBANDS_4_1,(s16X[ChOffset+4+8]+s16X[ChOffset+4+24]),s32Hi;\ 427*df25739fSMilanka Ringwald MLA s32Hi,WIND_4_SUBBANDS_4_2,s16X[ChOffset+4+16],s32Hi;\ 428*df25739fSMilanka Ringwald MOV s32DCTY[4],s32Hi;\ 429*df25739fSMilanka Ringwald }\ 430*df25739fSMilanka Ringwald } 431*df25739fSMilanka Ringwald 432*df25739fSMilanka Ringwald #define WINDOW_PARTIAL_4 \ 433*df25739fSMilanka Ringwald {\ 434*df25739fSMilanka Ringwald WINDOW_ACCU_4_0; WINDOW_ACCU_4_1_7;\ 435*df25739fSMilanka Ringwald WINDOW_ACCU_4_2_6; WINDOW_ACCU_4_3_5;\ 436*df25739fSMilanka Ringwald WINDOW_ACCU_4_4;\ 437*df25739fSMilanka Ringwald } 438*df25739fSMilanka Ringwald 439*df25739fSMilanka Ringwald #define WINDOW_PARTIAL_8 \ 440*df25739fSMilanka Ringwald {\ 441*df25739fSMilanka Ringwald WINDOW_ACCU_8_0; WINDOW_ACCU_8_1_15;\ 442*df25739fSMilanka Ringwald WINDOW_ACCU_8_2_14; WINDOW_ACCU_8_3_13;\ 443*df25739fSMilanka Ringwald WINDOW_ACCU_8_4_12; WINDOW_ACCU_8_5_11;\ 444*df25739fSMilanka Ringwald WINDOW_ACCU_8_6_10; WINDOW_ACCU_8_7_9;\ 445*df25739fSMilanka Ringwald WINDOW_ACCU_8_8;\ 446*df25739fSMilanka Ringwald } 447*df25739fSMilanka Ringwald 448*df25739fSMilanka Ringwald #else 449*df25739fSMilanka Ringwald #if (SBC_IPAQ_OPT==TRUE) 450*df25739fSMilanka Ringwald 451*df25739fSMilanka Ringwald #if (SBC_IS_64_MULT_IN_WINDOW_ACCU == TRUE) 452*df25739fSMilanka Ringwald #define WINDOW_ACCU_8_0 \ 453*df25739fSMilanka Ringwald {\ 454*df25739fSMilanka Ringwald s64Temp=(SINT64)WIND_8_SUBBANDS_0_1*(SINT64)(s16X[ChOffset+16]-s16X[ChOffset+64]);\ 455*df25739fSMilanka Ringwald s64Temp+=(SINT64)WIND_8_SUBBANDS_0_2*(SINT64)(s16X[ChOffset+32]-s16X[ChOffset+48]);\ 456*df25739fSMilanka Ringwald s32DCTY[0]=(SINT32)(s64Temp>>16);\ 457*df25739fSMilanka Ringwald } 458*df25739fSMilanka Ringwald #define WINDOW_ACCU_8_1_15 \ 459*df25739fSMilanka Ringwald {\ 460*df25739fSMilanka Ringwald s64Temp=(SINT64)WIND_8_SUBBANDS_1_0*(SINT64)s16X[ChOffset+1];\ 461*df25739fSMilanka Ringwald s64Temp2=(SINT64)WIND_8_SUBBANDS_1_0*(SINT64)s16X[ChOffset+64+15];\ 462*df25739fSMilanka Ringwald s64Temp+=(SINT64)WIND_8_SUBBANDS_1_1*(SINT64)s16X[ChOffset+16+1];\ 463*df25739fSMilanka Ringwald s64Temp2+=(SINT64)WIND_8_SUBBANDS_1_1*(SINT64)s16X[ChOffset+48+15];\ 464*df25739fSMilanka Ringwald s64Temp+=(SINT64)WIND_8_SUBBANDS_1_2*(SINT64)s16X[ChOffset+32+1];\ 465*df25739fSMilanka Ringwald s64Temp2+=(SINT64)WIND_8_SUBBANDS_1_2*(SINT64)s16X[ChOffset+32+15];\ 466*df25739fSMilanka Ringwald s64Temp+=(SINT64)WIND_8_SUBBANDS_1_3*(SINT64)s16X[ChOffset+48+1];\ 467*df25739fSMilanka Ringwald s64Temp2+=(SINT64)WIND_8_SUBBANDS_1_3*(SINT64)s16X[ChOffset+16+15];\ 468*df25739fSMilanka Ringwald s64Temp+=(SINT64)WIND_8_SUBBANDS_1_4*(SINT64)s16X[ChOffset+64+1];\ 469*df25739fSMilanka Ringwald s64Temp2+=(SINT64)WIND_8_SUBBANDS_1_4*(SINT64)s16X[ChOffset+15];\ 470*df25739fSMilanka Ringwald s32DCTY[1]=(SINT32)(s64Temp>>16);\ 471*df25739fSMilanka Ringwald s32DCTY[15]=(SINT32)(s64Temp2>>16);\ 472*df25739fSMilanka Ringwald } 473*df25739fSMilanka Ringwald #define WINDOW_ACCU_8_2_14 \ 474*df25739fSMilanka Ringwald {\ 475*df25739fSMilanka Ringwald s64Temp=(SINT64)WIND_8_SUBBANDS_2_0*(SINT64)s16X[ChOffset+2];\ 476*df25739fSMilanka Ringwald s64Temp2=(SINT64)WIND_8_SUBBANDS_2_0*(SINT64)s16X[ChOffset+64+14];\ 477*df25739fSMilanka Ringwald s64Temp+=(SINT64)WIND_8_SUBBANDS_2_1*(SINT64)s16X[ChOffset+16+2];\ 478*df25739fSMilanka Ringwald s64Temp2+=(SINT64)WIND_8_SUBBANDS_2_1*(SINT64)s16X[ChOffset+48+14];\ 479*df25739fSMilanka Ringwald s64Temp+=(SINT64)WIND_8_SUBBANDS_2_2*(SINT64)s16X[ChOffset+32+2];\ 480*df25739fSMilanka Ringwald s64Temp2+=(SINT64)WIND_8_SUBBANDS_2_2*(SINT64)s16X[ChOffset+32+14];\ 481*df25739fSMilanka Ringwald s64Temp+=(SINT64)WIND_8_SUBBANDS_2_3*(SINT64)s16X[ChOffset+48+2];\ 482*df25739fSMilanka Ringwald s64Temp2+=(SINT64)WIND_8_SUBBANDS_2_3*(SINT64)s16X[ChOffset+16+14];\ 483*df25739fSMilanka Ringwald s64Temp+=(SINT64)WIND_8_SUBBANDS_2_4*(SINT64)s16X[ChOffset+64+2];\ 484*df25739fSMilanka Ringwald s64Temp2+=(SINT64)WIND_8_SUBBANDS_2_4*(SINT64)s16X[ChOffset+14];\ 485*df25739fSMilanka Ringwald s32DCTY[2]=(SINT32)(s64Temp>>16);\ 486*df25739fSMilanka Ringwald s32DCTY[14]=(SINT32)(s64Temp2>>16);\ 487*df25739fSMilanka Ringwald } 488*df25739fSMilanka Ringwald #define WINDOW_ACCU_8_3_13 \ 489*df25739fSMilanka Ringwald {\ 490*df25739fSMilanka Ringwald s64Temp=(SINT64)WIND_8_SUBBANDS_3_0*(SINT64)s16X[ChOffset+3];\ 491*df25739fSMilanka Ringwald s64Temp2=(SINT64)WIND_8_SUBBANDS_3_0*(SINT64)s16X[ChOffset+64+13];\ 492*df25739fSMilanka Ringwald s64Temp+=(SINT64)WIND_8_SUBBANDS_3_1*(SINT64)s16X[ChOffset+16+3];\ 493*df25739fSMilanka Ringwald s64Temp2+=(SINT64)WIND_8_SUBBANDS_3_1*(SINT64)s16X[ChOffset+48+13];\ 494*df25739fSMilanka Ringwald s64Temp+=(SINT64)WIND_8_SUBBANDS_3_2*(SINT64)s16X[ChOffset+32+3];\ 495*df25739fSMilanka Ringwald s64Temp2+=(SINT64)WIND_8_SUBBANDS_3_2*(SINT64)s16X[ChOffset+32+13];\ 496*df25739fSMilanka Ringwald s64Temp+=(SINT64)WIND_8_SUBBANDS_3_3*(SINT64)s16X[ChOffset+48+3];\ 497*df25739fSMilanka Ringwald s64Temp2+=(SINT64)WIND_8_SUBBANDS_3_3*(SINT64)s16X[ChOffset+16+13];\ 498*df25739fSMilanka Ringwald s64Temp+=(SINT64)WIND_8_SUBBANDS_3_4*(SINT64)s16X[ChOffset+64+3];\ 499*df25739fSMilanka Ringwald s64Temp2+=(SINT64)WIND_8_SUBBANDS_3_4*(SINT64)s16X[ChOffset+13];\ 500*df25739fSMilanka Ringwald s32DCTY[3]=(SINT32)(s64Temp>>16);\ 501*df25739fSMilanka Ringwald s32DCTY[13]=(SINT32)(s64Temp2>>16);\ 502*df25739fSMilanka Ringwald } 503*df25739fSMilanka Ringwald #define WINDOW_ACCU_8_4_12 \ 504*df25739fSMilanka Ringwald {\ 505*df25739fSMilanka Ringwald s64Temp=(SINT64)WIND_8_SUBBANDS_4_0*(SINT64)s16X[ChOffset+4];\ 506*df25739fSMilanka Ringwald s64Temp2=(SINT64)WIND_8_SUBBANDS_4_0*(SINT64)s16X[ChOffset+64+12];\ 507*df25739fSMilanka Ringwald s64Temp+=(SINT64)WIND_8_SUBBANDS_4_1*(SINT64)s16X[ChOffset+16+4];\ 508*df25739fSMilanka Ringwald s64Temp2+=(SINT64)WIND_8_SUBBANDS_4_1*(SINT64)s16X[ChOffset+48+12];\ 509*df25739fSMilanka Ringwald s64Temp+=(SINT64)WIND_8_SUBBANDS_4_2*(SINT64)s16X[ChOffset+32+4];\ 510*df25739fSMilanka Ringwald s64Temp2+=(SINT64)WIND_8_SUBBANDS_4_2*(SINT64)s16X[ChOffset+32+12];\ 511*df25739fSMilanka Ringwald s64Temp+=(SINT64)WIND_8_SUBBANDS_4_3*(SINT64)s16X[ChOffset+48+4];\ 512*df25739fSMilanka Ringwald s64Temp2+=(SINT64)WIND_8_SUBBANDS_4_3*(SINT64)s16X[ChOffset+16+12];\ 513*df25739fSMilanka Ringwald s64Temp+=(SINT64)WIND_8_SUBBANDS_4_4*(SINT64)s16X[ChOffset+64+4];\ 514*df25739fSMilanka Ringwald s64Temp2+=(SINT64)WIND_8_SUBBANDS_4_4*(SINT64)s16X[ChOffset+12];\ 515*df25739fSMilanka Ringwald s32DCTY[4]=(SINT32)(s64Temp>>16);\ 516*df25739fSMilanka Ringwald s32DCTY[12]=(SINT32)(s64Temp2>>16);\ 517*df25739fSMilanka Ringwald } 518*df25739fSMilanka Ringwald #define WINDOW_ACCU_8_5_11 \ 519*df25739fSMilanka Ringwald {\ 520*df25739fSMilanka Ringwald s64Temp=(SINT64)WIND_8_SUBBANDS_5_0*(SINT64)s16X[ChOffset+5];\ 521*df25739fSMilanka Ringwald s64Temp2=(SINT64)WIND_8_SUBBANDS_5_0*(SINT64)s16X[ChOffset+64+11];\ 522*df25739fSMilanka Ringwald s64Temp+=(SINT64)WIND_8_SUBBANDS_5_1*(SINT64)s16X[ChOffset+16+5];\ 523*df25739fSMilanka Ringwald s64Temp2+=(SINT64)WIND_8_SUBBANDS_5_1*(SINT64)s16X[ChOffset+48+11];\ 524*df25739fSMilanka Ringwald s64Temp+=(SINT64)WIND_8_SUBBANDS_5_2*(SINT64)s16X[ChOffset+32+5];\ 525*df25739fSMilanka Ringwald s64Temp2+=(SINT64)WIND_8_SUBBANDS_5_2*(SINT64)s16X[ChOffset+32+11];\ 526*df25739fSMilanka Ringwald s64Temp+=(SINT64)WIND_8_SUBBANDS_5_3*(SINT64)s16X[ChOffset+48+5];\ 527*df25739fSMilanka Ringwald s64Temp2+=(SINT64)WIND_8_SUBBANDS_5_3*(SINT64)s16X[ChOffset+16+11];\ 528*df25739fSMilanka Ringwald s64Temp+=(SINT64)WIND_8_SUBBANDS_5_4*(SINT64)s16X[ChOffset+64+5];\ 529*df25739fSMilanka Ringwald s64Temp2+=(SINT64)WIND_8_SUBBANDS_5_4*(SINT64)s16X[ChOffset+11];\ 530*df25739fSMilanka Ringwald s32DCTY[5]=(SINT32)(s64Temp>>16);\ 531*df25739fSMilanka Ringwald s32DCTY[11]=(SINT32)(s64Temp2>>16);\ 532*df25739fSMilanka Ringwald } 533*df25739fSMilanka Ringwald #define WINDOW_ACCU_8_6_10 \ 534*df25739fSMilanka Ringwald {\ 535*df25739fSMilanka Ringwald s64Temp=(SINT64)WIND_8_SUBBANDS_6_0*(SINT64)s16X[ChOffset+6];\ 536*df25739fSMilanka Ringwald s64Temp2=(SINT64)WIND_8_SUBBANDS_6_0*(SINT64)s16X[ChOffset+64+10];\ 537*df25739fSMilanka Ringwald s64Temp+=(SINT64)WIND_8_SUBBANDS_6_1*(SINT64)s16X[ChOffset+16+6];\ 538*df25739fSMilanka Ringwald s64Temp2+=(SINT64)WIND_8_SUBBANDS_6_1*(SINT64)s16X[ChOffset+48+10];\ 539*df25739fSMilanka Ringwald s64Temp+=(SINT64)WIND_8_SUBBANDS_6_2*(SINT64)s16X[ChOffset+32+6];\ 540*df25739fSMilanka Ringwald s64Temp2+=(SINT64)WIND_8_SUBBANDS_6_2*(SINT64)s16X[ChOffset+32+10];\ 541*df25739fSMilanka Ringwald s64Temp+=(SINT64)WIND_8_SUBBANDS_6_3*(SINT64)s16X[ChOffset+48+6];\ 542*df25739fSMilanka Ringwald s64Temp2+=(SINT64)WIND_8_SUBBANDS_6_3*(SINT64)s16X[ChOffset+16+10];\ 543*df25739fSMilanka Ringwald s64Temp+=(SINT64)WIND_8_SUBBANDS_6_4*(SINT64)s16X[ChOffset+64+6];\ 544*df25739fSMilanka Ringwald s64Temp2+=(SINT64)WIND_8_SUBBANDS_6_4*(SINT64)s16X[ChOffset+10];\ 545*df25739fSMilanka Ringwald s32DCTY[6]=(SINT32)(s64Temp>>16);\ 546*df25739fSMilanka Ringwald s32DCTY[10]=(SINT32)(s64Temp2>>16);\ 547*df25739fSMilanka Ringwald } 548*df25739fSMilanka Ringwald #define WINDOW_ACCU_8_7_9 \ 549*df25739fSMilanka Ringwald {\ 550*df25739fSMilanka Ringwald s64Temp=(SINT64)WIND_8_SUBBANDS_7_0*(SINT64)s16X[ChOffset+7];\ 551*df25739fSMilanka Ringwald s64Temp2=(SINT64)WIND_8_SUBBANDS_7_0*(SINT64)s16X[ChOffset+64+9];\ 552*df25739fSMilanka Ringwald s64Temp+=(SINT64)WIND_8_SUBBANDS_7_1*(SINT64)s16X[ChOffset+16+7];\ 553*df25739fSMilanka Ringwald s64Temp2+=(SINT64)WIND_8_SUBBANDS_7_1*(SINT64)s16X[ChOffset+48+9];\ 554*df25739fSMilanka Ringwald s64Temp+=(SINT64)WIND_8_SUBBANDS_7_2*(SINT64)s16X[ChOffset+32+7];\ 555*df25739fSMilanka Ringwald s64Temp2+=(SINT64)WIND_8_SUBBANDS_7_2*(SINT64)s16X[ChOffset+32+9];\ 556*df25739fSMilanka Ringwald s64Temp+=(SINT64)WIND_8_SUBBANDS_7_3*(SINT64)s16X[ChOffset+48+7];\ 557*df25739fSMilanka Ringwald s64Temp2+=(SINT64)WIND_8_SUBBANDS_7_3*(SINT64)s16X[ChOffset+16+9];\ 558*df25739fSMilanka Ringwald s64Temp+=(SINT64)WIND_8_SUBBANDS_7_4*(SINT64)s16X[ChOffset+64+7];\ 559*df25739fSMilanka Ringwald s64Temp2+=(SINT64)WIND_8_SUBBANDS_7_4*(SINT64)s16X[ChOffset+9];\ 560*df25739fSMilanka Ringwald s32DCTY[7]=(SINT32)(s64Temp>>16);\ 561*df25739fSMilanka Ringwald s32DCTY[9]=(SINT32)(s64Temp2>>16);\ 562*df25739fSMilanka Ringwald } 563*df25739fSMilanka Ringwald #define WINDOW_ACCU_8_8 \ 564*df25739fSMilanka Ringwald {\ 565*df25739fSMilanka Ringwald s64Temp=(SINT64)WIND_8_SUBBANDS_8_0*(SINT64)(s16X[ChOffset+8]+s16X[ChOffset+64+8]);\ 566*df25739fSMilanka Ringwald s64Temp+=(SINT64)WIND_8_SUBBANDS_8_1*(SINT64)(s16X[ChOffset+16+8]+s16X[ChOffset+48+8]);\ 567*df25739fSMilanka Ringwald s64Temp+=(SINT64)WIND_8_SUBBANDS_8_2*(SINT64)s16X[ChOffset+32+8];\ 568*df25739fSMilanka Ringwald s32DCTY[8]=(SINT32)(s64Temp>>16);\ 569*df25739fSMilanka Ringwald } 570*df25739fSMilanka Ringwald #define WINDOW_ACCU_4_0 \ 571*df25739fSMilanka Ringwald {\ 572*df25739fSMilanka Ringwald s64Temp=(SINT64)WIND_4_SUBBANDS_0_1*(SINT64)(s16X[ChOffset+8]-s16X[ChOffset+32]);\ 573*df25739fSMilanka Ringwald s64Temp+=(SINT64)WIND_4_SUBBANDS_0_2*(SINT64)(s16X[ChOffset+16]-s16X[ChOffset+24]);\ 574*df25739fSMilanka Ringwald s32DCTY[0]=(SINT32)(s64Temp>>16);\ 575*df25739fSMilanka Ringwald } 576*df25739fSMilanka Ringwald #define WINDOW_ACCU_4_1_7 \ 577*df25739fSMilanka Ringwald {\ 578*df25739fSMilanka Ringwald s64Temp=(SINT64)WIND_4_SUBBANDS_1_0*(SINT64)s16X[ChOffset+1];\ 579*df25739fSMilanka Ringwald s64Temp2=(SINT64)WIND_4_SUBBANDS_1_0*(SINT64)s16X[ChOffset+32+7];\ 580*df25739fSMilanka Ringwald s64Temp+=(SINT64)WIND_4_SUBBANDS_1_1*(SINT64)s16X[ChOffset+8+1];\ 581*df25739fSMilanka Ringwald s64Temp2+=(SINT64)WIND_4_SUBBANDS_1_1*(SINT64)s16X[ChOffset+24+7];\ 582*df25739fSMilanka Ringwald s64Temp+=(SINT64)WIND_4_SUBBANDS_1_2*(SINT64)s16X[ChOffset+16+1];\ 583*df25739fSMilanka Ringwald s64Temp2+=(SINT64)WIND_4_SUBBANDS_1_2*(SINT64)s16X[ChOffset+16+7];\ 584*df25739fSMilanka Ringwald s64Temp+=(SINT64)WIND_4_SUBBANDS_1_3*(SINT64)s16X[ChOffset+24+1];\ 585*df25739fSMilanka Ringwald s64Temp2+=(SINT64)WIND_4_SUBBANDS_1_3*(SINT64)s16X[ChOffset+8+7];\ 586*df25739fSMilanka Ringwald s64Temp+=(SINT64)WIND_4_SUBBANDS_1_4*(SINT64)s16X[ChOffset+32+1];\ 587*df25739fSMilanka Ringwald s64Temp2+=(SINT64)WIND_4_SUBBANDS_1_4*(SINT64)s16X[ChOffset+7];\ 588*df25739fSMilanka Ringwald s32DCTY[1]=(SINT32)(s64Temp>>16);\ 589*df25739fSMilanka Ringwald s32DCTY[7]=(SINT32)(s64Temp2>>16);\ 590*df25739fSMilanka Ringwald } 591*df25739fSMilanka Ringwald #define WINDOW_ACCU_4_2_6 \ 592*df25739fSMilanka Ringwald {\ 593*df25739fSMilanka Ringwald s64Temp=(SINT64)WIND_4_SUBBANDS_2_0*(SINT64)s16X[ChOffset+2];\ 594*df25739fSMilanka Ringwald s64Temp2=(SINT64)WIND_4_SUBBANDS_2_0*(SINT64)s16X[ChOffset+32+6];\ 595*df25739fSMilanka Ringwald s64Temp+=(SINT64)WIND_4_SUBBANDS_2_1*(SINT64)s16X[ChOffset+8+2];\ 596*df25739fSMilanka Ringwald s64Temp2+=(SINT64)WIND_4_SUBBANDS_2_1*(SINT64)s16X[ChOffset+24+6];\ 597*df25739fSMilanka Ringwald s64Temp+=(SINT64)WIND_4_SUBBANDS_2_2*(SINT64)s16X[ChOffset+16+2];\ 598*df25739fSMilanka Ringwald s64Temp2+=(SINT64)WIND_4_SUBBANDS_2_2*(SINT64)s16X[ChOffset+16+6];\ 599*df25739fSMilanka Ringwald s64Temp+=(SINT64)WIND_4_SUBBANDS_2_3*(SINT64)s16X[ChOffset+24+2];\ 600*df25739fSMilanka Ringwald s64Temp2+=(SINT64)WIND_4_SUBBANDS_2_3*(SINT64)s16X[ChOffset+8+6];\ 601*df25739fSMilanka Ringwald s64Temp+=(SINT64)WIND_4_SUBBANDS_2_4*(SINT64)s16X[ChOffset+32+2];\ 602*df25739fSMilanka Ringwald s64Temp2+=(SINT64)WIND_4_SUBBANDS_2_4*(SINT64)s16X[ChOffset+6];\ 603*df25739fSMilanka Ringwald s32DCTY[2]=(SINT32)(s64Temp>>16);\ 604*df25739fSMilanka Ringwald s32DCTY[6]=(SINT32)(s64Temp2>>16);\ 605*df25739fSMilanka Ringwald } 606*df25739fSMilanka Ringwald #define WINDOW_ACCU_4_3_5 \ 607*df25739fSMilanka Ringwald {\ 608*df25739fSMilanka Ringwald s64Temp=(SINT64)WIND_4_SUBBANDS_3_0*(SINT64)s16X[ChOffset+3];\ 609*df25739fSMilanka Ringwald s64Temp2=(SINT64)WIND_4_SUBBANDS_3_0*(SINT64)s16X[ChOffset+32+5];\ 610*df25739fSMilanka Ringwald s64Temp+=(SINT64)WIND_4_SUBBANDS_3_1*(SINT64)s16X[ChOffset+8+3];\ 611*df25739fSMilanka Ringwald s64Temp2+=(SINT64)WIND_4_SUBBANDS_3_1*(SINT64)s16X[ChOffset+24+5];\ 612*df25739fSMilanka Ringwald s64Temp+=(SINT64)WIND_4_SUBBANDS_3_2*(SINT64)s16X[ChOffset+16+3];\ 613*df25739fSMilanka Ringwald s64Temp2+=(SINT64)WIND_4_SUBBANDS_3_2*(SINT64)s16X[ChOffset+16+5];\ 614*df25739fSMilanka Ringwald s64Temp+=(SINT64)WIND_4_SUBBANDS_3_3*(SINT64)s16X[ChOffset+24+3];\ 615*df25739fSMilanka Ringwald s64Temp2+=(SINT64)WIND_4_SUBBANDS_3_3*(SINT64)s16X[ChOffset+8+5];\ 616*df25739fSMilanka Ringwald s64Temp+=(SINT64)WIND_4_SUBBANDS_3_4*(SINT64)s16X[ChOffset+32+3];\ 617*df25739fSMilanka Ringwald s64Temp2+=(SINT64)WIND_4_SUBBANDS_3_4*(SINT64)s16X[ChOffset+5];\ 618*df25739fSMilanka Ringwald s32DCTY[3]=(SINT32)(s64Temp>>16);\ 619*df25739fSMilanka Ringwald s32DCTY[5]=(SINT32)(s64Temp2>>16);\ 620*df25739fSMilanka Ringwald } 621*df25739fSMilanka Ringwald 622*df25739fSMilanka Ringwald #define WINDOW_ACCU_4_4 \ 623*df25739fSMilanka Ringwald {\ 624*df25739fSMilanka Ringwald s64Temp=(SINT64)WIND_4_SUBBANDS_4_0*(SINT64)(s16X[ChOffset+4]+s16X[ChOffset+4+32]);\ 625*df25739fSMilanka Ringwald s64Temp+=(SINT64)WIND_4_SUBBANDS_4_1*(SINT64)(s16X[ChOffset+4+8]+s16X[ChOffset+4+24]);\ 626*df25739fSMilanka Ringwald s64Temp+=(SINT64)WIND_4_SUBBANDS_4_2*(SINT64)s16X[ChOffset+4+16];\ 627*df25739fSMilanka Ringwald s32DCTY[4]=(SINT32)(s64Temp>>16);\ 628*df25739fSMilanka Ringwald } 629*df25739fSMilanka Ringwald #else /* SBC_IS_64_MULT_IN_WINDOW_ACCU == FALSE */ 630*df25739fSMilanka Ringwald #define WINDOW_ACCU_8_0 \ 631*df25739fSMilanka Ringwald {\ 632*df25739fSMilanka Ringwald s32Temp=(SINT32)WIND_8_SUBBANDS_0_1*(SINT32)(s16X[ChOffset+16]-s16X[ChOffset+64]);\ 633*df25739fSMilanka Ringwald s32Temp+=(SINT32)WIND_8_SUBBANDS_0_2*(SINT32)(s16X[ChOffset+32]-s16X[ChOffset+48]);\ 634*df25739fSMilanka Ringwald s32DCTY[0]=(SINT32)s32Temp;\ 635*df25739fSMilanka Ringwald } 636*df25739fSMilanka Ringwald #define WINDOW_ACCU_8_1_15 \ 637*df25739fSMilanka Ringwald {\ 638*df25739fSMilanka Ringwald s32Temp=(SINT32)WIND_8_SUBBANDS_1_0*(SINT32)s16X[ChOffset+1];\ 639*df25739fSMilanka Ringwald s32Temp2=(SINT32)WIND_8_SUBBANDS_1_0*(SINT32)s16X[ChOffset+64+15];\ 640*df25739fSMilanka Ringwald s32Temp+=(SINT32)WIND_8_SUBBANDS_1_1*(SINT32)s16X[ChOffset+16+1];\ 641*df25739fSMilanka Ringwald s32Temp2+=(SINT32)WIND_8_SUBBANDS_1_1*(SINT32)s16X[ChOffset+48+15];\ 642*df25739fSMilanka Ringwald s32Temp+=(SINT32)WIND_8_SUBBANDS_1_2*(SINT32)s16X[ChOffset+32+1];\ 643*df25739fSMilanka Ringwald s32Temp2+=(SINT32)WIND_8_SUBBANDS_1_2*(SINT32)s16X[ChOffset+32+15];\ 644*df25739fSMilanka Ringwald s32Temp+=(SINT32)WIND_8_SUBBANDS_1_3*(SINT32)s16X[ChOffset+48+1];\ 645*df25739fSMilanka Ringwald s32Temp2+=(SINT32)WIND_8_SUBBANDS_1_3*(SINT32)s16X[ChOffset+16+15];\ 646*df25739fSMilanka Ringwald s32Temp+=(SINT32)WIND_8_SUBBANDS_1_4*(SINT32)s16X[ChOffset+64+1];\ 647*df25739fSMilanka Ringwald s32Temp2+=(SINT32)WIND_8_SUBBANDS_1_4*(SINT32)s16X[ChOffset+15];\ 648*df25739fSMilanka Ringwald s32DCTY[1]=(SINT32)s32Temp;\ 649*df25739fSMilanka Ringwald s32DCTY[15]=(SINT32)s32Temp2;\ 650*df25739fSMilanka Ringwald } 651*df25739fSMilanka Ringwald #define WINDOW_ACCU_8_2_14 \ 652*df25739fSMilanka Ringwald {\ 653*df25739fSMilanka Ringwald s32Temp=(SINT32)WIND_8_SUBBANDS_2_0*(SINT32)s16X[ChOffset+2];\ 654*df25739fSMilanka Ringwald s32Temp2=(SINT32)WIND_8_SUBBANDS_2_0*(SINT32)s16X[ChOffset+64+14];\ 655*df25739fSMilanka Ringwald s32Temp+=(SINT32)WIND_8_SUBBANDS_2_1*(SINT32)s16X[ChOffset+16+2];\ 656*df25739fSMilanka Ringwald s32Temp2+=(SINT32)WIND_8_SUBBANDS_2_1*(SINT32)s16X[ChOffset+48+14];\ 657*df25739fSMilanka Ringwald s32Temp+=(SINT32)WIND_8_SUBBANDS_2_2*(SINT32)s16X[ChOffset+32+2];\ 658*df25739fSMilanka Ringwald s32Temp2+=(SINT32)WIND_8_SUBBANDS_2_2*(SINT32)s16X[ChOffset+32+14];\ 659*df25739fSMilanka Ringwald s32Temp+=(SINT32)WIND_8_SUBBANDS_2_3*(SINT32)s16X[ChOffset+48+2];\ 660*df25739fSMilanka Ringwald s32Temp2+=(SINT32)WIND_8_SUBBANDS_2_3*(SINT32)s16X[ChOffset+16+14];\ 661*df25739fSMilanka Ringwald s32Temp+=(SINT32)WIND_8_SUBBANDS_2_4*(SINT32)s16X[ChOffset+64+2];\ 662*df25739fSMilanka Ringwald s32Temp2+=(SINT32)WIND_8_SUBBANDS_2_4*(SINT32)s16X[ChOffset+14];\ 663*df25739fSMilanka Ringwald s32DCTY[2]=(SINT32)s32Temp;\ 664*df25739fSMilanka Ringwald s32DCTY[14]=(SINT32)s32Temp2;\ 665*df25739fSMilanka Ringwald } 666*df25739fSMilanka Ringwald #define WINDOW_ACCU_8_3_13 \ 667*df25739fSMilanka Ringwald {\ 668*df25739fSMilanka Ringwald s32Temp=(SINT32)WIND_8_SUBBANDS_3_0*(SINT32)s16X[ChOffset+3];\ 669*df25739fSMilanka Ringwald s32Temp2=(SINT32)WIND_8_SUBBANDS_3_0*(SINT32)s16X[ChOffset+64+13];\ 670*df25739fSMilanka Ringwald s32Temp+=(SINT32)WIND_8_SUBBANDS_3_1*(SINT32)s16X[ChOffset+16+3];\ 671*df25739fSMilanka Ringwald s32Temp2+=(SINT32)WIND_8_SUBBANDS_3_1*(SINT32)s16X[ChOffset+48+13];\ 672*df25739fSMilanka Ringwald s32Temp+=(SINT32)WIND_8_SUBBANDS_3_2*(SINT32)s16X[ChOffset+32+3];\ 673*df25739fSMilanka Ringwald s32Temp2+=(SINT32)WIND_8_SUBBANDS_3_2*(SINT32)s16X[ChOffset+32+13];\ 674*df25739fSMilanka Ringwald s32Temp+=(SINT32)WIND_8_SUBBANDS_3_3*(SINT32)s16X[ChOffset+48+3];\ 675*df25739fSMilanka Ringwald s32Temp2+=(SINT32)WIND_8_SUBBANDS_3_3*(SINT32)s16X[ChOffset+16+13];\ 676*df25739fSMilanka Ringwald s32Temp+=(SINT32)WIND_8_SUBBANDS_3_4*(SINT32)s16X[ChOffset+64+3];\ 677*df25739fSMilanka Ringwald s32Temp2+=(SINT32)WIND_8_SUBBANDS_3_4*(SINT32)s16X[ChOffset+13];\ 678*df25739fSMilanka Ringwald s32DCTY[3]=(SINT32)s32Temp;\ 679*df25739fSMilanka Ringwald s32DCTY[13]=(SINT32)s32Temp2;\ 680*df25739fSMilanka Ringwald } 681*df25739fSMilanka Ringwald #define WINDOW_ACCU_8_4_12 \ 682*df25739fSMilanka Ringwald {\ 683*df25739fSMilanka Ringwald s32Temp=(SINT32)WIND_8_SUBBANDS_4_0*(SINT32)s16X[ChOffset+4];\ 684*df25739fSMilanka Ringwald s32Temp2=(SINT32)WIND_8_SUBBANDS_4_0*(SINT32)s16X[ChOffset+64+12];\ 685*df25739fSMilanka Ringwald s32Temp+=(SINT32)WIND_8_SUBBANDS_4_1*(SINT32)s16X[ChOffset+16+4];\ 686*df25739fSMilanka Ringwald s32Temp2+=(SINT32)WIND_8_SUBBANDS_4_1*(SINT32)s16X[ChOffset+48+12];\ 687*df25739fSMilanka Ringwald s32Temp+=(SINT32)WIND_8_SUBBANDS_4_2*(SINT32)s16X[ChOffset+32+4];\ 688*df25739fSMilanka Ringwald s32Temp2+=(SINT32)WIND_8_SUBBANDS_4_2*(SINT32)s16X[ChOffset+32+12];\ 689*df25739fSMilanka Ringwald s32Temp+=(SINT32)WIND_8_SUBBANDS_4_3*(SINT32)s16X[ChOffset+48+4];\ 690*df25739fSMilanka Ringwald s32Temp2+=(SINT32)WIND_8_SUBBANDS_4_3*(SINT32)s16X[ChOffset+16+12];\ 691*df25739fSMilanka Ringwald s32Temp+=(SINT32)WIND_8_SUBBANDS_4_4*(SINT32)s16X[ChOffset+64+4];\ 692*df25739fSMilanka Ringwald s32Temp2+=(SINT32)WIND_8_SUBBANDS_4_4*(SINT32)s16X[ChOffset+12];\ 693*df25739fSMilanka Ringwald s32DCTY[4]=(SINT32)s32Temp;\ 694*df25739fSMilanka Ringwald s32DCTY[12]=(SINT32)s32Temp2;\ 695*df25739fSMilanka Ringwald } 696*df25739fSMilanka Ringwald #define WINDOW_ACCU_8_5_11 \ 697*df25739fSMilanka Ringwald {\ 698*df25739fSMilanka Ringwald s32Temp=(SINT32)WIND_8_SUBBANDS_5_0*(SINT32)s16X[ChOffset+5];\ 699*df25739fSMilanka Ringwald s32Temp2=(SINT32)WIND_8_SUBBANDS_5_0*(SINT32)s16X[ChOffset+64+11];\ 700*df25739fSMilanka Ringwald s32Temp+=(SINT32)WIND_8_SUBBANDS_5_1*(SINT32)s16X[ChOffset+16+5];\ 701*df25739fSMilanka Ringwald s32Temp2+=(SINT32)WIND_8_SUBBANDS_5_1*(SINT32)s16X[ChOffset+48+11];\ 702*df25739fSMilanka Ringwald s32Temp+=(SINT32)WIND_8_SUBBANDS_5_2*(SINT32)s16X[ChOffset+32+5];\ 703*df25739fSMilanka Ringwald s32Temp2+=(SINT32)WIND_8_SUBBANDS_5_2*(SINT32)s16X[ChOffset+32+11];\ 704*df25739fSMilanka Ringwald s32Temp+=(SINT32)WIND_8_SUBBANDS_5_3*(SINT32)s16X[ChOffset+48+5];\ 705*df25739fSMilanka Ringwald s32Temp2+=(SINT32)WIND_8_SUBBANDS_5_3*(SINT32)s16X[ChOffset+16+11];\ 706*df25739fSMilanka Ringwald s32Temp+=(SINT32)WIND_8_SUBBANDS_5_4*(SINT32)s16X[ChOffset+64+5];\ 707*df25739fSMilanka Ringwald s32Temp2+=(SINT32)WIND_8_SUBBANDS_5_4*(SINT32)s16X[ChOffset+11];\ 708*df25739fSMilanka Ringwald s32DCTY[5]=(SINT32)s32Temp;\ 709*df25739fSMilanka Ringwald s32DCTY[11]=(SINT32)s32Temp2;\ 710*df25739fSMilanka Ringwald } 711*df25739fSMilanka Ringwald #define WINDOW_ACCU_8_6_10 \ 712*df25739fSMilanka Ringwald {\ 713*df25739fSMilanka Ringwald s32Temp=(SINT32)WIND_8_SUBBANDS_6_0*(SINT32)s16X[ChOffset+6];\ 714*df25739fSMilanka Ringwald s32Temp2=(SINT32)WIND_8_SUBBANDS_6_0*(SINT32)s16X[ChOffset+64+10];\ 715*df25739fSMilanka Ringwald s32Temp+=(SINT32)WIND_8_SUBBANDS_6_1*(SINT32)s16X[ChOffset+16+6];\ 716*df25739fSMilanka Ringwald s32Temp2+=(SINT32)WIND_8_SUBBANDS_6_1*(SINT32)s16X[ChOffset+48+10];\ 717*df25739fSMilanka Ringwald s32Temp+=(SINT32)WIND_8_SUBBANDS_6_2*(SINT32)s16X[ChOffset+32+6];\ 718*df25739fSMilanka Ringwald s32Temp2+=(SINT32)WIND_8_SUBBANDS_6_2*(SINT32)s16X[ChOffset+32+10];\ 719*df25739fSMilanka Ringwald s32Temp+=(SINT32)WIND_8_SUBBANDS_6_3*(SINT32)s16X[ChOffset+48+6];\ 720*df25739fSMilanka Ringwald s32Temp2+=(SINT32)WIND_8_SUBBANDS_6_3*(SINT32)s16X[ChOffset+16+10];\ 721*df25739fSMilanka Ringwald s32Temp+=(SINT32)WIND_8_SUBBANDS_6_4*(SINT32)s16X[ChOffset+64+6];\ 722*df25739fSMilanka Ringwald s32Temp2+=(SINT32)WIND_8_SUBBANDS_6_4*(SINT32)s16X[ChOffset+10];\ 723*df25739fSMilanka Ringwald s32DCTY[6]=(SINT32)s32Temp;\ 724*df25739fSMilanka Ringwald s32DCTY[10]=(SINT32)s32Temp2;\ 725*df25739fSMilanka Ringwald } 726*df25739fSMilanka Ringwald #define WINDOW_ACCU_8_7_9 \ 727*df25739fSMilanka Ringwald {\ 728*df25739fSMilanka Ringwald s32Temp=(SINT32)WIND_8_SUBBANDS_7_0*(SINT32)s16X[ChOffset+7];\ 729*df25739fSMilanka Ringwald s32Temp2=(SINT32)WIND_8_SUBBANDS_7_0*(SINT32)s16X[ChOffset+64+9];\ 730*df25739fSMilanka Ringwald s32Temp+=(SINT32)WIND_8_SUBBANDS_7_1*(SINT32)s16X[ChOffset+16+7];\ 731*df25739fSMilanka Ringwald s32Temp2+=(SINT32)WIND_8_SUBBANDS_7_1*(SINT32)s16X[ChOffset+48+9];\ 732*df25739fSMilanka Ringwald s32Temp+=(SINT32)WIND_8_SUBBANDS_7_2*(SINT32)s16X[ChOffset+32+7];\ 733*df25739fSMilanka Ringwald s32Temp2+=(SINT32)WIND_8_SUBBANDS_7_2*(SINT32)s16X[ChOffset+32+9];\ 734*df25739fSMilanka Ringwald s32Temp+=(SINT32)WIND_8_SUBBANDS_7_3*(SINT32)s16X[ChOffset+48+7];\ 735*df25739fSMilanka Ringwald s32Temp2+=(SINT32)WIND_8_SUBBANDS_7_3*(SINT32)s16X[ChOffset+16+9];\ 736*df25739fSMilanka Ringwald s32Temp+=(SINT32)WIND_8_SUBBANDS_7_4*(SINT32)s16X[ChOffset+64+7];\ 737*df25739fSMilanka Ringwald s32Temp2+=(SINT32)WIND_8_SUBBANDS_7_4*(SINT32)s16X[ChOffset+9];\ 738*df25739fSMilanka Ringwald s32DCTY[7]=(SINT32)s32Temp;\ 739*df25739fSMilanka Ringwald s32DCTY[9]=(SINT32)s32Temp2;\ 740*df25739fSMilanka Ringwald } 741*df25739fSMilanka Ringwald #define WINDOW_ACCU_8_8 \ 742*df25739fSMilanka Ringwald {\ 743*df25739fSMilanka Ringwald s32Temp=(SINT32)WIND_8_SUBBANDS_8_0*(SINT32)(s16X[ChOffset+8]+s16X[ChOffset+64+8]);\ 744*df25739fSMilanka Ringwald s32Temp+=(SINT32)WIND_8_SUBBANDS_8_1*(SINT32)(s16X[ChOffset+16+8]+s16X[ChOffset+48+8]);\ 745*df25739fSMilanka Ringwald s32Temp+=(SINT32)WIND_8_SUBBANDS_8_2*(SINT32)s16X[ChOffset+32+8];\ 746*df25739fSMilanka Ringwald s32DCTY[8]=(SINT32)s32Temp;\ 747*df25739fSMilanka Ringwald } 748*df25739fSMilanka Ringwald #define WINDOW_ACCU_4_0 \ 749*df25739fSMilanka Ringwald {\ 750*df25739fSMilanka Ringwald s32Temp=(SINT32)WIND_4_SUBBANDS_0_1*(SINT32)(s16X[ChOffset+8]-s16X[ChOffset+32]);\ 751*df25739fSMilanka Ringwald s32Temp+=(SINT32)WIND_4_SUBBANDS_0_2*(SINT32)(s16X[ChOffset+16]-s16X[ChOffset+24]);\ 752*df25739fSMilanka Ringwald s32DCTY[0]=(SINT32)(s32Temp);\ 753*df25739fSMilanka Ringwald } 754*df25739fSMilanka Ringwald #define WINDOW_ACCU_4_1_7 \ 755*df25739fSMilanka Ringwald {\ 756*df25739fSMilanka Ringwald s32Temp=(SINT32)WIND_4_SUBBANDS_1_0*(SINT32)s16X[ChOffset+1];\ 757*df25739fSMilanka Ringwald s32Temp2=(SINT32)WIND_4_SUBBANDS_1_0*(SINT32)s16X[ChOffset+32+7];\ 758*df25739fSMilanka Ringwald s32Temp+=(SINT32)WIND_4_SUBBANDS_1_1*(SINT32)s16X[ChOffset+8+1];\ 759*df25739fSMilanka Ringwald s32Temp2+=(SINT32)WIND_4_SUBBANDS_1_1*(SINT32)s16X[ChOffset+24+7];\ 760*df25739fSMilanka Ringwald s32Temp+=(SINT32)WIND_4_SUBBANDS_1_2*(SINT32)s16X[ChOffset+16+1];\ 761*df25739fSMilanka Ringwald s32Temp2+=(SINT32)WIND_4_SUBBANDS_1_2*(SINT32)s16X[ChOffset+16+7];\ 762*df25739fSMilanka Ringwald s32Temp+=(SINT32)WIND_4_SUBBANDS_1_3*(SINT32)s16X[ChOffset+24+1];\ 763*df25739fSMilanka Ringwald s32Temp2+=(SINT32)WIND_4_SUBBANDS_1_3*(SINT32)s16X[ChOffset+8+7];\ 764*df25739fSMilanka Ringwald s32Temp+=(SINT32)WIND_4_SUBBANDS_1_4*(SINT32)s16X[ChOffset+32+1];\ 765*df25739fSMilanka Ringwald s32Temp2+=(SINT32)WIND_4_SUBBANDS_1_4*(SINT32)s16X[ChOffset+7];\ 766*df25739fSMilanka Ringwald s32DCTY[1]=(SINT32)(s32Temp);\ 767*df25739fSMilanka Ringwald s32DCTY[7]=(SINT32)(s32Temp2);\ 768*df25739fSMilanka Ringwald } 769*df25739fSMilanka Ringwald #define WINDOW_ACCU_4_2_6 \ 770*df25739fSMilanka Ringwald {\ 771*df25739fSMilanka Ringwald s32Temp=(SINT32)WIND_4_SUBBANDS_2_0*(SINT32)s16X[ChOffset+2];\ 772*df25739fSMilanka Ringwald s32Temp2=(SINT32)WIND_4_SUBBANDS_2_0*(SINT32)s16X[ChOffset+32+6];\ 773*df25739fSMilanka Ringwald s32Temp+=(SINT32)WIND_4_SUBBANDS_2_1*(SINT32)s16X[ChOffset+8+2];\ 774*df25739fSMilanka Ringwald s32Temp2+=(SINT32)WIND_4_SUBBANDS_2_1*(SINT32)s16X[ChOffset+24+6];\ 775*df25739fSMilanka Ringwald s32Temp+=(SINT32)WIND_4_SUBBANDS_2_2*(SINT32)s16X[ChOffset+16+2];\ 776*df25739fSMilanka Ringwald s32Temp2+=(SINT32)WIND_4_SUBBANDS_2_2*(SINT32)s16X[ChOffset+16+6];\ 777*df25739fSMilanka Ringwald s32Temp+=(SINT32)WIND_4_SUBBANDS_2_3*(SINT32)s16X[ChOffset+24+2];\ 778*df25739fSMilanka Ringwald s32Temp2+=(SINT32)WIND_4_SUBBANDS_2_3*(SINT32)s16X[ChOffset+8+6];\ 779*df25739fSMilanka Ringwald s32Temp+=(SINT32)WIND_4_SUBBANDS_2_4*(SINT32)s16X[ChOffset+32+2];\ 780*df25739fSMilanka Ringwald s32Temp2+=(SINT32)WIND_4_SUBBANDS_2_4*(SINT32)s16X[ChOffset+6];\ 781*df25739fSMilanka Ringwald s32DCTY[2]=(SINT32)(s32Temp);\ 782*df25739fSMilanka Ringwald s32DCTY[6]=(SINT32)(s32Temp2);\ 783*df25739fSMilanka Ringwald } 784*df25739fSMilanka Ringwald #define WINDOW_ACCU_4_3_5 \ 785*df25739fSMilanka Ringwald {\ 786*df25739fSMilanka Ringwald s32Temp=(SINT32)WIND_4_SUBBANDS_3_0*(SINT32)s16X[ChOffset+3];\ 787*df25739fSMilanka Ringwald s32Temp2=(SINT32)WIND_4_SUBBANDS_3_0*(SINT32)s16X[ChOffset+32+5];\ 788*df25739fSMilanka Ringwald s32Temp+=(SINT32)WIND_4_SUBBANDS_3_1*(SINT32)s16X[ChOffset+8+3];\ 789*df25739fSMilanka Ringwald s32Temp2+=(SINT32)WIND_4_SUBBANDS_3_1*(SINT32)s16X[ChOffset+24+5];\ 790*df25739fSMilanka Ringwald s32Temp+=(SINT32)WIND_4_SUBBANDS_3_2*(SINT32)s16X[ChOffset+16+3];\ 791*df25739fSMilanka Ringwald s32Temp2+=(SINT32)WIND_4_SUBBANDS_3_2*(SINT32)s16X[ChOffset+16+5];\ 792*df25739fSMilanka Ringwald s32Temp+=(SINT32)WIND_4_SUBBANDS_3_3*(SINT32)s16X[ChOffset+24+3];\ 793*df25739fSMilanka Ringwald s32Temp2+=(SINT32)WIND_4_SUBBANDS_3_3*(SINT32)s16X[ChOffset+8+5];\ 794*df25739fSMilanka Ringwald s32Temp+=(SINT32)WIND_4_SUBBANDS_3_4*(SINT32)s16X[ChOffset+32+3];\ 795*df25739fSMilanka Ringwald s32Temp2+=(SINT32)WIND_4_SUBBANDS_3_4*(SINT32)s16X[ChOffset+5];\ 796*df25739fSMilanka Ringwald s32DCTY[3]=(SINT32)(s32Temp);\ 797*df25739fSMilanka Ringwald s32DCTY[5]=(SINT32)(s32Temp2);\ 798*df25739fSMilanka Ringwald } 799*df25739fSMilanka Ringwald 800*df25739fSMilanka Ringwald #define WINDOW_ACCU_4_4 \ 801*df25739fSMilanka Ringwald {\ 802*df25739fSMilanka Ringwald s32Temp=(SINT32)WIND_4_SUBBANDS_4_0*(SINT32)(s16X[ChOffset+4]+s16X[ChOffset+4+32]);\ 803*df25739fSMilanka Ringwald s32Temp+=(SINT32)WIND_4_SUBBANDS_4_1*(SINT32)(s16X[ChOffset+4+8]+s16X[ChOffset+4+24]);\ 804*df25739fSMilanka Ringwald s32Temp+=(SINT32)WIND_4_SUBBANDS_4_2*(SINT32)s16X[ChOffset+4+16];\ 805*df25739fSMilanka Ringwald s32DCTY[4]=(SINT32)(s32Temp);\ 806*df25739fSMilanka Ringwald } 807*df25739fSMilanka Ringwald #endif 808*df25739fSMilanka Ringwald #define WINDOW_PARTIAL_4 \ 809*df25739fSMilanka Ringwald {\ 810*df25739fSMilanka Ringwald WINDOW_ACCU_4_0; WINDOW_ACCU_4_1_7;\ 811*df25739fSMilanka Ringwald WINDOW_ACCU_4_2_6; WINDOW_ACCU_4_3_5;\ 812*df25739fSMilanka Ringwald WINDOW_ACCU_4_4;\ 813*df25739fSMilanka Ringwald } 814*df25739fSMilanka Ringwald 815*df25739fSMilanka Ringwald #define WINDOW_PARTIAL_8 \ 816*df25739fSMilanka Ringwald {\ 817*df25739fSMilanka Ringwald WINDOW_ACCU_8_0; WINDOW_ACCU_8_1_15;\ 818*df25739fSMilanka Ringwald WINDOW_ACCU_8_2_14; WINDOW_ACCU_8_3_13;\ 819*df25739fSMilanka Ringwald WINDOW_ACCU_8_4_12; WINDOW_ACCU_8_5_11;\ 820*df25739fSMilanka Ringwald WINDOW_ACCU_8_6_10; WINDOW_ACCU_8_7_9;\ 821*df25739fSMilanka Ringwald WINDOW_ACCU_8_8;\ 822*df25739fSMilanka Ringwald } 823*df25739fSMilanka Ringwald #else 824*df25739fSMilanka Ringwald #if (SBC_IS_64_MULT_IN_WINDOW_ACCU == TRUE) 825*df25739fSMilanka Ringwald #define WINDOW_ACCU_4(i) \ 826*df25739fSMilanka Ringwald {\ 827*df25739fSMilanka Ringwald s64Temp=((SINT64)gas32CoeffFor4SBs[i] * (SINT64)s16X[ChOffset+i]); \ 828*df25739fSMilanka Ringwald s64Temp+=((SINT64)gas32CoeffFor4SBs[(i+8)] * (SINT64)s16X[ChOffset+i+8]); \ 829*df25739fSMilanka Ringwald s64Temp+=((SINT64)gas32CoeffFor4SBs[(i+16)] * (SINT64)s16X[ChOffset+i+16]); \ 830*df25739fSMilanka Ringwald s64Temp+=((SINT64)gas32CoeffFor4SBs[(i+24)] * (SINT64)s16X[ChOffset+i+24]); \ 831*df25739fSMilanka Ringwald s64Temp+=((SINT64)gas32CoeffFor4SBs[(i+32)] * (SINT64)s16X[ChOffset+i+32]); \ 832*df25739fSMilanka Ringwald s32DCTY[i]=(SINT32)(s64Temp>>16);\ 833*df25739fSMilanka Ringwald /*printf("s32DCTY4: 0x%x \n", s32DCTY[i]);*/\ 834*df25739fSMilanka Ringwald } 835*df25739fSMilanka Ringwald #else 836*df25739fSMilanka Ringwald #define WINDOW_ACCU_4(i) \ 837*df25739fSMilanka Ringwald {\ 838*df25739fSMilanka Ringwald s32DCTY[i]=(gas32CoeffFor4SBs[i * 2] * s16X[ChOffset+i]) \ 839*df25739fSMilanka Ringwald + (((SINT32)(UINT16)(gas32CoeffFor4SBs[(i * 2) + 1]) * s16X[ChOffset+i]) >> 16); \ 840*df25739fSMilanka Ringwald s32DCTY[i]+=(gas32CoeffFor4SBs[(i+8) * 2] * s16X[ChOffset+i+8]) \ 841*df25739fSMilanka Ringwald + (((SINT32)(UINT16)(gas32CoeffFor4SBs[((i+8) * 2) + 1]) * s16X[ChOffset+i+8]) >> 16); \ 842*df25739fSMilanka Ringwald s32DCTY[i]+=(gas32CoeffFor4SBs[(i+16) * 2] * s16X[ChOffset+i+16]) \ 843*df25739fSMilanka Ringwald + (((SINT32)(UINT16)(gas32CoeffFor4SBs[((i+16) * 2) + 1]) * s16X[ChOffset+i+16]) >> 16); \ 844*df25739fSMilanka Ringwald s32DCTY[i]+=(gas32CoeffFor4SBs[(i+24) * 2] * s16X[ChOffset+i+24]) \ 845*df25739fSMilanka Ringwald + (((SINT32)(UINT16)(gas32CoeffFor4SBs[((i+24) * 2) + 1]) * s16X[ChOffset+i+24]) >> 16); \ 846*df25739fSMilanka Ringwald s32DCTY[i]+=(gas32CoeffFor4SBs[(i+32) * 2] * s16X[ChOffset+i+32]) \ 847*df25739fSMilanka Ringwald + (((SINT32)(UINT16)(gas32CoeffFor4SBs[((i+32) * 2) + 1]) * s16X[ChOffset+i+32]) >> 16); \ 848*df25739fSMilanka Ringwald } 849*df25739fSMilanka Ringwald #endif 850*df25739fSMilanka Ringwald #define WINDOW_PARTIAL_4 \ 851*df25739fSMilanka Ringwald {\ 852*df25739fSMilanka Ringwald WINDOW_ACCU_4(0); WINDOW_ACCU_4(1);\ 853*df25739fSMilanka Ringwald WINDOW_ACCU_4(2); WINDOW_ACCU_4(3);\ 854*df25739fSMilanka Ringwald WINDOW_ACCU_4(4); WINDOW_ACCU_4(5);\ 855*df25739fSMilanka Ringwald WINDOW_ACCU_4(6); WINDOW_ACCU_4(7);\ 856*df25739fSMilanka Ringwald } 857*df25739fSMilanka Ringwald 858*df25739fSMilanka Ringwald #if (SBC_IS_64_MULT_IN_WINDOW_ACCU == TRUE) 859*df25739fSMilanka Ringwald #define WINDOW_ACCU_8(i) \ 860*df25739fSMilanka Ringwald {\ 861*df25739fSMilanka Ringwald s64Temp = ((((SINT64)gas32CoeffFor8SBs[i] * (SINT64)s16X[ChOffset+i] ))); \ 862*df25739fSMilanka Ringwald s64Temp+= ((((SINT64)gas32CoeffFor8SBs[(i+16)] * (SINT64)s16X[ChOffset+i+16]))); \ 863*df25739fSMilanka Ringwald s64Temp+= ((((SINT64)gas32CoeffFor8SBs[(i+32)] * (SINT64)s16X[ChOffset+i+32]))); \ 864*df25739fSMilanka Ringwald s64Temp+= ((((SINT64)gas32CoeffFor8SBs[(i+48)] * (SINT64)s16X[ChOffset+i+48]))); \ 865*df25739fSMilanka Ringwald s64Temp+= ((((SINT64)gas32CoeffFor8SBs[(i+64)] * (SINT64)s16X[ChOffset+i+64]))); \ 866*df25739fSMilanka Ringwald /*printf("s32DCTY8: %d= 0x%x * %d\n", s32DCTY[i], gas32CoeffFor8SBs[i], s16X[ChOffset+i]);*/ \ 867*df25739fSMilanka Ringwald s32DCTY[i]=(SINT32)(s64Temp>>16);\ 868*df25739fSMilanka Ringwald } 869*df25739fSMilanka Ringwald #else 870*df25739fSMilanka Ringwald #define WINDOW_ACCU_8(i) \ 871*df25739fSMilanka Ringwald {\ 872*df25739fSMilanka Ringwald s32DCTY[i]=(gas32CoeffFor8SBs[i * 2] * s16X[ChOffset+i]) \ 873*df25739fSMilanka Ringwald + (((SINT32)(UINT16)(gas32CoeffFor8SBs[(i * 2) + 1]) * s16X[ChOffset+i]) >> 16); \ 874*df25739fSMilanka Ringwald s32DCTY[i]+=(gas32CoeffFor8SBs[(i+16) * 2] * s16X[ChOffset+i+16]) \ 875*df25739fSMilanka Ringwald + (((SINT32)(UINT16)(gas32CoeffFor8SBs[((i+16) * 2) + 1]) * s16X[ChOffset+i+16]) >> 16); \ 876*df25739fSMilanka Ringwald s32DCTY[i]+=(gas32CoeffFor8SBs[(i+32) * 2] * s16X[ChOffset+i+32]) \ 877*df25739fSMilanka Ringwald + (((SINT32)(UINT16)(gas32CoeffFor8SBs[((i+32) * 2) + 1]) * s16X[ChOffset+i+32]) >> 16); \ 878*df25739fSMilanka Ringwald s32DCTY[i]+=(gas32CoeffFor8SBs[(i+48) * 2] * s16X[ChOffset+i+48]) \ 879*df25739fSMilanka Ringwald + (((SINT32)(UINT16)(gas32CoeffFor8SBs[((i+48) * 2) + 1]) * s16X[ChOffset+i+48]) >> 16); \ 880*df25739fSMilanka Ringwald s32DCTY[i]+=(gas32CoeffFor8SBs[(i+64) * 2] * s16X[ChOffset+i+64]) \ 881*df25739fSMilanka Ringwald + (((SINT32)(UINT16)(gas32CoeffFor8SBs[((i+64) * 2) + 1]) * s16X[ChOffset+i+64]) >> 16); \ 882*df25739fSMilanka Ringwald /*printf("s32DCTY8: %d = 0x%4x%4x * %d\n", s32DCTY[i], gas32CoeffFor8SBs[i * 2], (gas32CoeffFor8SBs[(i * 2) + 1]), s16X[ChOffset+i]);*/\ 883*df25739fSMilanka Ringwald /*s32DCTY[i]=(SINT32)(s64Temp>>16);*/\ 884*df25739fSMilanka Ringwald } 885*df25739fSMilanka Ringwald #endif 886*df25739fSMilanka Ringwald #define WINDOW_PARTIAL_8 \ 887*df25739fSMilanka Ringwald {\ 888*df25739fSMilanka Ringwald WINDOW_ACCU_8(0); WINDOW_ACCU_8(1);\ 889*df25739fSMilanka Ringwald WINDOW_ACCU_8(2); WINDOW_ACCU_8(3);\ 890*df25739fSMilanka Ringwald WINDOW_ACCU_8(4); WINDOW_ACCU_8(5);\ 891*df25739fSMilanka Ringwald WINDOW_ACCU_8(6); WINDOW_ACCU_8(7);\ 892*df25739fSMilanka Ringwald WINDOW_ACCU_8(8); WINDOW_ACCU_8(9);\ 893*df25739fSMilanka Ringwald WINDOW_ACCU_8(10); WINDOW_ACCU_8(11);\ 894*df25739fSMilanka Ringwald WINDOW_ACCU_8(12); WINDOW_ACCU_8(13);\ 895*df25739fSMilanka Ringwald WINDOW_ACCU_8(14); WINDOW_ACCU_8(15);\ 896*df25739fSMilanka Ringwald } 897*df25739fSMilanka Ringwald #endif 898*df25739fSMilanka Ringwald #endif 899*df25739fSMilanka Ringwald 900*df25739fSMilanka Ringwald static SINT16 ShiftCounter=0; 901*df25739fSMilanka Ringwald extern SINT16 EncMaxShiftCounter; 902*df25739fSMilanka Ringwald /**************************************************************************** 903*df25739fSMilanka Ringwald * SbcAnalysisFilter - performs Analysis of the input audio stream 904*df25739fSMilanka Ringwald * 905*df25739fSMilanka Ringwald * RETURNS : N/A 906*df25739fSMilanka Ringwald */ 907*df25739fSMilanka Ringwald void SbcAnalysisFilter4(SBC_ENC_PARAMS *pstrEncParams) 908*df25739fSMilanka Ringwald { 909*df25739fSMilanka Ringwald SINT16 *ps16PcmBuf; 910*df25739fSMilanka Ringwald SINT32 *ps32SbBuf; 911*df25739fSMilanka Ringwald SINT32 s32Blk,s32Ch; 912*df25739fSMilanka Ringwald SINT32 s32NumOfChannels, s32NumOfBlocks; 913*df25739fSMilanka Ringwald SINT32 i,*ps32X,*ps32X2; 914*df25739fSMilanka Ringwald SINT32 Offset,Offset2,ChOffset; 915*df25739fSMilanka Ringwald #if (SBC_ARM_ASM_OPT==TRUE) 916*df25739fSMilanka Ringwald register SINT32 s32Hi,s32Hi2; 917*df25739fSMilanka Ringwald #else 918*df25739fSMilanka Ringwald #if (SBC_IPAQ_OPT==TRUE) 919*df25739fSMilanka Ringwald #if (SBC_IS_64_MULT_IN_WINDOW_ACCU == TRUE) 920*df25739fSMilanka Ringwald register SINT64 s64Temp,s64Temp2; 921*df25739fSMilanka Ringwald #else 922*df25739fSMilanka Ringwald register SINT32 s32Temp,s32Temp2; 923*df25739fSMilanka Ringwald #endif 924*df25739fSMilanka Ringwald #else 925*df25739fSMilanka Ringwald 926*df25739fSMilanka Ringwald #if (SBC_IS_64_MULT_IN_WINDOW_ACCU == TRUE) 927*df25739fSMilanka Ringwald SINT64 s64Temp; 928*df25739fSMilanka Ringwald #endif 929*df25739fSMilanka Ringwald 930*df25739fSMilanka Ringwald #endif 931*df25739fSMilanka Ringwald #endif 932*df25739fSMilanka Ringwald 933*df25739fSMilanka Ringwald s32NumOfChannels = pstrEncParams->s16NumOfChannels; 934*df25739fSMilanka Ringwald s32NumOfBlocks = pstrEncParams->s16NumOfBlocks; 935*df25739fSMilanka Ringwald 936*df25739fSMilanka Ringwald ps16PcmBuf = pstrEncParams->ps16NextPcmBuffer; 937*df25739fSMilanka Ringwald 938*df25739fSMilanka Ringwald ps32SbBuf = pstrEncParams->s32SbBuffer; 939*df25739fSMilanka Ringwald Offset2=(SINT32)(EncMaxShiftCounter+40); 940*df25739fSMilanka Ringwald 941*df25739fSMilanka Ringwald for (s32Blk=0; s32Blk <s32NumOfBlocks; s32Blk++) 942*df25739fSMilanka Ringwald { 943*df25739fSMilanka Ringwald Offset=(SINT32)(EncMaxShiftCounter-ShiftCounter); 944*df25739fSMilanka Ringwald /* Store new samples */ 945*df25739fSMilanka Ringwald if (s32NumOfChannels==1) 946*df25739fSMilanka Ringwald { 947*df25739fSMilanka Ringwald s16X[3+Offset] = *ps16PcmBuf; ps16PcmBuf++; 948*df25739fSMilanka Ringwald s16X[2+Offset] = *ps16PcmBuf; ps16PcmBuf++; 949*df25739fSMilanka Ringwald s16X[1+Offset] = *ps16PcmBuf; ps16PcmBuf++; 950*df25739fSMilanka Ringwald s16X[0+Offset] = *ps16PcmBuf; ps16PcmBuf++; 951*df25739fSMilanka Ringwald 952*df25739fSMilanka Ringwald } 953*df25739fSMilanka Ringwald else 954*df25739fSMilanka Ringwald { 955*df25739fSMilanka Ringwald s16X[3+Offset] = *ps16PcmBuf; ps16PcmBuf++; 956*df25739fSMilanka Ringwald s16X[Offset2+3+Offset] = *ps16PcmBuf; ps16PcmBuf++; 957*df25739fSMilanka Ringwald s16X[2+Offset] = *ps16PcmBuf; ps16PcmBuf++; 958*df25739fSMilanka Ringwald s16X[Offset2+2+Offset] = *ps16PcmBuf; ps16PcmBuf++; 959*df25739fSMilanka Ringwald s16X[1+Offset] = *ps16PcmBuf; ps16PcmBuf++; 960*df25739fSMilanka Ringwald s16X[Offset2+1+Offset] = *ps16PcmBuf; ps16PcmBuf++; 961*df25739fSMilanka Ringwald s16X[0+Offset] = *ps16PcmBuf; ps16PcmBuf++; 962*df25739fSMilanka Ringwald s16X[Offset2+0+Offset] = *ps16PcmBuf; ps16PcmBuf++; 963*df25739fSMilanka Ringwald } 964*df25739fSMilanka Ringwald for (s32Ch=0;s32Ch<s32NumOfChannels;s32Ch++) 965*df25739fSMilanka Ringwald { 966*df25739fSMilanka Ringwald ChOffset=s32Ch*Offset2+Offset; 967*df25739fSMilanka Ringwald 968*df25739fSMilanka Ringwald WINDOW_PARTIAL_4 969*df25739fSMilanka Ringwald 970*df25739fSMilanka Ringwald SBC_FastIDCT4(s32DCTY, ps32SbBuf); 971*df25739fSMilanka Ringwald ps32SbBuf +=SUB_BANDS_4; 972*df25739fSMilanka Ringwald } 973*df25739fSMilanka Ringwald if (s32NumOfChannels==1) 974*df25739fSMilanka Ringwald { 975*df25739fSMilanka Ringwald if (ShiftCounter>=EncMaxShiftCounter) 976*df25739fSMilanka Ringwald { 977*df25739fSMilanka Ringwald SHIFTUP_X4; 978*df25739fSMilanka Ringwald ShiftCounter=0; 979*df25739fSMilanka Ringwald } 980*df25739fSMilanka Ringwald else 981*df25739fSMilanka Ringwald { 982*df25739fSMilanka Ringwald ShiftCounter+=SUB_BANDS_4; 983*df25739fSMilanka Ringwald } 984*df25739fSMilanka Ringwald } 985*df25739fSMilanka Ringwald else 986*df25739fSMilanka Ringwald { 987*df25739fSMilanka Ringwald if (ShiftCounter>=EncMaxShiftCounter) 988*df25739fSMilanka Ringwald { 989*df25739fSMilanka Ringwald SHIFTUP_X4_2; 990*df25739fSMilanka Ringwald ShiftCounter=0; 991*df25739fSMilanka Ringwald } 992*df25739fSMilanka Ringwald else 993*df25739fSMilanka Ringwald { 994*df25739fSMilanka Ringwald ShiftCounter+=SUB_BANDS_4; 995*df25739fSMilanka Ringwald } 996*df25739fSMilanka Ringwald } 997*df25739fSMilanka Ringwald } 998*df25739fSMilanka Ringwald } 999*df25739fSMilanka Ringwald 1000*df25739fSMilanka Ringwald /* //////////////////////////////////////////////////////////////////////////////////////////////////////////////////// */ 1001*df25739fSMilanka Ringwald void SbcAnalysisFilter8 (SBC_ENC_PARAMS *pstrEncParams) 1002*df25739fSMilanka Ringwald { 1003*df25739fSMilanka Ringwald SINT16 *ps16PcmBuf; 1004*df25739fSMilanka Ringwald SINT32 *ps32SbBuf; 1005*df25739fSMilanka Ringwald SINT32 s32Blk,s32Ch; /* counter for block*/ 1006*df25739fSMilanka Ringwald SINT32 Offset,Offset2; 1007*df25739fSMilanka Ringwald SINT32 s32NumOfChannels, s32NumOfBlocks; 1008*df25739fSMilanka Ringwald SINT32 i,*ps32X,*ps32X2; 1009*df25739fSMilanka Ringwald SINT32 ChOffset; 1010*df25739fSMilanka Ringwald #if (SBC_ARM_ASM_OPT==TRUE) 1011*df25739fSMilanka Ringwald register SINT32 s32Hi,s32Hi2; 1012*df25739fSMilanka Ringwald #else 1013*df25739fSMilanka Ringwald #if (SBC_IPAQ_OPT==TRUE) 1014*df25739fSMilanka Ringwald #if (SBC_IS_64_MULT_IN_WINDOW_ACCU == TRUE) 1015*df25739fSMilanka Ringwald register SINT64 s64Temp,s64Temp2; 1016*df25739fSMilanka Ringwald #else 1017*df25739fSMilanka Ringwald register SINT32 s32Temp,s32Temp2; 1018*df25739fSMilanka Ringwald #endif 1019*df25739fSMilanka Ringwald #else 1020*df25739fSMilanka Ringwald #if (SBC_IS_64_MULT_IN_WINDOW_ACCU == TRUE) 1021*df25739fSMilanka Ringwald SINT64 s64Temp; 1022*df25739fSMilanka Ringwald #endif 1023*df25739fSMilanka Ringwald #endif 1024*df25739fSMilanka Ringwald #endif 1025*df25739fSMilanka Ringwald 1026*df25739fSMilanka Ringwald s32NumOfChannels = pstrEncParams->s16NumOfChannels; 1027*df25739fSMilanka Ringwald s32NumOfBlocks = pstrEncParams->s16NumOfBlocks; 1028*df25739fSMilanka Ringwald 1029*df25739fSMilanka Ringwald ps16PcmBuf = pstrEncParams->ps16NextPcmBuffer; 1030*df25739fSMilanka Ringwald 1031*df25739fSMilanka Ringwald ps32SbBuf = pstrEncParams->s32SbBuffer; 1032*df25739fSMilanka Ringwald Offset2=(SINT32)(EncMaxShiftCounter+80); 1033*df25739fSMilanka Ringwald for (s32Blk=0; s32Blk <s32NumOfBlocks; s32Blk++) 1034*df25739fSMilanka Ringwald { 1035*df25739fSMilanka Ringwald Offset=(SINT32)(EncMaxShiftCounter-ShiftCounter); 1036*df25739fSMilanka Ringwald /* Store new samples */ 1037*df25739fSMilanka Ringwald if (s32NumOfChannels==1) 1038*df25739fSMilanka Ringwald { 1039*df25739fSMilanka Ringwald s16X[7+Offset] = *ps16PcmBuf; ps16PcmBuf++; 1040*df25739fSMilanka Ringwald s16X[6+Offset] = *ps16PcmBuf; ps16PcmBuf++; 1041*df25739fSMilanka Ringwald s16X[5+Offset] = *ps16PcmBuf; ps16PcmBuf++; 1042*df25739fSMilanka Ringwald s16X[4+Offset] = *ps16PcmBuf; ps16PcmBuf++; 1043*df25739fSMilanka Ringwald s16X[3+Offset] = *ps16PcmBuf; ps16PcmBuf++; 1044*df25739fSMilanka Ringwald s16X[2+Offset] = *ps16PcmBuf; ps16PcmBuf++; 1045*df25739fSMilanka Ringwald s16X[1+Offset] = *ps16PcmBuf; ps16PcmBuf++; 1046*df25739fSMilanka Ringwald s16X[0+Offset] = *ps16PcmBuf; ps16PcmBuf++; 1047*df25739fSMilanka Ringwald } 1048*df25739fSMilanka Ringwald else 1049*df25739fSMilanka Ringwald { 1050*df25739fSMilanka Ringwald s16X[7+Offset] = *ps16PcmBuf; ps16PcmBuf++; 1051*df25739fSMilanka Ringwald s16X[Offset2+7+Offset] = *ps16PcmBuf; ps16PcmBuf++; 1052*df25739fSMilanka Ringwald s16X[6+Offset] = *ps16PcmBuf; ps16PcmBuf++; 1053*df25739fSMilanka Ringwald s16X[Offset2+6+Offset] = *ps16PcmBuf; ps16PcmBuf++; 1054*df25739fSMilanka Ringwald s16X[5+Offset] = *ps16PcmBuf; ps16PcmBuf++; 1055*df25739fSMilanka Ringwald s16X[Offset2+5+Offset] = *ps16PcmBuf; ps16PcmBuf++; 1056*df25739fSMilanka Ringwald s16X[4+Offset] = *ps16PcmBuf; ps16PcmBuf++; 1057*df25739fSMilanka Ringwald s16X[Offset2+4+Offset] = *ps16PcmBuf; ps16PcmBuf++; 1058*df25739fSMilanka Ringwald s16X[3+Offset] = *ps16PcmBuf; ps16PcmBuf++; 1059*df25739fSMilanka Ringwald s16X[Offset2+3+Offset] = *ps16PcmBuf; ps16PcmBuf++; 1060*df25739fSMilanka Ringwald s16X[2+Offset] = *ps16PcmBuf; ps16PcmBuf++; 1061*df25739fSMilanka Ringwald s16X[Offset2+2+Offset] = *ps16PcmBuf; ps16PcmBuf++; 1062*df25739fSMilanka Ringwald s16X[1+Offset] = *ps16PcmBuf; ps16PcmBuf++; 1063*df25739fSMilanka Ringwald s16X[Offset2+1+Offset] = *ps16PcmBuf; ps16PcmBuf++; 1064*df25739fSMilanka Ringwald s16X[0+Offset] = *ps16PcmBuf; ps16PcmBuf++; 1065*df25739fSMilanka Ringwald s16X[Offset2+0+Offset] = *ps16PcmBuf; ps16PcmBuf++; 1066*df25739fSMilanka Ringwald } 1067*df25739fSMilanka Ringwald for (s32Ch=0;s32Ch<s32NumOfChannels;s32Ch++) 1068*df25739fSMilanka Ringwald { 1069*df25739fSMilanka Ringwald ChOffset=s32Ch*Offset2+Offset; 1070*df25739fSMilanka Ringwald 1071*df25739fSMilanka Ringwald WINDOW_PARTIAL_8 1072*df25739fSMilanka Ringwald 1073*df25739fSMilanka Ringwald SBC_FastIDCT8 (s32DCTY, ps32SbBuf); 1074*df25739fSMilanka Ringwald 1075*df25739fSMilanka Ringwald ps32SbBuf +=SUB_BANDS_8; 1076*df25739fSMilanka Ringwald } 1077*df25739fSMilanka Ringwald if (s32NumOfChannels==1) 1078*df25739fSMilanka Ringwald { 1079*df25739fSMilanka Ringwald if (ShiftCounter>=EncMaxShiftCounter) 1080*df25739fSMilanka Ringwald { 1081*df25739fSMilanka Ringwald SHIFTUP_X8; 1082*df25739fSMilanka Ringwald ShiftCounter=0; 1083*df25739fSMilanka Ringwald } 1084*df25739fSMilanka Ringwald else 1085*df25739fSMilanka Ringwald { 1086*df25739fSMilanka Ringwald ShiftCounter+=SUB_BANDS_8; 1087*df25739fSMilanka Ringwald } 1088*df25739fSMilanka Ringwald } 1089*df25739fSMilanka Ringwald else 1090*df25739fSMilanka Ringwald { 1091*df25739fSMilanka Ringwald if (ShiftCounter>=EncMaxShiftCounter) 1092*df25739fSMilanka Ringwald { 1093*df25739fSMilanka Ringwald SHIFTUP_X8_2; 1094*df25739fSMilanka Ringwald ShiftCounter=0; 1095*df25739fSMilanka Ringwald } 1096*df25739fSMilanka Ringwald else 1097*df25739fSMilanka Ringwald { 1098*df25739fSMilanka Ringwald ShiftCounter+=SUB_BANDS_8; 1099*df25739fSMilanka Ringwald } 1100*df25739fSMilanka Ringwald } 1101*df25739fSMilanka Ringwald } 1102*df25739fSMilanka Ringwald } 1103*df25739fSMilanka Ringwald 1104*df25739fSMilanka Ringwald void SbcAnalysisInit (void) 1105*df25739fSMilanka Ringwald { 1106*df25739fSMilanka Ringwald memset(s16X,0,ENC_VX_BUFFER_SIZE*sizeof(SINT16)); 1107*df25739fSMilanka Ringwald ShiftCounter=0; 1108*df25739fSMilanka Ringwald } 1109