xref: /btstack/3rd-party/bluedroid/encoder/srce/sbc_analysis.c (revision c1ab6cc1beb14b16b46e74a3723644016d8c3cc7)
1df25739fSMilanka Ringwald /******************************************************************************
2df25739fSMilanka Ringwald  *
3df25739fSMilanka Ringwald  *  Copyright (C) 1999-2012 Broadcom Corporation
4df25739fSMilanka Ringwald  *
5df25739fSMilanka Ringwald  *  Licensed under the Apache License, Version 2.0 (the "License");
6df25739fSMilanka Ringwald  *  you may not use this file except in compliance with the License.
7df25739fSMilanka Ringwald  *  You may obtain a copy of the License at:
8df25739fSMilanka Ringwald  *
9df25739fSMilanka Ringwald  *  http://www.apache.org/licenses/LICENSE-2.0
10df25739fSMilanka Ringwald  *
11df25739fSMilanka Ringwald  *  Unless required by applicable law or agreed to in writing, software
12df25739fSMilanka Ringwald  *  distributed under the License is distributed on an "AS IS" BASIS,
13df25739fSMilanka Ringwald  *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14df25739fSMilanka Ringwald  *  See the License for the specific language governing permissions and
15df25739fSMilanka Ringwald  *  limitations under the License.
16df25739fSMilanka Ringwald  *
17df25739fSMilanka Ringwald  ******************************************************************************/
18df25739fSMilanka Ringwald 
19df25739fSMilanka Ringwald /******************************************************************************
20df25739fSMilanka Ringwald  *
21df25739fSMilanka Ringwald  *  This file contains the code that performs Analysis of the input audio
22df25739fSMilanka Ringwald  *  stream.
23df25739fSMilanka Ringwald  *
24df25739fSMilanka Ringwald  ******************************************************************************/
25df25739fSMilanka Ringwald #include <string.h>
26df25739fSMilanka Ringwald #include "sbc_encoder.h"
27df25739fSMilanka Ringwald #include "sbc_enc_func_declare.h"
28df25739fSMilanka Ringwald /*#include <math.h>*/
29df25739fSMilanka Ringwald 
30df25739fSMilanka Ringwald #if (SBC_IS_64_MULT_IN_WINDOW_ACCU == TRUE)
31df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_0_1 (SINT32)0x01659F45  /* gas32CoeffFor4SBs[8] = -gas32CoeffFor4SBs[32] = 0x01659F45 */
32df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_0_2 (SINT32)0x115B1ED2  /* gas32CoeffFor4SBs[16] = -gas32CoeffFor4SBs[24] = 0x115B1ED2 */
33df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_1_0 (SINT32)0x001194E6  /* gas32CoeffFor4SBs[1 et 39] = 0x001194E6 */
34df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_1_1 (SINT32)0x029DBAA3  /* gas32CoeffFor4SBs[9 et 31] = 0x029DBAA3 */
35df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_1_2 (SINT32)0x18F55C90  /* gas32CoeffFor4SBs[17 et 23] = 0x18F55C90 */
36df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_1_3 (SINT32)0xF60FAF37  /* gas32CoeffFor4SBs[15 et 25] = 0xF60FAF37 */
37df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_1_4 (SINT32)0xFF9BB9D5  /* gas32CoeffFor4SBs[7 et 33] = 0xFF9BB9D5 */
38df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_2_0 (SINT32)0x0030E2D3  /* gas32CoeffFor4SBs[2 et 38] = 0x0030E2D3 */
39df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_2_1 (SINT32)0x03B23341  /* gas32CoeffFor4SBs[10 et 30] = 0x03B23341 */
40df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_2_2 (SINT32)0x1F91CA46  /* gas32CoeffFor4SBs[18 et 22] = 0x1F91CA46 */
41df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_2_3 (SINT32)0xFC4F91D4  /* gas32CoeffFor4SBs[14 et 26] = 0xFC4F91D4 */
42df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_2_4 (SINT32)0x003D239B  /* gas32CoeffFor4SBs[6 et 34] = 0x003D239B */
43df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_3_0 (SINT32)0x00599403  /* gas32CoeffFor4SBs[3 et 37] = 0x00599403 */
44df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_3_1 (SINT32)0x041EEE40  /* gas32CoeffFor4SBs[11 et 29] = 0x041EEE40 */
45df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_3_2 (SINT32)0x2412F251  /* gas32CoeffFor4SBs[19 et 21] = 0x2412F251 */
46df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_3_3 (SINT32)0x00C8F2BC  /* gas32CoeffFor4SBs[13 et 27] = 0x00C8F2BC */
47df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_3_4 (SINT32)0x007F88E4  /* gas32CoeffFor4SBs[5 et 35] = 0x007F88E4 */
48df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_4_0 (SINT32)0x007DBCC8  /* gas32CoeffFor4SBs[4 et 36] = 0x007DBCC8 */
49df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_4_1 (SINT32)0x034FEE2C  /* gas32CoeffFor4SBs[12 et 28] = 0x034FEE2C */
50df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_4_2 (SINT32)0x25AC1FF2  /* gas32CoeffFor4SBs[20] = 0x25AC1FF2 */
51df25739fSMilanka Ringwald 
52df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_0_1 (SINT32)0x00B97348  /* 16 0x00B97348 */
53df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_0_2 (SINT32)0x08B4307A  /* 32 0x08B4307A */
54df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_1_0 (SINT32)0x00052173  /* 1 et 79 = 0x00052173 */
55df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_1_1 (SINT32)0x01071B96  /* 17 et 63 = 0x01071B96 */
56df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_1_2 (SINT32)0x0A9F3E9A  /* 33 et 47 = 0x0A9F3E9A*/
57df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_1_3 (SINT32)0xF9312891  /* 31 et 49 = 0xF9312891 */
58df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_1_4 (SINT32)0xFF8D6793  /* 15 et 65 = 0xFF8D6793 */
59df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_2_0 (SINT32)0x000B3F71  /* 2 et 78 = 0x000B3F71 */
60df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_2_1 (SINT32)0x0156B3CA  /* 18 et 62 = 0x0156B3CA */
61df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_2_2 (SINT32)0x0C7D59B6  /* 34 et 46 = 0x0C7D59B6 */
62df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_2_3 (SINT32)0xFAFF95FC  /* 30 et 50 = 0xFAFF95FC */
63df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_2_4 (SINT32)0xFFC9F10E  /* 14 et 66 = 0xFFC9F10E */
64df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_3_0 (SINT32)0x00122C7D  /* 3 et 77 = 0x00122C7D*/
65df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_3_1 (SINT32)0x01A1B38B  /* 19 et 61 = 0x01A1B38B */
66df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_3_2 (SINT32)0x0E3BB16F  /* 35 et 45 = 0x0E3BB16F */
67df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_3_3 (SINT32)0xFCA86E7E  /* 29 et 51 = 0xFCA86E7E */
68df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_3_4 (SINT32)0xFFFA2413  /* 13 et 67 = 0xFFFA2413 */
69df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_4_0 (SINT32)0x001AFF89  /* 4 et 66 = 0x001AFF89 */
70df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_4_1 (SINT32)0x01E0224C  /* 20 et 60 = 0x01E0224C */
71df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_4_2 (SINT32)0x0FC721F9  /* 36 et 44 = 0x0FC721F9 */
72df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_4_3 (SINT32)0xFE20435D  /* 28 et 52 = 0xFE20435D */
73df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_4_4 (SINT32)0x001D8FD2  /* 12 et 68 = 0x001D8FD2 */
74df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_5_0 (SINT32)0x00255A62  /* 5 et 75 = 0x00255A62 */
75df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_5_1 (SINT32)0x0209291F  /* 21 et 59 = 0x0209291F */
76df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_5_2 (SINT32)0x110ECEF0  /* 37 et 43 = 0x110ECEF0 */
77df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_5_3 (SINT32)0xFF5EEB73  /* 27 et  53 = 0xFF5EEB73 */
78df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_5_4 (SINT32)0x0034F8B6  /* 11 et 69 = 0x0034F8B6 */
79df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_6_0 (SINT32)0x003060F4  /* 6 et 74 = 0x003060F4 */
80df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_6_1 (SINT32)0x02138653  /* 22 et 58 = 0x02138653 */
81df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_6_2 (SINT32)0x120435FA  /* 38 et 42 = 0x120435FA */
82df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_6_3 (SINT32)0x005FD0FF  /* 26 et 54 = 0x005FD0FF */
83df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_6_4 (SINT32)0x00415B75  /* 10 et 70 = 0x00415B75 */
84df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_7_0 (SINT32)0x003A72E7  /* 7 et 73 = 0x003A72E7 */
85df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_7_1 (SINT32)0x01F5F424  /* 23 et 57 = 0x01F5F424 */
86df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_7_2 (SINT32)0x129C226F  /* 39 et 41 = 0x129C226F */
87df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_7_3 (SINT32)0x01223EBA  /* 25 et 55 = 0x01223EBA */
88df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_7_4 (SINT32)0x0044EF48  /* 9 et 71 = 0x0044EF48 */
89df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_8_0 (SINT32)0x0041EC6A  /* 8 et 72 = 0x0041EC6A */
90df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_8_1 (SINT32)0x01A7ECEF  /* 24 et 56 = 0x01A7ECEF */
91df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_8_2 (SINT32)0x12CF6C75  /* 40 = 0x12CF6C75 */
92df25739fSMilanka Ringwald #else
93df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_0_1 (SINT16)0x0166  /* gas32CoeffFor4SBs[8] = -gas32CoeffFor4SBs[32] = 0x01659F45 */
94df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_0_2 (SINT16)0x115B  /* gas32CoeffFor4SBs[16] = -gas32CoeffFor4SBs[24] = 0x115B1ED2 */
95df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_1_0 (SINT16)0x0012  /* gas32CoeffFor4SBs[1 et 39] = 0x001194E6 */
96df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_1_1 (SINT16)0x029E  /* gas32CoeffFor4SBs[9 et 31] = 0x029DBAA3 */
97df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_1_2 (SINT16)0x18F5  /* gas32CoeffFor4SBs[17 et 23] = 0x18F55C90 */
98df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_1_3 (SINT16)0xF610  /* gas32CoeffFor4SBs[15 et 25] = 0xF60FAF37 */
99df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_1_4 (SINT16)0xFF9C  /* gas32CoeffFor4SBs[7 et 33] = 0xFF9BB9D5 */
100df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_2_0 (SINT16)0x0031  /* gas32CoeffFor4SBs[2 et 38] = 0x0030E2D3 */
101df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_2_1 (SINT16)0x03B2  /* gas32CoeffFor4SBs[10 et 30] = 0x03B23341 */
102df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_2_2 (SINT16)0x1F91  /* gas32CoeffFor4SBs[18 et 22] = 0x1F91CA46 */
103df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_2_3 (SINT16)0xFC50  /* gas32CoeffFor4SBs[14 et 26] = 0xFC4F91D4 */
104df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_2_4 (SINT16)0x003D  /* gas32CoeffFor4SBs[6 et 34] = 0x003D239B */
105df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_3_0 (SINT16)0x005A  /* gas32CoeffFor4SBs[3 et 37] = 0x00599403 */
106df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_3_1 (SINT16)0x041F  /* gas32CoeffFor4SBs[11 et 29] = 0x041EEE40 */
107df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_3_2 (SINT16)0x2413  /* gas32CoeffFor4SBs[19 et 21] = 0x2412F251 */
108df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_3_3 (SINT16)0x00C9  /* gas32CoeffFor4SBs[13 et 27] = 0x00C8F2BC */
109df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_3_4 (SINT16)0x0080  /* gas32CoeffFor4SBs[5 et 35] = 0x007F88E4 */
110df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_4_0 (SINT16)0x007E  /* gas32CoeffFor4SBs[4 et 36] = 0x007DBCC8 */
111df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_4_1 (SINT16)0x0350  /* gas32CoeffFor4SBs[12 et 28] = 0x034FEE2C */
112df25739fSMilanka Ringwald #define WIND_4_SUBBANDS_4_2 (SINT16)0x25AC  /* gas32CoeffFor4SBs[20] = 25AC1FF2 */
113df25739fSMilanka Ringwald 
114df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_0_1 (SINT16)0x00B9  /* 16 0x12CF6C75 */
115df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_0_2 (SINT16)0x08B4  /* 32 0x08B4307A */
116df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_1_0 (SINT16)0x0005  /* 1 et 79 = 0x00052173 */
117df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_1_1 (SINT16)0x0107  /* 17 et 63 = 0x01071B96 */
118df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_1_2 (SINT16)0x0A9F  /* 33 et 47 = 0x0A9F3E9A*/
119df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_1_3 (SINT16)0xF931  /* 31 et 49 = 0xF9312891 */
120df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_1_4 (SINT16)0xFF8D  /* 15 et 65 = 0xFF8D6793 */
121df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_2_0 (SINT16)0x000B  /* 2 et 78 = 0x000B3F71 */
122df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_2_1 (SINT16)0x0157  /* 18 et 62 = 0x0156B3CA */
123df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_2_2 (SINT16)0x0C7D  /* 34 et 46 = 0x0C7D59B6 */
124df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_2_3 (SINT16)0xFB00  /* 30 et 50 = 0xFAFF95FC */
125df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_2_4 (SINT16)0xFFCA  /* 14 et 66 = 0xFFC9F10E */
126df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_3_0 (SINT16)0x0012  /* 3 et 77 = 0x00122C7D*/
127df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_3_1 (SINT16)0x01A2  /* 19 et 61 = 0x01A1B38B */
128df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_3_2 (SINT16)0x0E3C  /* 35 et 45 = 0x0E3BB16F */
129df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_3_3 (SINT16)0xFCA8  /* 29 et 51 = 0xFCA86E7E */
130df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_3_4 (SINT16)0xFFFA  /* 13 et 67 = 0xFFFA2413 */
131df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_4_0 (SINT16)0x001B  /* 4 et 66 = 0x001AFF89 */
132df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_4_1 (SINT16)0x01E0  /* 20 et 60 = 0x01E0224C */
133df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_4_2 (SINT16)0x0FC7  /* 36 et 44 = 0x0FC721F9 */
134df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_4_3 (SINT16)0xFE20  /* 28 et 52 = 0xFE20435D */
135df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_4_4 (SINT16)0x001E  /* 12 et 68 = 0x001D8FD2 */
136df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_5_0 (SINT16)0x0025  /* 5 et 75 = 0x00255A62 */
137df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_5_1 (SINT16)0x0209  /* 21 et 59 = 0x0209291F */
138df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_5_2 (SINT16)0x110F  /* 37 et 43 = 0x110ECEF0 */
139df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_5_3 (SINT16)0xFF5F  /* 27 et  53 = 0xFF5EEB73 */
140df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_5_4 (SINT16)0x0035  /* 11 et 69 = 0x0034F8B6 */
141df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_6_0 (SINT16)0x0030  /* 6 et 74 = 0x003060F4 */
142df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_6_1 (SINT16)0x0214  /* 22 et 58 = 0x02138653 */
143df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_6_2 (SINT16)0x1204  /* 38 et 42 = 0x120435FA */
144df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_6_3 (SINT16)0x0060  /* 26 et 54 = 0x005FD0FF */
145df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_6_4 (SINT16)0x0041  /* 10 et 70 = 0x00415B75 */
146df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_7_0 (SINT16)0x003A  /* 7 et 73 = 0x003A72E7 */
147df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_7_1 (SINT16)0x01F6  /* 23 et 57 = 0x01F5F424 */
148df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_7_2 (SINT16)0x129C  /* 39 et 41 = 0x129C226F */
149df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_7_3 (SINT16)0x0122  /* 25 et 55 = 0x01223EBA */
150df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_7_4 (SINT16)0x0045  /* 9 et 71 = 0x0044EF48 */
151df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_8_0 (SINT16)0x0042  /* 8 et 72 = 0x0041EC6A */
152df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_8_1 (SINT16)0x01A8  /* 24 et 56 = 0x01A7ECEF */
153df25739fSMilanka Ringwald #define WIND_8_SUBBANDS_8_2 (SINT16)0x12CF  /* 40 = 0x12CF6C75 */
154df25739fSMilanka Ringwald #endif
155df25739fSMilanka Ringwald 
156df25739fSMilanka Ringwald #if (SBC_USE_ARM_PRAGMA==TRUE)
157df25739fSMilanka Ringwald #pragma arm section zidata = "sbc_s32_analysis_section"
158df25739fSMilanka Ringwald #endif
159df25739fSMilanka Ringwald static SINT32   s32DCTY[16]  = {0};
160df25739fSMilanka Ringwald static SINT32   s32X[ENC_VX_BUFFER_SIZE/2];
161df25739fSMilanka Ringwald static SINT16   *s16X=(SINT16*) s32X;      /* s16X must be 32 bits aligned cf  SHIFTUP_X8_2*/
162df25739fSMilanka Ringwald #if (SBC_USE_ARM_PRAGMA==TRUE)
163df25739fSMilanka Ringwald #pragma arm section zidata
164df25739fSMilanka Ringwald #endif
165df25739fSMilanka Ringwald 
166df25739fSMilanka Ringwald /* This macro is for 4 subbands */
167df25739fSMilanka Ringwald #define SHIFTUP_X4                                                               \
168df25739fSMilanka Ringwald {                                                                                   \
169df25739fSMilanka Ringwald     ps32X=(SINT32 *)(s16X+EncMaxShiftCounter+38);                                 \
170df25739fSMilanka Ringwald     for (i=0;i<9;i++)                                                               \
171df25739fSMilanka Ringwald     {                                                                               \
172df25739fSMilanka Ringwald         *ps32X=*(ps32X-2-(ShiftCounter>>1));  ps32X--;                                 \
173df25739fSMilanka Ringwald         *ps32X=*(ps32X-2-(ShiftCounter>>1));  ps32X--;                                 \
174df25739fSMilanka Ringwald     }                                                                               \
175df25739fSMilanka Ringwald }
176df25739fSMilanka Ringwald #define SHIFTUP_X4_2                                                              \
177df25739fSMilanka Ringwald {                                                                                   \
178df25739fSMilanka Ringwald     ps32X=(SINT32 *)(s16X+EncMaxShiftCounter+38);                                   \
179df25739fSMilanka Ringwald     ps32X2=(SINT32 *)(s16X+(EncMaxShiftCounter<<1)+78);                             \
180df25739fSMilanka Ringwald     for (i=0;i<9;i++)                                                               \
181df25739fSMilanka Ringwald     {                                                                               \
182df25739fSMilanka Ringwald         *ps32X=*(ps32X-2-(ShiftCounter>>1));  *(ps32X2)=*(ps32X2-2-(ShiftCounter>>1)); ps32X--;  ps32X2--;                     \
183df25739fSMilanka Ringwald         *ps32X=*(ps32X-2-(ShiftCounter>>1));  *(ps32X2)=*(ps32X2-2-(ShiftCounter>>1)); ps32X--;  ps32X2--;                     \
184df25739fSMilanka Ringwald     }                                                                               \
185df25739fSMilanka Ringwald }
186df25739fSMilanka Ringwald 
187df25739fSMilanka Ringwald /* This macro is for 8 subbands */
188df25739fSMilanka Ringwald #define SHIFTUP_X8                                                               \
189df25739fSMilanka Ringwald {                                                                                   \
190df25739fSMilanka Ringwald     ps32X=(SINT32 *)(s16X+EncMaxShiftCounter+78);                                 \
191df25739fSMilanka Ringwald     for (i=0;i<9;i++)                                                               \
192df25739fSMilanka Ringwald     {                                                                               \
193df25739fSMilanka Ringwald         *ps32X=*(ps32X-4-(ShiftCounter>>1));  ps32X--;                                 \
194df25739fSMilanka Ringwald         *ps32X=*(ps32X-4-(ShiftCounter>>1));  ps32X--;                                 \
195df25739fSMilanka Ringwald         *ps32X=*(ps32X-4-(ShiftCounter>>1));  ps32X--;                                 \
196df25739fSMilanka Ringwald         *ps32X=*(ps32X-4-(ShiftCounter>>1));  ps32X--;                                 \
197df25739fSMilanka Ringwald     }                                                                               \
198df25739fSMilanka Ringwald }
199df25739fSMilanka Ringwald #define SHIFTUP_X8_2                                                               \
200df25739fSMilanka Ringwald {                                                                                   \
201df25739fSMilanka Ringwald     ps32X=(SINT32 *)(s16X+EncMaxShiftCounter+78);                                   \
202df25739fSMilanka Ringwald     ps32X2=(SINT32 *)(s16X+(EncMaxShiftCounter<<1)+158);                             \
203df25739fSMilanka Ringwald     for (i=0;i<9;i++)                                                               \
204df25739fSMilanka Ringwald     {                                                                               \
205df25739fSMilanka Ringwald         *ps32X=*(ps32X-4-(ShiftCounter>>1));  *(ps32X2)=*(ps32X2-4-(ShiftCounter>>1)); ps32X--;  ps32X2--;                     \
206df25739fSMilanka Ringwald         *ps32X=*(ps32X-4-(ShiftCounter>>1));  *(ps32X2)=*(ps32X2-4-(ShiftCounter>>1)); ps32X--;  ps32X2--;                     \
207df25739fSMilanka Ringwald         *ps32X=*(ps32X-4-(ShiftCounter>>1));  *(ps32X2)=*(ps32X2-4-(ShiftCounter>>1)); ps32X--;  ps32X2--;                     \
208df25739fSMilanka Ringwald         *ps32X=*(ps32X-4-(ShiftCounter>>1));  *(ps32X2)=*(ps32X2-4-(ShiftCounter>>1)); ps32X--;  ps32X2--;                     \
209df25739fSMilanka Ringwald     }                                                                               \
210df25739fSMilanka Ringwald }
211df25739fSMilanka Ringwald 
212df25739fSMilanka Ringwald #if (SBC_ARM_ASM_OPT==TRUE)
213df25739fSMilanka Ringwald #define WINDOW_ACCU_8_0 \
214df25739fSMilanka Ringwald {\
215df25739fSMilanka Ringwald     __asm\
216df25739fSMilanka Ringwald     {\
217df25739fSMilanka Ringwald         MUL s32Hi,WIND_8_SUBBANDS_0_1,(s16X[ChOffset+16]-s16X[ChOffset+64]);\
218df25739fSMilanka Ringwald         MLA s32Hi,WIND_8_SUBBANDS_0_2,(s16X[ChOffset+32]-s16X[ChOffset+48]),s32Hi;\
219df25739fSMilanka Ringwald         MOV s32DCTY[0],s32Hi;\
220df25739fSMilanka Ringwald     }\
221df25739fSMilanka Ringwald }
222df25739fSMilanka Ringwald #define WINDOW_ACCU_8_1_15 \
223df25739fSMilanka Ringwald {\
224df25739fSMilanka Ringwald     __asm\
225df25739fSMilanka Ringwald     {\
226df25739fSMilanka Ringwald         MUL s32Hi,WIND_8_SUBBANDS_1_0,s16X[ChOffset+1];\
227df25739fSMilanka Ringwald         MUL s32Hi2,WIND_8_SUBBANDS_1_0,s16X[ChOffset+64+15];\
228df25739fSMilanka Ringwald         MLA s32Hi,WIND_8_SUBBANDS_1_1,s16X[ChOffset+16+1],s32Hi;\
229df25739fSMilanka Ringwald         MLA s32Hi2,WIND_8_SUBBANDS_1_1,s16X[ChOffset+48+15],s32Hi2;\
230df25739fSMilanka Ringwald         MLA s32Hi,WIND_8_SUBBANDS_1_2,s16X[ChOffset+32+1],s32Hi;\
231df25739fSMilanka Ringwald         MLA s32Hi2,WIND_8_SUBBANDS_1_2,s16X[ChOffset+32+15],s32Hi2;\
232df25739fSMilanka Ringwald         MLA s32Hi,WIND_8_SUBBANDS_1_3,s16X[ChOffset+48+1],s32Hi;\
233df25739fSMilanka Ringwald         MLA s32Hi2,WIND_8_SUBBANDS_1_3,s16X[ChOffset+16+15],s32Hi2;\
234df25739fSMilanka Ringwald         MLA s32Hi,WIND_8_SUBBANDS_1_4,s16X[ChOffset+64+1],s32Hi;\
235df25739fSMilanka Ringwald         MLA s32Hi2,WIND_8_SUBBANDS_1_4,s16X[ChOffset+15],s32Hi2;\
236df25739fSMilanka Ringwald         MOV s32DCTY[1],s32Hi;\
237df25739fSMilanka Ringwald         MOV s32DCTY[15],s32Hi2;\
238df25739fSMilanka Ringwald     }\
239df25739fSMilanka Ringwald }
240df25739fSMilanka Ringwald #define WINDOW_ACCU_8_2_14 \
241df25739fSMilanka Ringwald {\
242df25739fSMilanka Ringwald     __asm\
243df25739fSMilanka Ringwald     {\
244df25739fSMilanka Ringwald         MUL s32Hi,WIND_8_SUBBANDS_2_0,s16X[ChOffset+2];\
245df25739fSMilanka Ringwald         MUL s32Hi2,WIND_8_SUBBANDS_2_0,s16X[ChOffset+64+14];\
246df25739fSMilanka Ringwald         MLA s32Hi,WIND_8_SUBBANDS_2_1,s16X[ChOffset+16+2],s32Hi;\
247df25739fSMilanka Ringwald         MLA s32Hi2,WIND_8_SUBBANDS_2_1,s16X[ChOffset+48+14],s32Hi2;\
248df25739fSMilanka Ringwald         MLA s32Hi,WIND_8_SUBBANDS_2_2,s16X[ChOffset+32+2],s32Hi;\
249df25739fSMilanka Ringwald         MLA s32Hi2,WIND_8_SUBBANDS_2_2,s16X[ChOffset+32+14],s32Hi2;\
250df25739fSMilanka Ringwald         MLA s32Hi,WIND_8_SUBBANDS_2_3,s16X[ChOffset+48+2],s32Hi;\
251df25739fSMilanka Ringwald         MLA s32Hi2,WIND_8_SUBBANDS_2_3,s16X[ChOffset+16+14],s32Hi2;\
252df25739fSMilanka Ringwald         MLA s32Hi,WIND_8_SUBBANDS_2_4,s16X[ChOffset+64+2],s32Hi;\
253df25739fSMilanka Ringwald         MLA s32Hi2,WIND_8_SUBBANDS_2_4,s16X[ChOffset+14],s32Hi2;\
254df25739fSMilanka Ringwald         MOV s32DCTY[2],s32Hi;\
255df25739fSMilanka Ringwald         MOV s32DCTY[14],s32Hi2;\
256df25739fSMilanka Ringwald     }\
257df25739fSMilanka Ringwald }
258df25739fSMilanka Ringwald #define WINDOW_ACCU_8_3_13 \
259df25739fSMilanka Ringwald {\
260df25739fSMilanka Ringwald     __asm\
261df25739fSMilanka Ringwald     {\
262df25739fSMilanka Ringwald         MUL s32Hi,WIND_8_SUBBANDS_3_0,s16X[ChOffset+3];\
263df25739fSMilanka Ringwald         MUL s32Hi2,WIND_8_SUBBANDS_3_0,s16X[ChOffset+64+13];\
264df25739fSMilanka Ringwald         MLA s32Hi,WIND_8_SUBBANDS_3_1,s16X[ChOffset+16+3],s32Hi;\
265df25739fSMilanka Ringwald         MLA s32Hi2,WIND_8_SUBBANDS_3_1,s16X[ChOffset+48+13],s32Hi2;\
266df25739fSMilanka Ringwald         MLA s32Hi,WIND_8_SUBBANDS_3_2,s16X[ChOffset+32+3],s32Hi;\
267df25739fSMilanka Ringwald         MLA s32Hi2,WIND_8_SUBBANDS_3_2,s16X[ChOffset+32+13],s32Hi2;\
268df25739fSMilanka Ringwald         MLA s32Hi,WIND_8_SUBBANDS_3_3,s16X[ChOffset+48+3],s32Hi;\
269df25739fSMilanka Ringwald         MLA s32Hi2,WIND_8_SUBBANDS_3_3,s16X[ChOffset+16+13],s32Hi2;\
270df25739fSMilanka Ringwald         MLA s32Hi,WIND_8_SUBBANDS_3_4,s16X[ChOffset+64+3],s32Hi;\
271df25739fSMilanka Ringwald         MLA s32Hi2,WIND_8_SUBBANDS_3_4,s16X[ChOffset+13],s32Hi2;\
272df25739fSMilanka Ringwald         MOV s32DCTY[3],s32Hi;\
273df25739fSMilanka Ringwald         MOV s32DCTY[13],s32Hi2;\
274df25739fSMilanka Ringwald     }\
275df25739fSMilanka Ringwald }
276df25739fSMilanka Ringwald #define WINDOW_ACCU_8_4_12 \
277df25739fSMilanka Ringwald {\
278df25739fSMilanka Ringwald     __asm\
279df25739fSMilanka Ringwald     {\
280df25739fSMilanka Ringwald         MUL s32Hi,WIND_8_SUBBANDS_4_0,s16X[ChOffset+4];\
281df25739fSMilanka Ringwald         MUL s32Hi2,WIND_8_SUBBANDS_4_0,s16X[ChOffset+64+12];\
282df25739fSMilanka Ringwald         MLA s32Hi,WIND_8_SUBBANDS_4_1,s16X[ChOffset+16+4],s32Hi;\
283df25739fSMilanka Ringwald         MLA s32Hi2,WIND_8_SUBBANDS_4_1,s16X[ChOffset+48+12],s32Hi2;\
284df25739fSMilanka Ringwald         MLA s32Hi,WIND_8_SUBBANDS_4_2,s16X[ChOffset+32+4],s32Hi;\
285df25739fSMilanka Ringwald         MLA s32Hi2,WIND_8_SUBBANDS_4_2,s16X[ChOffset+32+12],s32Hi2;\
286df25739fSMilanka Ringwald         MLA s32Hi,WIND_8_SUBBANDS_4_3,s16X[ChOffset+48+4],s32Hi;\
287df25739fSMilanka Ringwald         MLA s32Hi2,WIND_8_SUBBANDS_4_3,s16X[ChOffset+16+12],s32Hi2;\
288df25739fSMilanka Ringwald         MLA s32Hi,WIND_8_SUBBANDS_4_4,s16X[ChOffset+64+4],s32Hi;\
289df25739fSMilanka Ringwald         MLA s32Hi2,WIND_8_SUBBANDS_4_4,s16X[ChOffset+12],s32Hi2;\
290df25739fSMilanka Ringwald         MOV s32DCTY[4],s32Hi;\
291df25739fSMilanka Ringwald         MOV s32DCTY[12],s32Hi2;\
292df25739fSMilanka Ringwald     }\
293df25739fSMilanka Ringwald }
294df25739fSMilanka Ringwald #define WINDOW_ACCU_8_5_11 \
295df25739fSMilanka Ringwald {\
296df25739fSMilanka Ringwald     __asm\
297df25739fSMilanka Ringwald     {\
298df25739fSMilanka Ringwald         MUL s32Hi,WIND_8_SUBBANDS_5_0,s16X[ChOffset+5];\
299df25739fSMilanka Ringwald         MUL s32Hi2,WIND_8_SUBBANDS_5_0,s16X[ChOffset+64+11];\
300df25739fSMilanka Ringwald         MLA s32Hi,WIND_8_SUBBANDS_5_1,s16X[ChOffset+16+5],s32Hi;\
301df25739fSMilanka Ringwald         MLA s32Hi2,WIND_8_SUBBANDS_5_1,s16X[ChOffset+48+11],s32Hi2;\
302df25739fSMilanka Ringwald         MLA s32Hi,WIND_8_SUBBANDS_5_2,s16X[ChOffset+32+5],s32Hi;\
303df25739fSMilanka Ringwald         MLA s32Hi2,WIND_8_SUBBANDS_5_2,s16X[ChOffset+32+11],s32Hi2;\
304df25739fSMilanka Ringwald         MLA s32Hi,WIND_8_SUBBANDS_5_3,s16X[ChOffset+48+5],s32Hi;\
305df25739fSMilanka Ringwald         MLA s32Hi2,WIND_8_SUBBANDS_5_3,s16X[ChOffset+16+11],s32Hi2;\
306df25739fSMilanka Ringwald         MLA s32Hi,WIND_8_SUBBANDS_5_4,s16X[ChOffset+64+5],s32Hi;\
307df25739fSMilanka Ringwald         MLA s32Hi2,WIND_8_SUBBANDS_5_4,s16X[ChOffset+11],s32Hi2;\
308df25739fSMilanka Ringwald         MOV s32DCTY[5],s32Hi;\
309df25739fSMilanka Ringwald         MOV s32DCTY[11],s32Hi2;\
310df25739fSMilanka Ringwald     }\
311df25739fSMilanka Ringwald }
312df25739fSMilanka Ringwald #define WINDOW_ACCU_8_6_10 \
313df25739fSMilanka Ringwald {\
314df25739fSMilanka Ringwald     __asm\
315df25739fSMilanka Ringwald     {\
316df25739fSMilanka Ringwald         MUL s32Hi,WIND_8_SUBBANDS_6_0,s16X[ChOffset+6];\
317df25739fSMilanka Ringwald         MUL s32Hi2,WIND_8_SUBBANDS_6_0,s16X[ChOffset+64+10];\
318df25739fSMilanka Ringwald         MLA s32Hi,WIND_8_SUBBANDS_6_1,s16X[ChOffset+16+6],s32Hi;\
319df25739fSMilanka Ringwald         MLA s32Hi2,WIND_8_SUBBANDS_6_1,s16X[ChOffset+48+10],s32Hi2;\
320df25739fSMilanka Ringwald         MLA s32Hi,WIND_8_SUBBANDS_6_2,s16X[ChOffset+32+6],s32Hi;\
321df25739fSMilanka Ringwald         MLA s32Hi2,WIND_8_SUBBANDS_6_2,s16X[ChOffset+32+10],s32Hi2;\
322df25739fSMilanka Ringwald         MLA s32Hi,WIND_8_SUBBANDS_6_3,s16X[ChOffset+48+6],s32Hi;\
323df25739fSMilanka Ringwald         MLA s32Hi2,WIND_8_SUBBANDS_6_3,s16X[ChOffset+16+10],s32Hi2;\
324df25739fSMilanka Ringwald         MLA s32Hi,WIND_8_SUBBANDS_6_4,s16X[ChOffset+64+6],s32Hi;\
325df25739fSMilanka Ringwald         MLA s32Hi2,WIND_8_SUBBANDS_6_4,s16X[ChOffset+10],s32Hi2;\
326df25739fSMilanka Ringwald         MOV s32DCTY[6],s32Hi;\
327df25739fSMilanka Ringwald         MOV s32DCTY[10],s32Hi2;\
328df25739fSMilanka Ringwald     }\
329df25739fSMilanka Ringwald }
330df25739fSMilanka Ringwald #define WINDOW_ACCU_8_7_9 \
331df25739fSMilanka Ringwald {\
332df25739fSMilanka Ringwald     __asm\
333df25739fSMilanka Ringwald     {\
334df25739fSMilanka Ringwald         MUL s32Hi,WIND_8_SUBBANDS_7_0,s16X[ChOffset+7];\
335df25739fSMilanka Ringwald         MUL s32Hi2,WIND_8_SUBBANDS_7_0,s16X[ChOffset+64+9];\
336df25739fSMilanka Ringwald         MLA s32Hi,WIND_8_SUBBANDS_7_1,s16X[ChOffset+16+7],s32Hi;\
337df25739fSMilanka Ringwald         MLA s32Hi2,WIND_8_SUBBANDS_7_1,s16X[ChOffset+48+9],s32Hi2;\
338df25739fSMilanka Ringwald         MLA s32Hi,WIND_8_SUBBANDS_7_2,s16X[ChOffset+32+7],s32Hi;\
339df25739fSMilanka Ringwald         MLA s32Hi2,WIND_8_SUBBANDS_7_2,s16X[ChOffset+32+9],s32Hi2;\
340df25739fSMilanka Ringwald         MLA s32Hi,WIND_8_SUBBANDS_7_3,s16X[ChOffset+48+7],s32Hi;\
341df25739fSMilanka Ringwald         MLA s32Hi2,WIND_8_SUBBANDS_7_3,s16X[ChOffset+16+9],s32Hi2;\
342df25739fSMilanka Ringwald         MLA s32Hi,WIND_8_SUBBANDS_7_4,s16X[ChOffset+64+7],s32Hi;\
343df25739fSMilanka Ringwald         MLA s32Hi2,WIND_8_SUBBANDS_7_4,s16X[ChOffset+9],s32Hi2;\
344df25739fSMilanka Ringwald         MOV s32DCTY[7],s32Hi;\
345df25739fSMilanka Ringwald         MOV s32DCTY[9],s32Hi2;\
346df25739fSMilanka Ringwald     }\
347df25739fSMilanka Ringwald }
348df25739fSMilanka Ringwald #define WINDOW_ACCU_8_8 \
349df25739fSMilanka Ringwald {\
350df25739fSMilanka Ringwald     __asm\
351df25739fSMilanka Ringwald     {\
352df25739fSMilanka Ringwald         MUL s32Hi,WIND_8_SUBBANDS_8_0,(s16X[ChOffset+8]+s16X[ChOffset+8+64]);\
353df25739fSMilanka Ringwald         MLA s32Hi,WIND_8_SUBBANDS_8_1,(s16X[ChOffset+8+16]+s16X[ChOffset+8+64]),s32Hi;\
354df25739fSMilanka Ringwald         MLA s32Hi,WIND_8_SUBBANDS_8_2,s16X[ChOffset+8+32],s32Hi;\
355df25739fSMilanka Ringwald         MOV s32DCTY[8],s32Hi;\
356df25739fSMilanka Ringwald     }\
357df25739fSMilanka Ringwald }
358df25739fSMilanka Ringwald #define WINDOW_ACCU_4_0 \
359df25739fSMilanka Ringwald {\
360df25739fSMilanka Ringwald     __asm\
361df25739fSMilanka Ringwald     {\
362df25739fSMilanka Ringwald         MUL s32Hi,WIND_4_SUBBANDS_0_1,(s16X[ChOffset+8]-s16X[ChOffset+32]);\
363df25739fSMilanka Ringwald         MLA s32Hi,WIND_4_SUBBANDS_0_2,(s16X[ChOffset+16]-s16X[ChOffset+24]),s32Hi;\
364df25739fSMilanka Ringwald         MOV s32DCTY[0],s32Hi;\
365df25739fSMilanka Ringwald     }\
366df25739fSMilanka Ringwald }
367df25739fSMilanka Ringwald #define WINDOW_ACCU_4_1_7 \
368df25739fSMilanka Ringwald {\
369df25739fSMilanka Ringwald     __asm\
370df25739fSMilanka Ringwald     {\
371df25739fSMilanka Ringwald         MUL s32Hi,WIND_4_SUBBANDS_1_0,s16X[ChOffset+1];\
372df25739fSMilanka Ringwald         MUL s32Hi2,WIND_4_SUBBANDS_1_0,s16X[ChOffset+32+7];\
373df25739fSMilanka Ringwald         MLA s32Hi,WIND_4_SUBBANDS_1_1,s16X[ChOffset+8+1],s32Hi;\
374df25739fSMilanka Ringwald         MLA s32Hi2,WIND_4_SUBBANDS_1_1,s16X[ChOffset+24+7],s32Hi2;\
375df25739fSMilanka Ringwald         MLA s32Hi,WIND_4_SUBBANDS_1_2,s16X[ChOffset+16+1],s32Hi;\
376df25739fSMilanka Ringwald         MLA s32Hi2,WIND_4_SUBBANDS_1_2,s16X[ChOffset+16+7],s32Hi2;\
377df25739fSMilanka Ringwald         MLA s32Hi,WIND_4_SUBBANDS_1_3,s16X[ChOffset+24+1],s32Hi;\
378df25739fSMilanka Ringwald         MLA s32Hi2,WIND_4_SUBBANDS_1_3,s16X[ChOffset+8+7],s32Hi2;\
379df25739fSMilanka Ringwald         MLA s32Hi,WIND_4_SUBBANDS_1_4,s16X[ChOffset+32+1],s32Hi;\
380df25739fSMilanka Ringwald         MLA s32Hi2,WIND_4_SUBBANDS_1_4,s16X[ChOffset+7],s32Hi2;\
381df25739fSMilanka Ringwald         MOV s32DCTY[1],s32Hi;\
382df25739fSMilanka Ringwald         MOV s32DCTY[7],s32Hi2;\
383df25739fSMilanka Ringwald     }\
384df25739fSMilanka Ringwald }
385df25739fSMilanka Ringwald #define WINDOW_ACCU_4_2_6 \
386df25739fSMilanka Ringwald {\
387df25739fSMilanka Ringwald     __asm\
388df25739fSMilanka Ringwald     {\
389df25739fSMilanka Ringwald         MUL s32Hi,WIND_4_SUBBANDS_2_0,s16X[ChOffset+2];\
390df25739fSMilanka Ringwald         MUL s32Hi2,WIND_4_SUBBANDS_2_0,s16X[ChOffset+32+6];\
391df25739fSMilanka Ringwald         MLA s32Hi,WIND_4_SUBBANDS_2_1,s16X[ChOffset+8+2],s32Hi;\
392df25739fSMilanka Ringwald         MLA s32Hi2,WIND_4_SUBBANDS_2_1,s16X[ChOffset+24+6],s32Hi2;\
393df25739fSMilanka Ringwald         MLA s32Hi,WIND_4_SUBBANDS_2_2,s16X[ChOffset+16+2],s32Hi;\
394df25739fSMilanka Ringwald         MLA s32Hi2,WIND_4_SUBBANDS_2_2,s16X[ChOffset+16+6],s32Hi2;\
395df25739fSMilanka Ringwald         MLA s32Hi,WIND_4_SUBBANDS_2_3,s16X[ChOffset+24+2],s32Hi;\
396df25739fSMilanka Ringwald         MLA s32Hi2,WIND_4_SUBBANDS_2_3,s16X[ChOffset+8+6],s32Hi2;\
397df25739fSMilanka Ringwald         MLA s32Hi,WIND_4_SUBBANDS_2_4,s16X[ChOffset+32+2],s32Hi;\
398df25739fSMilanka Ringwald         MLA s32Hi2,WIND_4_SUBBANDS_2_4,s16X[ChOffset+6],s32Hi2;\
399df25739fSMilanka Ringwald         MOV s32DCTY[2],s32Hi;\
400df25739fSMilanka Ringwald         MOV s32DCTY[6],s32Hi2;\
401df25739fSMilanka Ringwald     }\
402df25739fSMilanka Ringwald }
403df25739fSMilanka Ringwald #define WINDOW_ACCU_4_3_5 \
404df25739fSMilanka Ringwald {\
405df25739fSMilanka Ringwald     __asm\
406df25739fSMilanka Ringwald     {\
407df25739fSMilanka Ringwald         MUL s32Hi,WIND_4_SUBBANDS_3_0,s16X[ChOffset+3];\
408df25739fSMilanka Ringwald         MUL s32Hi2,WIND_4_SUBBANDS_3_0,s16X[ChOffset+32+5];\
409df25739fSMilanka Ringwald         MLA s32Hi,WIND_4_SUBBANDS_3_1,s16X[ChOffset+8+3],s32Hi;\
410df25739fSMilanka Ringwald         MLA s32Hi2,WIND_4_SUBBANDS_3_1,s16X[ChOffset+24+5],s32Hi2;\
411df25739fSMilanka Ringwald         MLA s32Hi,WIND_4_SUBBANDS_3_2,s16X[ChOffset+16+3],s32Hi;\
412df25739fSMilanka Ringwald         MLA s32Hi2,WIND_4_SUBBANDS_3_2,s16X[ChOffset+16+5],s32Hi2;\
413df25739fSMilanka Ringwald         MLA s32Hi,WIND_4_SUBBANDS_3_3,s16X[ChOffset+24+3],s32Hi;\
414df25739fSMilanka Ringwald         MLA s32Hi2,WIND_4_SUBBANDS_3_3,s16X[ChOffset+8+5],s32Hi2;\
415df25739fSMilanka Ringwald         MLA s32Hi,WIND_4_SUBBANDS_3_4,s16X[ChOffset+32+3],s32Hi;\
416df25739fSMilanka Ringwald         MLA s32Hi2,WIND_4_SUBBANDS_3_4,s16X[ChOffset+5],s32Hi2;\
417df25739fSMilanka Ringwald         MOV s32DCTY[3],s32Hi;\
418df25739fSMilanka Ringwald         MOV s32DCTY[5],s32Hi2;\
419df25739fSMilanka Ringwald     }\
420df25739fSMilanka Ringwald }
421df25739fSMilanka Ringwald #define WINDOW_ACCU_4_4 \
422df25739fSMilanka Ringwald {\
423df25739fSMilanka Ringwald     __asm\
424df25739fSMilanka Ringwald     {\
425df25739fSMilanka Ringwald         MUL s32Hi,WIND_4_SUBBANDS_4_0,(s16X[ChOffset+4]+s16X[ChOffset+4+32]);\
426df25739fSMilanka Ringwald         MLA s32Hi,WIND_4_SUBBANDS_4_1,(s16X[ChOffset+4+8]+s16X[ChOffset+4+24]),s32Hi;\
427df25739fSMilanka Ringwald         MLA s32Hi,WIND_4_SUBBANDS_4_2,s16X[ChOffset+4+16],s32Hi;\
428df25739fSMilanka Ringwald         MOV s32DCTY[4],s32Hi;\
429df25739fSMilanka Ringwald     }\
430df25739fSMilanka Ringwald }
431df25739fSMilanka Ringwald 
432df25739fSMilanka Ringwald #define WINDOW_PARTIAL_4 \
433df25739fSMilanka Ringwald {\
434df25739fSMilanka Ringwald     WINDOW_ACCU_4_0;     WINDOW_ACCU_4_1_7;\
435df25739fSMilanka Ringwald     WINDOW_ACCU_4_2_6;   WINDOW_ACCU_4_3_5;\
436df25739fSMilanka Ringwald     WINDOW_ACCU_4_4;\
437df25739fSMilanka Ringwald }
438df25739fSMilanka Ringwald 
439df25739fSMilanka Ringwald #define WINDOW_PARTIAL_8 \
440df25739fSMilanka Ringwald {\
441df25739fSMilanka Ringwald     WINDOW_ACCU_8_0;     WINDOW_ACCU_8_1_15;\
442df25739fSMilanka Ringwald     WINDOW_ACCU_8_2_14;  WINDOW_ACCU_8_3_13;\
443df25739fSMilanka Ringwald     WINDOW_ACCU_8_4_12;  WINDOW_ACCU_8_5_11;\
444df25739fSMilanka Ringwald     WINDOW_ACCU_8_6_10;  WINDOW_ACCU_8_7_9;\
445df25739fSMilanka Ringwald     WINDOW_ACCU_8_8;\
446df25739fSMilanka Ringwald }
447df25739fSMilanka Ringwald 
448df25739fSMilanka Ringwald #else
449df25739fSMilanka Ringwald #if (SBC_IPAQ_OPT==TRUE)
450df25739fSMilanka Ringwald 
451df25739fSMilanka Ringwald #if (SBC_IS_64_MULT_IN_WINDOW_ACCU == TRUE)
452df25739fSMilanka Ringwald #define WINDOW_ACCU_8_0 \
453df25739fSMilanka Ringwald {\
454df25739fSMilanka Ringwald     s64Temp=(SINT64)WIND_8_SUBBANDS_0_1*(SINT64)(s16X[ChOffset+16]-s16X[ChOffset+64]);\
455df25739fSMilanka Ringwald     s64Temp+=(SINT64)WIND_8_SUBBANDS_0_2*(SINT64)(s16X[ChOffset+32]-s16X[ChOffset+48]);\
456df25739fSMilanka Ringwald     s32DCTY[0]=(SINT32)(s64Temp>>16);\
457df25739fSMilanka Ringwald }
458df25739fSMilanka Ringwald #define WINDOW_ACCU_8_1_15 \
459df25739fSMilanka Ringwald {\
460df25739fSMilanka Ringwald     s64Temp=(SINT64)WIND_8_SUBBANDS_1_0*(SINT64)s16X[ChOffset+1];\
461df25739fSMilanka Ringwald     s64Temp2=(SINT64)WIND_8_SUBBANDS_1_0*(SINT64)s16X[ChOffset+64+15];\
462df25739fSMilanka Ringwald     s64Temp+=(SINT64)WIND_8_SUBBANDS_1_1*(SINT64)s16X[ChOffset+16+1];\
463df25739fSMilanka Ringwald     s64Temp2+=(SINT64)WIND_8_SUBBANDS_1_1*(SINT64)s16X[ChOffset+48+15];\
464df25739fSMilanka Ringwald     s64Temp+=(SINT64)WIND_8_SUBBANDS_1_2*(SINT64)s16X[ChOffset+32+1];\
465df25739fSMilanka Ringwald     s64Temp2+=(SINT64)WIND_8_SUBBANDS_1_2*(SINT64)s16X[ChOffset+32+15];\
466df25739fSMilanka Ringwald     s64Temp+=(SINT64)WIND_8_SUBBANDS_1_3*(SINT64)s16X[ChOffset+48+1];\
467df25739fSMilanka Ringwald     s64Temp2+=(SINT64)WIND_8_SUBBANDS_1_3*(SINT64)s16X[ChOffset+16+15];\
468df25739fSMilanka Ringwald     s64Temp+=(SINT64)WIND_8_SUBBANDS_1_4*(SINT64)s16X[ChOffset+64+1];\
469df25739fSMilanka Ringwald     s64Temp2+=(SINT64)WIND_8_SUBBANDS_1_4*(SINT64)s16X[ChOffset+15];\
470df25739fSMilanka Ringwald     s32DCTY[1]=(SINT32)(s64Temp>>16);\
471df25739fSMilanka Ringwald     s32DCTY[15]=(SINT32)(s64Temp2>>16);\
472df25739fSMilanka Ringwald }
473df25739fSMilanka Ringwald #define WINDOW_ACCU_8_2_14 \
474df25739fSMilanka Ringwald {\
475df25739fSMilanka Ringwald     s64Temp=(SINT64)WIND_8_SUBBANDS_2_0*(SINT64)s16X[ChOffset+2];\
476df25739fSMilanka Ringwald     s64Temp2=(SINT64)WIND_8_SUBBANDS_2_0*(SINT64)s16X[ChOffset+64+14];\
477df25739fSMilanka Ringwald     s64Temp+=(SINT64)WIND_8_SUBBANDS_2_1*(SINT64)s16X[ChOffset+16+2];\
478df25739fSMilanka Ringwald     s64Temp2+=(SINT64)WIND_8_SUBBANDS_2_1*(SINT64)s16X[ChOffset+48+14];\
479df25739fSMilanka Ringwald     s64Temp+=(SINT64)WIND_8_SUBBANDS_2_2*(SINT64)s16X[ChOffset+32+2];\
480df25739fSMilanka Ringwald     s64Temp2+=(SINT64)WIND_8_SUBBANDS_2_2*(SINT64)s16X[ChOffset+32+14];\
481df25739fSMilanka Ringwald     s64Temp+=(SINT64)WIND_8_SUBBANDS_2_3*(SINT64)s16X[ChOffset+48+2];\
482df25739fSMilanka Ringwald     s64Temp2+=(SINT64)WIND_8_SUBBANDS_2_3*(SINT64)s16X[ChOffset+16+14];\
483df25739fSMilanka Ringwald     s64Temp+=(SINT64)WIND_8_SUBBANDS_2_4*(SINT64)s16X[ChOffset+64+2];\
484df25739fSMilanka Ringwald     s64Temp2+=(SINT64)WIND_8_SUBBANDS_2_4*(SINT64)s16X[ChOffset+14];\
485df25739fSMilanka Ringwald     s32DCTY[2]=(SINT32)(s64Temp>>16);\
486df25739fSMilanka Ringwald     s32DCTY[14]=(SINT32)(s64Temp2>>16);\
487df25739fSMilanka Ringwald }
488df25739fSMilanka Ringwald #define WINDOW_ACCU_8_3_13 \
489df25739fSMilanka Ringwald {\
490df25739fSMilanka Ringwald     s64Temp=(SINT64)WIND_8_SUBBANDS_3_0*(SINT64)s16X[ChOffset+3];\
491df25739fSMilanka Ringwald     s64Temp2=(SINT64)WIND_8_SUBBANDS_3_0*(SINT64)s16X[ChOffset+64+13];\
492df25739fSMilanka Ringwald     s64Temp+=(SINT64)WIND_8_SUBBANDS_3_1*(SINT64)s16X[ChOffset+16+3];\
493df25739fSMilanka Ringwald     s64Temp2+=(SINT64)WIND_8_SUBBANDS_3_1*(SINT64)s16X[ChOffset+48+13];\
494df25739fSMilanka Ringwald     s64Temp+=(SINT64)WIND_8_SUBBANDS_3_2*(SINT64)s16X[ChOffset+32+3];\
495df25739fSMilanka Ringwald     s64Temp2+=(SINT64)WIND_8_SUBBANDS_3_2*(SINT64)s16X[ChOffset+32+13];\
496df25739fSMilanka Ringwald     s64Temp+=(SINT64)WIND_8_SUBBANDS_3_3*(SINT64)s16X[ChOffset+48+3];\
497df25739fSMilanka Ringwald     s64Temp2+=(SINT64)WIND_8_SUBBANDS_3_3*(SINT64)s16X[ChOffset+16+13];\
498df25739fSMilanka Ringwald     s64Temp+=(SINT64)WIND_8_SUBBANDS_3_4*(SINT64)s16X[ChOffset+64+3];\
499df25739fSMilanka Ringwald     s64Temp2+=(SINT64)WIND_8_SUBBANDS_3_4*(SINT64)s16X[ChOffset+13];\
500df25739fSMilanka Ringwald     s32DCTY[3]=(SINT32)(s64Temp>>16);\
501df25739fSMilanka Ringwald     s32DCTY[13]=(SINT32)(s64Temp2>>16);\
502df25739fSMilanka Ringwald }
503df25739fSMilanka Ringwald #define WINDOW_ACCU_8_4_12 \
504df25739fSMilanka Ringwald {\
505df25739fSMilanka Ringwald     s64Temp=(SINT64)WIND_8_SUBBANDS_4_0*(SINT64)s16X[ChOffset+4];\
506df25739fSMilanka Ringwald     s64Temp2=(SINT64)WIND_8_SUBBANDS_4_0*(SINT64)s16X[ChOffset+64+12];\
507df25739fSMilanka Ringwald     s64Temp+=(SINT64)WIND_8_SUBBANDS_4_1*(SINT64)s16X[ChOffset+16+4];\
508df25739fSMilanka Ringwald     s64Temp2+=(SINT64)WIND_8_SUBBANDS_4_1*(SINT64)s16X[ChOffset+48+12];\
509df25739fSMilanka Ringwald     s64Temp+=(SINT64)WIND_8_SUBBANDS_4_2*(SINT64)s16X[ChOffset+32+4];\
510df25739fSMilanka Ringwald     s64Temp2+=(SINT64)WIND_8_SUBBANDS_4_2*(SINT64)s16X[ChOffset+32+12];\
511df25739fSMilanka Ringwald     s64Temp+=(SINT64)WIND_8_SUBBANDS_4_3*(SINT64)s16X[ChOffset+48+4];\
512df25739fSMilanka Ringwald     s64Temp2+=(SINT64)WIND_8_SUBBANDS_4_3*(SINT64)s16X[ChOffset+16+12];\
513df25739fSMilanka Ringwald     s64Temp+=(SINT64)WIND_8_SUBBANDS_4_4*(SINT64)s16X[ChOffset+64+4];\
514df25739fSMilanka Ringwald     s64Temp2+=(SINT64)WIND_8_SUBBANDS_4_4*(SINT64)s16X[ChOffset+12];\
515df25739fSMilanka Ringwald     s32DCTY[4]=(SINT32)(s64Temp>>16);\
516df25739fSMilanka Ringwald     s32DCTY[12]=(SINT32)(s64Temp2>>16);\
517df25739fSMilanka Ringwald }
518df25739fSMilanka Ringwald #define WINDOW_ACCU_8_5_11 \
519df25739fSMilanka Ringwald {\
520df25739fSMilanka Ringwald     s64Temp=(SINT64)WIND_8_SUBBANDS_5_0*(SINT64)s16X[ChOffset+5];\
521df25739fSMilanka Ringwald     s64Temp2=(SINT64)WIND_8_SUBBANDS_5_0*(SINT64)s16X[ChOffset+64+11];\
522df25739fSMilanka Ringwald     s64Temp+=(SINT64)WIND_8_SUBBANDS_5_1*(SINT64)s16X[ChOffset+16+5];\
523df25739fSMilanka Ringwald     s64Temp2+=(SINT64)WIND_8_SUBBANDS_5_1*(SINT64)s16X[ChOffset+48+11];\
524df25739fSMilanka Ringwald     s64Temp+=(SINT64)WIND_8_SUBBANDS_5_2*(SINT64)s16X[ChOffset+32+5];\
525df25739fSMilanka Ringwald     s64Temp2+=(SINT64)WIND_8_SUBBANDS_5_2*(SINT64)s16X[ChOffset+32+11];\
526df25739fSMilanka Ringwald     s64Temp+=(SINT64)WIND_8_SUBBANDS_5_3*(SINT64)s16X[ChOffset+48+5];\
527df25739fSMilanka Ringwald     s64Temp2+=(SINT64)WIND_8_SUBBANDS_5_3*(SINT64)s16X[ChOffset+16+11];\
528df25739fSMilanka Ringwald     s64Temp+=(SINT64)WIND_8_SUBBANDS_5_4*(SINT64)s16X[ChOffset+64+5];\
529df25739fSMilanka Ringwald     s64Temp2+=(SINT64)WIND_8_SUBBANDS_5_4*(SINT64)s16X[ChOffset+11];\
530df25739fSMilanka Ringwald     s32DCTY[5]=(SINT32)(s64Temp>>16);\
531df25739fSMilanka Ringwald     s32DCTY[11]=(SINT32)(s64Temp2>>16);\
532df25739fSMilanka Ringwald }
533df25739fSMilanka Ringwald #define WINDOW_ACCU_8_6_10 \
534df25739fSMilanka Ringwald {\
535df25739fSMilanka Ringwald     s64Temp=(SINT64)WIND_8_SUBBANDS_6_0*(SINT64)s16X[ChOffset+6];\
536df25739fSMilanka Ringwald     s64Temp2=(SINT64)WIND_8_SUBBANDS_6_0*(SINT64)s16X[ChOffset+64+10];\
537df25739fSMilanka Ringwald     s64Temp+=(SINT64)WIND_8_SUBBANDS_6_1*(SINT64)s16X[ChOffset+16+6];\
538df25739fSMilanka Ringwald     s64Temp2+=(SINT64)WIND_8_SUBBANDS_6_1*(SINT64)s16X[ChOffset+48+10];\
539df25739fSMilanka Ringwald     s64Temp+=(SINT64)WIND_8_SUBBANDS_6_2*(SINT64)s16X[ChOffset+32+6];\
540df25739fSMilanka Ringwald     s64Temp2+=(SINT64)WIND_8_SUBBANDS_6_2*(SINT64)s16X[ChOffset+32+10];\
541df25739fSMilanka Ringwald     s64Temp+=(SINT64)WIND_8_SUBBANDS_6_3*(SINT64)s16X[ChOffset+48+6];\
542df25739fSMilanka Ringwald     s64Temp2+=(SINT64)WIND_8_SUBBANDS_6_3*(SINT64)s16X[ChOffset+16+10];\
543df25739fSMilanka Ringwald     s64Temp+=(SINT64)WIND_8_SUBBANDS_6_4*(SINT64)s16X[ChOffset+64+6];\
544df25739fSMilanka Ringwald     s64Temp2+=(SINT64)WIND_8_SUBBANDS_6_4*(SINT64)s16X[ChOffset+10];\
545df25739fSMilanka Ringwald     s32DCTY[6]=(SINT32)(s64Temp>>16);\
546df25739fSMilanka Ringwald     s32DCTY[10]=(SINT32)(s64Temp2>>16);\
547df25739fSMilanka Ringwald }
548df25739fSMilanka Ringwald #define WINDOW_ACCU_8_7_9 \
549df25739fSMilanka Ringwald {\
550df25739fSMilanka Ringwald     s64Temp=(SINT64)WIND_8_SUBBANDS_7_0*(SINT64)s16X[ChOffset+7];\
551df25739fSMilanka Ringwald     s64Temp2=(SINT64)WIND_8_SUBBANDS_7_0*(SINT64)s16X[ChOffset+64+9];\
552df25739fSMilanka Ringwald     s64Temp+=(SINT64)WIND_8_SUBBANDS_7_1*(SINT64)s16X[ChOffset+16+7];\
553df25739fSMilanka Ringwald     s64Temp2+=(SINT64)WIND_8_SUBBANDS_7_1*(SINT64)s16X[ChOffset+48+9];\
554df25739fSMilanka Ringwald     s64Temp+=(SINT64)WIND_8_SUBBANDS_7_2*(SINT64)s16X[ChOffset+32+7];\
555df25739fSMilanka Ringwald     s64Temp2+=(SINT64)WIND_8_SUBBANDS_7_2*(SINT64)s16X[ChOffset+32+9];\
556df25739fSMilanka Ringwald     s64Temp+=(SINT64)WIND_8_SUBBANDS_7_3*(SINT64)s16X[ChOffset+48+7];\
557df25739fSMilanka Ringwald     s64Temp2+=(SINT64)WIND_8_SUBBANDS_7_3*(SINT64)s16X[ChOffset+16+9];\
558df25739fSMilanka Ringwald     s64Temp+=(SINT64)WIND_8_SUBBANDS_7_4*(SINT64)s16X[ChOffset+64+7];\
559df25739fSMilanka Ringwald     s64Temp2+=(SINT64)WIND_8_SUBBANDS_7_4*(SINT64)s16X[ChOffset+9];\
560df25739fSMilanka Ringwald     s32DCTY[7]=(SINT32)(s64Temp>>16);\
561df25739fSMilanka Ringwald     s32DCTY[9]=(SINT32)(s64Temp2>>16);\
562df25739fSMilanka Ringwald }
563df25739fSMilanka Ringwald #define WINDOW_ACCU_8_8 \
564df25739fSMilanka Ringwald {\
565df25739fSMilanka Ringwald     s64Temp=(SINT64)WIND_8_SUBBANDS_8_0*(SINT64)(s16X[ChOffset+8]+s16X[ChOffset+64+8]);\
566df25739fSMilanka Ringwald     s64Temp+=(SINT64)WIND_8_SUBBANDS_8_1*(SINT64)(s16X[ChOffset+16+8]+s16X[ChOffset+48+8]);\
567df25739fSMilanka Ringwald     s64Temp+=(SINT64)WIND_8_SUBBANDS_8_2*(SINT64)s16X[ChOffset+32+8];\
568df25739fSMilanka Ringwald     s32DCTY[8]=(SINT32)(s64Temp>>16);\
569df25739fSMilanka Ringwald }
570df25739fSMilanka Ringwald #define WINDOW_ACCU_4_0 \
571df25739fSMilanka Ringwald {\
572df25739fSMilanka Ringwald     s64Temp=(SINT64)WIND_4_SUBBANDS_0_1*(SINT64)(s16X[ChOffset+8]-s16X[ChOffset+32]);\
573df25739fSMilanka Ringwald     s64Temp+=(SINT64)WIND_4_SUBBANDS_0_2*(SINT64)(s16X[ChOffset+16]-s16X[ChOffset+24]);\
574df25739fSMilanka Ringwald     s32DCTY[0]=(SINT32)(s64Temp>>16);\
575df25739fSMilanka Ringwald }
576df25739fSMilanka Ringwald #define WINDOW_ACCU_4_1_7 \
577df25739fSMilanka Ringwald {\
578df25739fSMilanka Ringwald     s64Temp=(SINT64)WIND_4_SUBBANDS_1_0*(SINT64)s16X[ChOffset+1];\
579df25739fSMilanka Ringwald     s64Temp2=(SINT64)WIND_4_SUBBANDS_1_0*(SINT64)s16X[ChOffset+32+7];\
580df25739fSMilanka Ringwald     s64Temp+=(SINT64)WIND_4_SUBBANDS_1_1*(SINT64)s16X[ChOffset+8+1];\
581df25739fSMilanka Ringwald     s64Temp2+=(SINT64)WIND_4_SUBBANDS_1_1*(SINT64)s16X[ChOffset+24+7];\
582df25739fSMilanka Ringwald     s64Temp+=(SINT64)WIND_4_SUBBANDS_1_2*(SINT64)s16X[ChOffset+16+1];\
583df25739fSMilanka Ringwald     s64Temp2+=(SINT64)WIND_4_SUBBANDS_1_2*(SINT64)s16X[ChOffset+16+7];\
584df25739fSMilanka Ringwald     s64Temp+=(SINT64)WIND_4_SUBBANDS_1_3*(SINT64)s16X[ChOffset+24+1];\
585df25739fSMilanka Ringwald     s64Temp2+=(SINT64)WIND_4_SUBBANDS_1_3*(SINT64)s16X[ChOffset+8+7];\
586df25739fSMilanka Ringwald     s64Temp+=(SINT64)WIND_4_SUBBANDS_1_4*(SINT64)s16X[ChOffset+32+1];\
587df25739fSMilanka Ringwald     s64Temp2+=(SINT64)WIND_4_SUBBANDS_1_4*(SINT64)s16X[ChOffset+7];\
588df25739fSMilanka Ringwald     s32DCTY[1]=(SINT32)(s64Temp>>16);\
589df25739fSMilanka Ringwald     s32DCTY[7]=(SINT32)(s64Temp2>>16);\
590df25739fSMilanka Ringwald }
591df25739fSMilanka Ringwald #define WINDOW_ACCU_4_2_6 \
592df25739fSMilanka Ringwald {\
593df25739fSMilanka Ringwald     s64Temp=(SINT64)WIND_4_SUBBANDS_2_0*(SINT64)s16X[ChOffset+2];\
594df25739fSMilanka Ringwald     s64Temp2=(SINT64)WIND_4_SUBBANDS_2_0*(SINT64)s16X[ChOffset+32+6];\
595df25739fSMilanka Ringwald     s64Temp+=(SINT64)WIND_4_SUBBANDS_2_1*(SINT64)s16X[ChOffset+8+2];\
596df25739fSMilanka Ringwald     s64Temp2+=(SINT64)WIND_4_SUBBANDS_2_1*(SINT64)s16X[ChOffset+24+6];\
597df25739fSMilanka Ringwald     s64Temp+=(SINT64)WIND_4_SUBBANDS_2_2*(SINT64)s16X[ChOffset+16+2];\
598df25739fSMilanka Ringwald     s64Temp2+=(SINT64)WIND_4_SUBBANDS_2_2*(SINT64)s16X[ChOffset+16+6];\
599df25739fSMilanka Ringwald     s64Temp+=(SINT64)WIND_4_SUBBANDS_2_3*(SINT64)s16X[ChOffset+24+2];\
600df25739fSMilanka Ringwald     s64Temp2+=(SINT64)WIND_4_SUBBANDS_2_3*(SINT64)s16X[ChOffset+8+6];\
601df25739fSMilanka Ringwald     s64Temp+=(SINT64)WIND_4_SUBBANDS_2_4*(SINT64)s16X[ChOffset+32+2];\
602df25739fSMilanka Ringwald     s64Temp2+=(SINT64)WIND_4_SUBBANDS_2_4*(SINT64)s16X[ChOffset+6];\
603df25739fSMilanka Ringwald     s32DCTY[2]=(SINT32)(s64Temp>>16);\
604df25739fSMilanka Ringwald     s32DCTY[6]=(SINT32)(s64Temp2>>16);\
605df25739fSMilanka Ringwald }
606df25739fSMilanka Ringwald #define WINDOW_ACCU_4_3_5 \
607df25739fSMilanka Ringwald {\
608df25739fSMilanka Ringwald     s64Temp=(SINT64)WIND_4_SUBBANDS_3_0*(SINT64)s16X[ChOffset+3];\
609df25739fSMilanka Ringwald     s64Temp2=(SINT64)WIND_4_SUBBANDS_3_0*(SINT64)s16X[ChOffset+32+5];\
610df25739fSMilanka Ringwald     s64Temp+=(SINT64)WIND_4_SUBBANDS_3_1*(SINT64)s16X[ChOffset+8+3];\
611df25739fSMilanka Ringwald     s64Temp2+=(SINT64)WIND_4_SUBBANDS_3_1*(SINT64)s16X[ChOffset+24+5];\
612df25739fSMilanka Ringwald     s64Temp+=(SINT64)WIND_4_SUBBANDS_3_2*(SINT64)s16X[ChOffset+16+3];\
613df25739fSMilanka Ringwald     s64Temp2+=(SINT64)WIND_4_SUBBANDS_3_2*(SINT64)s16X[ChOffset+16+5];\
614df25739fSMilanka Ringwald     s64Temp+=(SINT64)WIND_4_SUBBANDS_3_3*(SINT64)s16X[ChOffset+24+3];\
615df25739fSMilanka Ringwald     s64Temp2+=(SINT64)WIND_4_SUBBANDS_3_3*(SINT64)s16X[ChOffset+8+5];\
616df25739fSMilanka Ringwald     s64Temp+=(SINT64)WIND_4_SUBBANDS_3_4*(SINT64)s16X[ChOffset+32+3];\
617df25739fSMilanka Ringwald     s64Temp2+=(SINT64)WIND_4_SUBBANDS_3_4*(SINT64)s16X[ChOffset+5];\
618df25739fSMilanka Ringwald     s32DCTY[3]=(SINT32)(s64Temp>>16);\
619df25739fSMilanka Ringwald     s32DCTY[5]=(SINT32)(s64Temp2>>16);\
620df25739fSMilanka Ringwald }
621df25739fSMilanka Ringwald 
622df25739fSMilanka Ringwald #define WINDOW_ACCU_4_4 \
623df25739fSMilanka Ringwald {\
624df25739fSMilanka Ringwald     s64Temp=(SINT64)WIND_4_SUBBANDS_4_0*(SINT64)(s16X[ChOffset+4]+s16X[ChOffset+4+32]);\
625df25739fSMilanka Ringwald     s64Temp+=(SINT64)WIND_4_SUBBANDS_4_1*(SINT64)(s16X[ChOffset+4+8]+s16X[ChOffset+4+24]);\
626df25739fSMilanka Ringwald     s64Temp+=(SINT64)WIND_4_SUBBANDS_4_2*(SINT64)s16X[ChOffset+4+16];\
627df25739fSMilanka Ringwald     s32DCTY[4]=(SINT32)(s64Temp>>16);\
628df25739fSMilanka Ringwald }
629df25739fSMilanka Ringwald #else /* SBC_IS_64_MULT_IN_WINDOW_ACCU == FALSE */
630df25739fSMilanka Ringwald #define WINDOW_ACCU_8_0 \
631df25739fSMilanka Ringwald {\
632df25739fSMilanka Ringwald     s32Temp=(SINT32)WIND_8_SUBBANDS_0_1*(SINT32)(s16X[ChOffset+16]-s16X[ChOffset+64]);\
633df25739fSMilanka Ringwald     s32Temp+=(SINT32)WIND_8_SUBBANDS_0_2*(SINT32)(s16X[ChOffset+32]-s16X[ChOffset+48]);\
634df25739fSMilanka Ringwald     s32DCTY[0]=(SINT32)s32Temp;\
635df25739fSMilanka Ringwald }
636df25739fSMilanka Ringwald #define WINDOW_ACCU_8_1_15 \
637df25739fSMilanka Ringwald {\
638df25739fSMilanka Ringwald     s32Temp=(SINT32)WIND_8_SUBBANDS_1_0*(SINT32)s16X[ChOffset+1];\
639df25739fSMilanka Ringwald     s32Temp2=(SINT32)WIND_8_SUBBANDS_1_0*(SINT32)s16X[ChOffset+64+15];\
640df25739fSMilanka Ringwald     s32Temp+=(SINT32)WIND_8_SUBBANDS_1_1*(SINT32)s16X[ChOffset+16+1];\
641df25739fSMilanka Ringwald     s32Temp2+=(SINT32)WIND_8_SUBBANDS_1_1*(SINT32)s16X[ChOffset+48+15];\
642df25739fSMilanka Ringwald     s32Temp+=(SINT32)WIND_8_SUBBANDS_1_2*(SINT32)s16X[ChOffset+32+1];\
643df25739fSMilanka Ringwald     s32Temp2+=(SINT32)WIND_8_SUBBANDS_1_2*(SINT32)s16X[ChOffset+32+15];\
644df25739fSMilanka Ringwald     s32Temp+=(SINT32)WIND_8_SUBBANDS_1_3*(SINT32)s16X[ChOffset+48+1];\
645df25739fSMilanka Ringwald     s32Temp2+=(SINT32)WIND_8_SUBBANDS_1_3*(SINT32)s16X[ChOffset+16+15];\
646df25739fSMilanka Ringwald     s32Temp+=(SINT32)WIND_8_SUBBANDS_1_4*(SINT32)s16X[ChOffset+64+1];\
647df25739fSMilanka Ringwald     s32Temp2+=(SINT32)WIND_8_SUBBANDS_1_4*(SINT32)s16X[ChOffset+15];\
648df25739fSMilanka Ringwald     s32DCTY[1]=(SINT32)s32Temp;\
649df25739fSMilanka Ringwald     s32DCTY[15]=(SINT32)s32Temp2;\
650df25739fSMilanka Ringwald }
651df25739fSMilanka Ringwald #define WINDOW_ACCU_8_2_14 \
652df25739fSMilanka Ringwald {\
653df25739fSMilanka Ringwald     s32Temp=(SINT32)WIND_8_SUBBANDS_2_0*(SINT32)s16X[ChOffset+2];\
654df25739fSMilanka Ringwald     s32Temp2=(SINT32)WIND_8_SUBBANDS_2_0*(SINT32)s16X[ChOffset+64+14];\
655df25739fSMilanka Ringwald     s32Temp+=(SINT32)WIND_8_SUBBANDS_2_1*(SINT32)s16X[ChOffset+16+2];\
656df25739fSMilanka Ringwald     s32Temp2+=(SINT32)WIND_8_SUBBANDS_2_1*(SINT32)s16X[ChOffset+48+14];\
657df25739fSMilanka Ringwald     s32Temp+=(SINT32)WIND_8_SUBBANDS_2_2*(SINT32)s16X[ChOffset+32+2];\
658df25739fSMilanka Ringwald     s32Temp2+=(SINT32)WIND_8_SUBBANDS_2_2*(SINT32)s16X[ChOffset+32+14];\
659df25739fSMilanka Ringwald     s32Temp+=(SINT32)WIND_8_SUBBANDS_2_3*(SINT32)s16X[ChOffset+48+2];\
660df25739fSMilanka Ringwald     s32Temp2+=(SINT32)WIND_8_SUBBANDS_2_3*(SINT32)s16X[ChOffset+16+14];\
661df25739fSMilanka Ringwald     s32Temp+=(SINT32)WIND_8_SUBBANDS_2_4*(SINT32)s16X[ChOffset+64+2];\
662df25739fSMilanka Ringwald     s32Temp2+=(SINT32)WIND_8_SUBBANDS_2_4*(SINT32)s16X[ChOffset+14];\
663df25739fSMilanka Ringwald     s32DCTY[2]=(SINT32)s32Temp;\
664df25739fSMilanka Ringwald     s32DCTY[14]=(SINT32)s32Temp2;\
665df25739fSMilanka Ringwald }
666df25739fSMilanka Ringwald #define WINDOW_ACCU_8_3_13 \
667df25739fSMilanka Ringwald {\
668df25739fSMilanka Ringwald     s32Temp=(SINT32)WIND_8_SUBBANDS_3_0*(SINT32)s16X[ChOffset+3];\
669df25739fSMilanka Ringwald     s32Temp2=(SINT32)WIND_8_SUBBANDS_3_0*(SINT32)s16X[ChOffset+64+13];\
670df25739fSMilanka Ringwald     s32Temp+=(SINT32)WIND_8_SUBBANDS_3_1*(SINT32)s16X[ChOffset+16+3];\
671df25739fSMilanka Ringwald     s32Temp2+=(SINT32)WIND_8_SUBBANDS_3_1*(SINT32)s16X[ChOffset+48+13];\
672df25739fSMilanka Ringwald     s32Temp+=(SINT32)WIND_8_SUBBANDS_3_2*(SINT32)s16X[ChOffset+32+3];\
673df25739fSMilanka Ringwald     s32Temp2+=(SINT32)WIND_8_SUBBANDS_3_2*(SINT32)s16X[ChOffset+32+13];\
674df25739fSMilanka Ringwald     s32Temp+=(SINT32)WIND_8_SUBBANDS_3_3*(SINT32)s16X[ChOffset+48+3];\
675df25739fSMilanka Ringwald     s32Temp2+=(SINT32)WIND_8_SUBBANDS_3_3*(SINT32)s16X[ChOffset+16+13];\
676df25739fSMilanka Ringwald     s32Temp+=(SINT32)WIND_8_SUBBANDS_3_4*(SINT32)s16X[ChOffset+64+3];\
677df25739fSMilanka Ringwald     s32Temp2+=(SINT32)WIND_8_SUBBANDS_3_4*(SINT32)s16X[ChOffset+13];\
678df25739fSMilanka Ringwald     s32DCTY[3]=(SINT32)s32Temp;\
679df25739fSMilanka Ringwald     s32DCTY[13]=(SINT32)s32Temp2;\
680df25739fSMilanka Ringwald }
681df25739fSMilanka Ringwald #define WINDOW_ACCU_8_4_12 \
682df25739fSMilanka Ringwald {\
683df25739fSMilanka Ringwald     s32Temp=(SINT32)WIND_8_SUBBANDS_4_0*(SINT32)s16X[ChOffset+4];\
684df25739fSMilanka Ringwald     s32Temp2=(SINT32)WIND_8_SUBBANDS_4_0*(SINT32)s16X[ChOffset+64+12];\
685df25739fSMilanka Ringwald     s32Temp+=(SINT32)WIND_8_SUBBANDS_4_1*(SINT32)s16X[ChOffset+16+4];\
686df25739fSMilanka Ringwald     s32Temp2+=(SINT32)WIND_8_SUBBANDS_4_1*(SINT32)s16X[ChOffset+48+12];\
687df25739fSMilanka Ringwald     s32Temp+=(SINT32)WIND_8_SUBBANDS_4_2*(SINT32)s16X[ChOffset+32+4];\
688df25739fSMilanka Ringwald     s32Temp2+=(SINT32)WIND_8_SUBBANDS_4_2*(SINT32)s16X[ChOffset+32+12];\
689df25739fSMilanka Ringwald     s32Temp+=(SINT32)WIND_8_SUBBANDS_4_3*(SINT32)s16X[ChOffset+48+4];\
690df25739fSMilanka Ringwald     s32Temp2+=(SINT32)WIND_8_SUBBANDS_4_3*(SINT32)s16X[ChOffset+16+12];\
691df25739fSMilanka Ringwald     s32Temp+=(SINT32)WIND_8_SUBBANDS_4_4*(SINT32)s16X[ChOffset+64+4];\
692df25739fSMilanka Ringwald     s32Temp2+=(SINT32)WIND_8_SUBBANDS_4_4*(SINT32)s16X[ChOffset+12];\
693df25739fSMilanka Ringwald     s32DCTY[4]=(SINT32)s32Temp;\
694df25739fSMilanka Ringwald     s32DCTY[12]=(SINT32)s32Temp2;\
695df25739fSMilanka Ringwald }
696df25739fSMilanka Ringwald #define WINDOW_ACCU_8_5_11 \
697df25739fSMilanka Ringwald {\
698df25739fSMilanka Ringwald     s32Temp=(SINT32)WIND_8_SUBBANDS_5_0*(SINT32)s16X[ChOffset+5];\
699df25739fSMilanka Ringwald     s32Temp2=(SINT32)WIND_8_SUBBANDS_5_0*(SINT32)s16X[ChOffset+64+11];\
700df25739fSMilanka Ringwald     s32Temp+=(SINT32)WIND_8_SUBBANDS_5_1*(SINT32)s16X[ChOffset+16+5];\
701df25739fSMilanka Ringwald     s32Temp2+=(SINT32)WIND_8_SUBBANDS_5_1*(SINT32)s16X[ChOffset+48+11];\
702df25739fSMilanka Ringwald     s32Temp+=(SINT32)WIND_8_SUBBANDS_5_2*(SINT32)s16X[ChOffset+32+5];\
703df25739fSMilanka Ringwald     s32Temp2+=(SINT32)WIND_8_SUBBANDS_5_2*(SINT32)s16X[ChOffset+32+11];\
704df25739fSMilanka Ringwald     s32Temp+=(SINT32)WIND_8_SUBBANDS_5_3*(SINT32)s16X[ChOffset+48+5];\
705df25739fSMilanka Ringwald     s32Temp2+=(SINT32)WIND_8_SUBBANDS_5_3*(SINT32)s16X[ChOffset+16+11];\
706df25739fSMilanka Ringwald     s32Temp+=(SINT32)WIND_8_SUBBANDS_5_4*(SINT32)s16X[ChOffset+64+5];\
707df25739fSMilanka Ringwald     s32Temp2+=(SINT32)WIND_8_SUBBANDS_5_4*(SINT32)s16X[ChOffset+11];\
708df25739fSMilanka Ringwald     s32DCTY[5]=(SINT32)s32Temp;\
709df25739fSMilanka Ringwald     s32DCTY[11]=(SINT32)s32Temp2;\
710df25739fSMilanka Ringwald }
711df25739fSMilanka Ringwald #define WINDOW_ACCU_8_6_10 \
712df25739fSMilanka Ringwald {\
713df25739fSMilanka Ringwald     s32Temp=(SINT32)WIND_8_SUBBANDS_6_0*(SINT32)s16X[ChOffset+6];\
714df25739fSMilanka Ringwald     s32Temp2=(SINT32)WIND_8_SUBBANDS_6_0*(SINT32)s16X[ChOffset+64+10];\
715df25739fSMilanka Ringwald     s32Temp+=(SINT32)WIND_8_SUBBANDS_6_1*(SINT32)s16X[ChOffset+16+6];\
716df25739fSMilanka Ringwald     s32Temp2+=(SINT32)WIND_8_SUBBANDS_6_1*(SINT32)s16X[ChOffset+48+10];\
717df25739fSMilanka Ringwald     s32Temp+=(SINT32)WIND_8_SUBBANDS_6_2*(SINT32)s16X[ChOffset+32+6];\
718df25739fSMilanka Ringwald     s32Temp2+=(SINT32)WIND_8_SUBBANDS_6_2*(SINT32)s16X[ChOffset+32+10];\
719df25739fSMilanka Ringwald     s32Temp+=(SINT32)WIND_8_SUBBANDS_6_3*(SINT32)s16X[ChOffset+48+6];\
720df25739fSMilanka Ringwald     s32Temp2+=(SINT32)WIND_8_SUBBANDS_6_3*(SINT32)s16X[ChOffset+16+10];\
721df25739fSMilanka Ringwald     s32Temp+=(SINT32)WIND_8_SUBBANDS_6_4*(SINT32)s16X[ChOffset+64+6];\
722df25739fSMilanka Ringwald     s32Temp2+=(SINT32)WIND_8_SUBBANDS_6_4*(SINT32)s16X[ChOffset+10];\
723df25739fSMilanka Ringwald     s32DCTY[6]=(SINT32)s32Temp;\
724df25739fSMilanka Ringwald     s32DCTY[10]=(SINT32)s32Temp2;\
725df25739fSMilanka Ringwald }
726df25739fSMilanka Ringwald #define WINDOW_ACCU_8_7_9 \
727df25739fSMilanka Ringwald {\
728df25739fSMilanka Ringwald     s32Temp=(SINT32)WIND_8_SUBBANDS_7_0*(SINT32)s16X[ChOffset+7];\
729df25739fSMilanka Ringwald     s32Temp2=(SINT32)WIND_8_SUBBANDS_7_0*(SINT32)s16X[ChOffset+64+9];\
730df25739fSMilanka Ringwald     s32Temp+=(SINT32)WIND_8_SUBBANDS_7_1*(SINT32)s16X[ChOffset+16+7];\
731df25739fSMilanka Ringwald     s32Temp2+=(SINT32)WIND_8_SUBBANDS_7_1*(SINT32)s16X[ChOffset+48+9];\
732df25739fSMilanka Ringwald     s32Temp+=(SINT32)WIND_8_SUBBANDS_7_2*(SINT32)s16X[ChOffset+32+7];\
733df25739fSMilanka Ringwald     s32Temp2+=(SINT32)WIND_8_SUBBANDS_7_2*(SINT32)s16X[ChOffset+32+9];\
734df25739fSMilanka Ringwald     s32Temp+=(SINT32)WIND_8_SUBBANDS_7_3*(SINT32)s16X[ChOffset+48+7];\
735df25739fSMilanka Ringwald     s32Temp2+=(SINT32)WIND_8_SUBBANDS_7_3*(SINT32)s16X[ChOffset+16+9];\
736df25739fSMilanka Ringwald     s32Temp+=(SINT32)WIND_8_SUBBANDS_7_4*(SINT32)s16X[ChOffset+64+7];\
737df25739fSMilanka Ringwald     s32Temp2+=(SINT32)WIND_8_SUBBANDS_7_4*(SINT32)s16X[ChOffset+9];\
738df25739fSMilanka Ringwald     s32DCTY[7]=(SINT32)s32Temp;\
739df25739fSMilanka Ringwald     s32DCTY[9]=(SINT32)s32Temp2;\
740df25739fSMilanka Ringwald }
741df25739fSMilanka Ringwald #define WINDOW_ACCU_8_8 \
742df25739fSMilanka Ringwald {\
743df25739fSMilanka Ringwald     s32Temp=(SINT32)WIND_8_SUBBANDS_8_0*(SINT32)(s16X[ChOffset+8]+s16X[ChOffset+64+8]);\
744df25739fSMilanka Ringwald     s32Temp+=(SINT32)WIND_8_SUBBANDS_8_1*(SINT32)(s16X[ChOffset+16+8]+s16X[ChOffset+48+8]);\
745df25739fSMilanka Ringwald     s32Temp+=(SINT32)WIND_8_SUBBANDS_8_2*(SINT32)s16X[ChOffset+32+8];\
746df25739fSMilanka Ringwald     s32DCTY[8]=(SINT32)s32Temp;\
747df25739fSMilanka Ringwald }
748df25739fSMilanka Ringwald #define WINDOW_ACCU_4_0 \
749df25739fSMilanka Ringwald {\
750df25739fSMilanka Ringwald     s32Temp=(SINT32)WIND_4_SUBBANDS_0_1*(SINT32)(s16X[ChOffset+8]-s16X[ChOffset+32]);\
751df25739fSMilanka Ringwald     s32Temp+=(SINT32)WIND_4_SUBBANDS_0_2*(SINT32)(s16X[ChOffset+16]-s16X[ChOffset+24]);\
752df25739fSMilanka Ringwald     s32DCTY[0]=(SINT32)(s32Temp);\
753df25739fSMilanka Ringwald }
754df25739fSMilanka Ringwald #define WINDOW_ACCU_4_1_7 \
755df25739fSMilanka Ringwald {\
756df25739fSMilanka Ringwald     s32Temp=(SINT32)WIND_4_SUBBANDS_1_0*(SINT32)s16X[ChOffset+1];\
757df25739fSMilanka Ringwald     s32Temp2=(SINT32)WIND_4_SUBBANDS_1_0*(SINT32)s16X[ChOffset+32+7];\
758df25739fSMilanka Ringwald     s32Temp+=(SINT32)WIND_4_SUBBANDS_1_1*(SINT32)s16X[ChOffset+8+1];\
759df25739fSMilanka Ringwald     s32Temp2+=(SINT32)WIND_4_SUBBANDS_1_1*(SINT32)s16X[ChOffset+24+7];\
760df25739fSMilanka Ringwald     s32Temp+=(SINT32)WIND_4_SUBBANDS_1_2*(SINT32)s16X[ChOffset+16+1];\
761df25739fSMilanka Ringwald     s32Temp2+=(SINT32)WIND_4_SUBBANDS_1_2*(SINT32)s16X[ChOffset+16+7];\
762df25739fSMilanka Ringwald     s32Temp+=(SINT32)WIND_4_SUBBANDS_1_3*(SINT32)s16X[ChOffset+24+1];\
763df25739fSMilanka Ringwald     s32Temp2+=(SINT32)WIND_4_SUBBANDS_1_3*(SINT32)s16X[ChOffset+8+7];\
764df25739fSMilanka Ringwald     s32Temp+=(SINT32)WIND_4_SUBBANDS_1_4*(SINT32)s16X[ChOffset+32+1];\
765df25739fSMilanka Ringwald     s32Temp2+=(SINT32)WIND_4_SUBBANDS_1_4*(SINT32)s16X[ChOffset+7];\
766df25739fSMilanka Ringwald     s32DCTY[1]=(SINT32)(s32Temp);\
767df25739fSMilanka Ringwald     s32DCTY[7]=(SINT32)(s32Temp2);\
768df25739fSMilanka Ringwald }
769df25739fSMilanka Ringwald #define WINDOW_ACCU_4_2_6 \
770df25739fSMilanka Ringwald {\
771df25739fSMilanka Ringwald     s32Temp=(SINT32)WIND_4_SUBBANDS_2_0*(SINT32)s16X[ChOffset+2];\
772df25739fSMilanka Ringwald     s32Temp2=(SINT32)WIND_4_SUBBANDS_2_0*(SINT32)s16X[ChOffset+32+6];\
773df25739fSMilanka Ringwald     s32Temp+=(SINT32)WIND_4_SUBBANDS_2_1*(SINT32)s16X[ChOffset+8+2];\
774df25739fSMilanka Ringwald     s32Temp2+=(SINT32)WIND_4_SUBBANDS_2_1*(SINT32)s16X[ChOffset+24+6];\
775df25739fSMilanka Ringwald     s32Temp+=(SINT32)WIND_4_SUBBANDS_2_2*(SINT32)s16X[ChOffset+16+2];\
776df25739fSMilanka Ringwald     s32Temp2+=(SINT32)WIND_4_SUBBANDS_2_2*(SINT32)s16X[ChOffset+16+6];\
777df25739fSMilanka Ringwald     s32Temp+=(SINT32)WIND_4_SUBBANDS_2_3*(SINT32)s16X[ChOffset+24+2];\
778df25739fSMilanka Ringwald     s32Temp2+=(SINT32)WIND_4_SUBBANDS_2_3*(SINT32)s16X[ChOffset+8+6];\
779df25739fSMilanka Ringwald     s32Temp+=(SINT32)WIND_4_SUBBANDS_2_4*(SINT32)s16X[ChOffset+32+2];\
780df25739fSMilanka Ringwald     s32Temp2+=(SINT32)WIND_4_SUBBANDS_2_4*(SINT32)s16X[ChOffset+6];\
781df25739fSMilanka Ringwald     s32DCTY[2]=(SINT32)(s32Temp);\
782df25739fSMilanka Ringwald     s32DCTY[6]=(SINT32)(s32Temp2);\
783df25739fSMilanka Ringwald }
784df25739fSMilanka Ringwald #define WINDOW_ACCU_4_3_5 \
785df25739fSMilanka Ringwald {\
786df25739fSMilanka Ringwald     s32Temp=(SINT32)WIND_4_SUBBANDS_3_0*(SINT32)s16X[ChOffset+3];\
787df25739fSMilanka Ringwald     s32Temp2=(SINT32)WIND_4_SUBBANDS_3_0*(SINT32)s16X[ChOffset+32+5];\
788df25739fSMilanka Ringwald     s32Temp+=(SINT32)WIND_4_SUBBANDS_3_1*(SINT32)s16X[ChOffset+8+3];\
789df25739fSMilanka Ringwald     s32Temp2+=(SINT32)WIND_4_SUBBANDS_3_1*(SINT32)s16X[ChOffset+24+5];\
790df25739fSMilanka Ringwald     s32Temp+=(SINT32)WIND_4_SUBBANDS_3_2*(SINT32)s16X[ChOffset+16+3];\
791df25739fSMilanka Ringwald     s32Temp2+=(SINT32)WIND_4_SUBBANDS_3_2*(SINT32)s16X[ChOffset+16+5];\
792df25739fSMilanka Ringwald     s32Temp+=(SINT32)WIND_4_SUBBANDS_3_3*(SINT32)s16X[ChOffset+24+3];\
793df25739fSMilanka Ringwald     s32Temp2+=(SINT32)WIND_4_SUBBANDS_3_3*(SINT32)s16X[ChOffset+8+5];\
794df25739fSMilanka Ringwald     s32Temp+=(SINT32)WIND_4_SUBBANDS_3_4*(SINT32)s16X[ChOffset+32+3];\
795df25739fSMilanka Ringwald     s32Temp2+=(SINT32)WIND_4_SUBBANDS_3_4*(SINT32)s16X[ChOffset+5];\
796df25739fSMilanka Ringwald     s32DCTY[3]=(SINT32)(s32Temp);\
797df25739fSMilanka Ringwald     s32DCTY[5]=(SINT32)(s32Temp2);\
798df25739fSMilanka Ringwald }
799df25739fSMilanka Ringwald 
800df25739fSMilanka Ringwald #define WINDOW_ACCU_4_4 \
801df25739fSMilanka Ringwald {\
802df25739fSMilanka Ringwald     s32Temp=(SINT32)WIND_4_SUBBANDS_4_0*(SINT32)(s16X[ChOffset+4]+s16X[ChOffset+4+32]);\
803df25739fSMilanka Ringwald     s32Temp+=(SINT32)WIND_4_SUBBANDS_4_1*(SINT32)(s16X[ChOffset+4+8]+s16X[ChOffset+4+24]);\
804df25739fSMilanka Ringwald     s32Temp+=(SINT32)WIND_4_SUBBANDS_4_2*(SINT32)s16X[ChOffset+4+16];\
805df25739fSMilanka Ringwald     s32DCTY[4]=(SINT32)(s32Temp);\
806df25739fSMilanka Ringwald }
807df25739fSMilanka Ringwald #endif
808df25739fSMilanka Ringwald #define WINDOW_PARTIAL_4 \
809df25739fSMilanka Ringwald {\
810df25739fSMilanka Ringwald     WINDOW_ACCU_4_0;     WINDOW_ACCU_4_1_7;\
811df25739fSMilanka Ringwald     WINDOW_ACCU_4_2_6;   WINDOW_ACCU_4_3_5;\
812df25739fSMilanka Ringwald     WINDOW_ACCU_4_4;\
813df25739fSMilanka Ringwald }
814df25739fSMilanka Ringwald 
815df25739fSMilanka Ringwald #define WINDOW_PARTIAL_8 \
816df25739fSMilanka Ringwald {\
817df25739fSMilanka Ringwald     WINDOW_ACCU_8_0;         WINDOW_ACCU_8_1_15;\
818df25739fSMilanka Ringwald     WINDOW_ACCU_8_2_14;      WINDOW_ACCU_8_3_13;\
819df25739fSMilanka Ringwald     WINDOW_ACCU_8_4_12;      WINDOW_ACCU_8_5_11;\
820df25739fSMilanka Ringwald     WINDOW_ACCU_8_6_10;      WINDOW_ACCU_8_7_9;\
821df25739fSMilanka Ringwald     WINDOW_ACCU_8_8;\
822df25739fSMilanka Ringwald }
823df25739fSMilanka Ringwald #else
824df25739fSMilanka Ringwald #if (SBC_IS_64_MULT_IN_WINDOW_ACCU == TRUE)
825df25739fSMilanka Ringwald #define WINDOW_ACCU_4(i) \
826df25739fSMilanka Ringwald {\
827df25739fSMilanka Ringwald     s64Temp=((SINT64)gas32CoeffFor4SBs[i] * (SINT64)s16X[ChOffset+i]);                                    \
828df25739fSMilanka Ringwald     s64Temp+=((SINT64)gas32CoeffFor4SBs[(i+8)] * (SINT64)s16X[ChOffset+i+8]);                                    \
829df25739fSMilanka Ringwald     s64Temp+=((SINT64)gas32CoeffFor4SBs[(i+16)] * (SINT64)s16X[ChOffset+i+16]);                                    \
830df25739fSMilanka Ringwald     s64Temp+=((SINT64)gas32CoeffFor4SBs[(i+24)] * (SINT64)s16X[ChOffset+i+24]);                                    \
831df25739fSMilanka Ringwald     s64Temp+=((SINT64)gas32CoeffFor4SBs[(i+32)] * (SINT64)s16X[ChOffset+i+32]);                                    \
832df25739fSMilanka Ringwald     s32DCTY[i]=(SINT32)(s64Temp>>16);\
833df25739fSMilanka Ringwald 	/*printf("s32DCTY4: 0x%x \n", s32DCTY[i]);*/\
834df25739fSMilanka Ringwald }
835df25739fSMilanka Ringwald #else
836df25739fSMilanka Ringwald #define WINDOW_ACCU_4(i) \
837df25739fSMilanka Ringwald {\
838df25739fSMilanka Ringwald     s32DCTY[i]=(gas32CoeffFor4SBs[i * 2] * s16X[ChOffset+i])                                    \
839df25739fSMilanka Ringwald             +  (((SINT32)(UINT16)(gas32CoeffFor4SBs[(i * 2) + 1]) * s16X[ChOffset+i]) >> 16);   \
840df25739fSMilanka Ringwald     s32DCTY[i]+=(gas32CoeffFor4SBs[(i+8) * 2] * s16X[ChOffset+i+8])                                    \
841df25739fSMilanka Ringwald             +  (((SINT32)(UINT16)(gas32CoeffFor4SBs[((i+8) * 2) + 1]) * s16X[ChOffset+i+8]) >> 16);   \
842df25739fSMilanka Ringwald     s32DCTY[i]+=(gas32CoeffFor4SBs[(i+16) * 2] * s16X[ChOffset+i+16])                                    \
843df25739fSMilanka Ringwald             +  (((SINT32)(UINT16)(gas32CoeffFor4SBs[((i+16) * 2) + 1]) * s16X[ChOffset+i+16]) >> 16);   \
844df25739fSMilanka Ringwald     s32DCTY[i]+=(gas32CoeffFor4SBs[(i+24) * 2] * s16X[ChOffset+i+24])                                    \
845df25739fSMilanka Ringwald             +  (((SINT32)(UINT16)(gas32CoeffFor4SBs[((i+24) * 2) + 1]) * s16X[ChOffset+i+24]) >> 16);   \
846df25739fSMilanka Ringwald     s32DCTY[i]+=(gas32CoeffFor4SBs[(i+32) * 2] * s16X[ChOffset+i+32])                                    \
847df25739fSMilanka Ringwald             +  (((SINT32)(UINT16)(gas32CoeffFor4SBs[((i+32) * 2) + 1]) * s16X[ChOffset+i+32]) >> 16);   \
848df25739fSMilanka Ringwald }
849df25739fSMilanka Ringwald #endif
850df25739fSMilanka Ringwald #define WINDOW_PARTIAL_4 \
851df25739fSMilanka Ringwald {\
852df25739fSMilanka Ringwald     WINDOW_ACCU_4(0);      WINDOW_ACCU_4(1);\
853df25739fSMilanka Ringwald     WINDOW_ACCU_4(2);      WINDOW_ACCU_4(3);\
854df25739fSMilanka Ringwald     WINDOW_ACCU_4(4);      WINDOW_ACCU_4(5);\
855df25739fSMilanka Ringwald     WINDOW_ACCU_4(6);      WINDOW_ACCU_4(7);\
856df25739fSMilanka Ringwald }
857df25739fSMilanka Ringwald 
858df25739fSMilanka Ringwald #if (SBC_IS_64_MULT_IN_WINDOW_ACCU == TRUE)
859df25739fSMilanka Ringwald #define WINDOW_ACCU_8(i) \
860df25739fSMilanka Ringwald {\
861df25739fSMilanka Ringwald     s64Temp = ((((SINT64)gas32CoeffFor8SBs[i]      * (SINT64)s16X[ChOffset+i]   )));                 \
862df25739fSMilanka Ringwald     s64Temp+= ((((SINT64)gas32CoeffFor8SBs[(i+16)] * (SINT64)s16X[ChOffset+i+16])));                 \
863df25739fSMilanka Ringwald     s64Temp+= ((((SINT64)gas32CoeffFor8SBs[(i+32)] * (SINT64)s16X[ChOffset+i+32])));                 \
864df25739fSMilanka Ringwald     s64Temp+= ((((SINT64)gas32CoeffFor8SBs[(i+48)] * (SINT64)s16X[ChOffset+i+48])));                 \
865df25739fSMilanka Ringwald     s64Temp+= ((((SINT64)gas32CoeffFor8SBs[(i+64)] * (SINT64)s16X[ChOffset+i+64])));                 \
866df25739fSMilanka Ringwald 	/*printf("s32DCTY8: %d= 0x%x * %d\n", s32DCTY[i], gas32CoeffFor8SBs[i], s16X[ChOffset+i]);*/     \
867df25739fSMilanka Ringwald     s32DCTY[i]=(SINT32)(s64Temp>>16);\
868df25739fSMilanka Ringwald }
869df25739fSMilanka Ringwald #else
870df25739fSMilanka Ringwald #define WINDOW_ACCU_8(i) \
871df25739fSMilanka Ringwald {\
872df25739fSMilanka Ringwald     s32DCTY[i]=(gas32CoeffFor8SBs[i * 2] * s16X[ChOffset+i])                                    \
873df25739fSMilanka Ringwald             +  (((SINT32)(UINT16)(gas32CoeffFor8SBs[(i * 2) + 1]) * s16X[ChOffset+i]) >> 16);   \
874df25739fSMilanka Ringwald     s32DCTY[i]+=(gas32CoeffFor8SBs[(i+16) * 2] * s16X[ChOffset+i+16])                                    \
875df25739fSMilanka Ringwald             +  (((SINT32)(UINT16)(gas32CoeffFor8SBs[((i+16) * 2) + 1]) * s16X[ChOffset+i+16]) >> 16);   \
876df25739fSMilanka Ringwald     s32DCTY[i]+=(gas32CoeffFor8SBs[(i+32) * 2] * s16X[ChOffset+i+32])                                    \
877df25739fSMilanka Ringwald             +  (((SINT32)(UINT16)(gas32CoeffFor8SBs[((i+32) * 2) + 1]) * s16X[ChOffset+i+32]) >> 16);   \
878df25739fSMilanka Ringwald     s32DCTY[i]+=(gas32CoeffFor8SBs[(i+48) * 2] * s16X[ChOffset+i+48])                                    \
879df25739fSMilanka Ringwald             +  (((SINT32)(UINT16)(gas32CoeffFor8SBs[((i+48) * 2) + 1]) * s16X[ChOffset+i+48]) >> 16);   \
880df25739fSMilanka Ringwald     s32DCTY[i]+=(gas32CoeffFor8SBs[(i+64) * 2] * s16X[ChOffset+i+64])                                    \
881df25739fSMilanka Ringwald             +  (((SINT32)(UINT16)(gas32CoeffFor8SBs[((i+64) * 2) + 1]) * s16X[ChOffset+i+64]) >> 16);   \
882df25739fSMilanka Ringwald 	/*printf("s32DCTY8: %d = 0x%4x%4x * %d\n", s32DCTY[i], gas32CoeffFor8SBs[i * 2], (gas32CoeffFor8SBs[(i * 2) + 1]), s16X[ChOffset+i]);*/\
883df25739fSMilanka Ringwald     /*s32DCTY[i]=(SINT32)(s64Temp>>16);*/\
884df25739fSMilanka Ringwald }
885df25739fSMilanka Ringwald #endif
886df25739fSMilanka Ringwald #define WINDOW_PARTIAL_8 \
887df25739fSMilanka Ringwald {\
888df25739fSMilanka Ringwald     WINDOW_ACCU_8(0);      WINDOW_ACCU_8(1);\
889df25739fSMilanka Ringwald     WINDOW_ACCU_8(2);      WINDOW_ACCU_8(3);\
890df25739fSMilanka Ringwald     WINDOW_ACCU_8(4);      WINDOW_ACCU_8(5);\
891df25739fSMilanka Ringwald     WINDOW_ACCU_8(6);      WINDOW_ACCU_8(7);\
892df25739fSMilanka Ringwald     WINDOW_ACCU_8(8);      WINDOW_ACCU_8(9);\
893df25739fSMilanka Ringwald     WINDOW_ACCU_8(10);     WINDOW_ACCU_8(11);\
894df25739fSMilanka Ringwald     WINDOW_ACCU_8(12);     WINDOW_ACCU_8(13);\
895df25739fSMilanka Ringwald     WINDOW_ACCU_8(14);     WINDOW_ACCU_8(15);\
896df25739fSMilanka Ringwald }
897df25739fSMilanka Ringwald #endif
898df25739fSMilanka Ringwald #endif
899df25739fSMilanka Ringwald 
900df25739fSMilanka Ringwald static SINT16 ShiftCounter=0;
901df25739fSMilanka Ringwald extern SINT16 EncMaxShiftCounter;
902df25739fSMilanka Ringwald /****************************************************************************
903df25739fSMilanka Ringwald * SbcAnalysisFilter - performs Analysis of the input audio stream
904df25739fSMilanka Ringwald *
905df25739fSMilanka Ringwald * RETURNS : N/A
906df25739fSMilanka Ringwald */
907df25739fSMilanka Ringwald void SbcAnalysisFilter4(SBC_ENC_PARAMS *pstrEncParams)
908df25739fSMilanka Ringwald {
909df25739fSMilanka Ringwald     SINT16 *ps16PcmBuf;
910df25739fSMilanka Ringwald     SINT32 *ps32SbBuf;
911df25739fSMilanka Ringwald     SINT32  s32Blk,s32Ch;
912df25739fSMilanka Ringwald     SINT32  s32NumOfChannels, s32NumOfBlocks;
913df25739fSMilanka Ringwald     SINT32 i,*ps32X,*ps32X2;
914df25739fSMilanka Ringwald     SINT32 Offset,Offset2,ChOffset;
915df25739fSMilanka Ringwald #if (SBC_ARM_ASM_OPT==TRUE)
916df25739fSMilanka Ringwald     register SINT32 s32Hi,s32Hi2;
917df25739fSMilanka Ringwald #else
918df25739fSMilanka Ringwald #if (SBC_IPAQ_OPT==TRUE)
919df25739fSMilanka Ringwald #if (SBC_IS_64_MULT_IN_WINDOW_ACCU == TRUE)
920df25739fSMilanka Ringwald     register SINT64 s64Temp,s64Temp2;
921df25739fSMilanka Ringwald #else
922df25739fSMilanka Ringwald 	register SINT32 s32Temp,s32Temp2;
923df25739fSMilanka Ringwald #endif
924df25739fSMilanka Ringwald #else
925df25739fSMilanka Ringwald 
926df25739fSMilanka Ringwald #if (SBC_IS_64_MULT_IN_WINDOW_ACCU == TRUE)
927df25739fSMilanka Ringwald     SINT64 s64Temp;
928df25739fSMilanka Ringwald #endif
929df25739fSMilanka Ringwald 
930df25739fSMilanka Ringwald #endif
931df25739fSMilanka Ringwald #endif
932df25739fSMilanka Ringwald 
933df25739fSMilanka Ringwald     s32NumOfChannels = pstrEncParams->s16NumOfChannels;
934df25739fSMilanka Ringwald     s32NumOfBlocks   = pstrEncParams->s16NumOfBlocks;
935df25739fSMilanka Ringwald 
936df25739fSMilanka Ringwald     ps16PcmBuf = pstrEncParams->ps16NextPcmBuffer;
937df25739fSMilanka Ringwald 
938df25739fSMilanka Ringwald     ps32SbBuf  = pstrEncParams->s32SbBuffer;
939df25739fSMilanka Ringwald     Offset2=(SINT32)(EncMaxShiftCounter+40);
940df25739fSMilanka Ringwald 
941df25739fSMilanka Ringwald     for (s32Blk=0; s32Blk <s32NumOfBlocks; s32Blk++)
942df25739fSMilanka Ringwald     {
943df25739fSMilanka Ringwald         Offset=(SINT32)(EncMaxShiftCounter-ShiftCounter);
944df25739fSMilanka Ringwald         /* Store new samples */
945df25739fSMilanka Ringwald         if (s32NumOfChannels==1)
946df25739fSMilanka Ringwald         {
947df25739fSMilanka Ringwald             s16X[3+Offset] = *ps16PcmBuf;   ps16PcmBuf++;
948df25739fSMilanka Ringwald             s16X[2+Offset] = *ps16PcmBuf;   ps16PcmBuf++;
949df25739fSMilanka Ringwald             s16X[1+Offset] = *ps16PcmBuf;   ps16PcmBuf++;
950df25739fSMilanka Ringwald             s16X[0+Offset] = *ps16PcmBuf;   ps16PcmBuf++;
951df25739fSMilanka Ringwald 
952df25739fSMilanka Ringwald         }
953df25739fSMilanka Ringwald         else
954df25739fSMilanka Ringwald         {
955df25739fSMilanka Ringwald             s16X[3+Offset] = *ps16PcmBuf;        ps16PcmBuf++;
956df25739fSMilanka Ringwald             s16X[Offset2+3+Offset] = *ps16PcmBuf;     ps16PcmBuf++;
957df25739fSMilanka Ringwald             s16X[2+Offset] = *ps16PcmBuf;        ps16PcmBuf++;
958df25739fSMilanka Ringwald             s16X[Offset2+2+Offset] = *ps16PcmBuf;     ps16PcmBuf++;
959df25739fSMilanka Ringwald             s16X[1+Offset] = *ps16PcmBuf;        ps16PcmBuf++;
960df25739fSMilanka Ringwald             s16X[Offset2+1+Offset] = *ps16PcmBuf;     ps16PcmBuf++;
961df25739fSMilanka Ringwald             s16X[0+Offset] = *ps16PcmBuf;        ps16PcmBuf++;
962df25739fSMilanka Ringwald             s16X[Offset2+0+Offset] = *ps16PcmBuf;     ps16PcmBuf++;
963df25739fSMilanka Ringwald         }
964df25739fSMilanka Ringwald         for (s32Ch=0;s32Ch<s32NumOfChannels;s32Ch++)
965df25739fSMilanka Ringwald         {
966*c1ab6cc1SMatthias Ringwald             ChOffset=(s32Ch*Offset2)+Offset;
967df25739fSMilanka Ringwald 
968df25739fSMilanka Ringwald             WINDOW_PARTIAL_4
969df25739fSMilanka Ringwald 
970df25739fSMilanka Ringwald             SBC_FastIDCT4(s32DCTY, ps32SbBuf);
971df25739fSMilanka Ringwald             ps32SbBuf +=SUB_BANDS_4;
972df25739fSMilanka Ringwald         }
973df25739fSMilanka Ringwald         if (s32NumOfChannels==1)
974df25739fSMilanka Ringwald         {
975df25739fSMilanka Ringwald             if (ShiftCounter>=EncMaxShiftCounter)
976df25739fSMilanka Ringwald             {
977df25739fSMilanka Ringwald                 SHIFTUP_X4;
978df25739fSMilanka Ringwald                 ShiftCounter=0;
979df25739fSMilanka Ringwald             }
980df25739fSMilanka Ringwald             else
981df25739fSMilanka Ringwald             {
982df25739fSMilanka Ringwald                 ShiftCounter+=SUB_BANDS_4;
983df25739fSMilanka Ringwald             }
984df25739fSMilanka Ringwald         }
985df25739fSMilanka Ringwald         else
986df25739fSMilanka Ringwald         {
987df25739fSMilanka Ringwald             if (ShiftCounter>=EncMaxShiftCounter)
988df25739fSMilanka Ringwald             {
989df25739fSMilanka Ringwald                 SHIFTUP_X4_2;
990df25739fSMilanka Ringwald                 ShiftCounter=0;
991df25739fSMilanka Ringwald             }
992df25739fSMilanka Ringwald             else
993df25739fSMilanka Ringwald             {
994df25739fSMilanka Ringwald                 ShiftCounter+=SUB_BANDS_4;
995df25739fSMilanka Ringwald             }
996df25739fSMilanka Ringwald         }
997df25739fSMilanka Ringwald     }
998df25739fSMilanka Ringwald }
999df25739fSMilanka Ringwald 
1000df25739fSMilanka Ringwald /* //////////////////////////////////////////////////////////////////////////////////////////////////////////////////// */
1001df25739fSMilanka Ringwald void SbcAnalysisFilter8 (SBC_ENC_PARAMS *pstrEncParams)
1002df25739fSMilanka Ringwald {
1003df25739fSMilanka Ringwald     SINT16 *ps16PcmBuf;
1004df25739fSMilanka Ringwald     SINT32 *ps32SbBuf;
1005df25739fSMilanka Ringwald     SINT32  s32Blk,s32Ch;                                     /* counter for block*/
1006df25739fSMilanka Ringwald     SINT32 Offset,Offset2;
1007df25739fSMilanka Ringwald     SINT32  s32NumOfChannels, s32NumOfBlocks;
1008df25739fSMilanka Ringwald     SINT32 i,*ps32X,*ps32X2;
1009df25739fSMilanka Ringwald     SINT32 ChOffset;
1010df25739fSMilanka Ringwald #if (SBC_ARM_ASM_OPT==TRUE)
1011df25739fSMilanka Ringwald     register SINT32 s32Hi,s32Hi2;
1012df25739fSMilanka Ringwald #else
1013df25739fSMilanka Ringwald #if (SBC_IPAQ_OPT==TRUE)
1014df25739fSMilanka Ringwald #if (SBC_IS_64_MULT_IN_WINDOW_ACCU == TRUE)
1015df25739fSMilanka Ringwald     register SINT64 s64Temp,s64Temp2;
1016df25739fSMilanka Ringwald #else
1017df25739fSMilanka Ringwald 	register SINT32 s32Temp,s32Temp2;
1018df25739fSMilanka Ringwald #endif
1019df25739fSMilanka Ringwald #else
1020df25739fSMilanka Ringwald #if (SBC_IS_64_MULT_IN_WINDOW_ACCU == TRUE)
1021df25739fSMilanka Ringwald     SINT64 s64Temp;
1022df25739fSMilanka Ringwald #endif
1023df25739fSMilanka Ringwald #endif
1024df25739fSMilanka Ringwald #endif
1025df25739fSMilanka Ringwald 
1026df25739fSMilanka Ringwald     s32NumOfChannels = pstrEncParams->s16NumOfChannels;
1027df25739fSMilanka Ringwald     s32NumOfBlocks   = pstrEncParams->s16NumOfBlocks;
1028df25739fSMilanka Ringwald 
1029df25739fSMilanka Ringwald     ps16PcmBuf = pstrEncParams->ps16NextPcmBuffer;
1030df25739fSMilanka Ringwald 
1031df25739fSMilanka Ringwald     ps32SbBuf  = pstrEncParams->s32SbBuffer;
1032df25739fSMilanka Ringwald     Offset2=(SINT32)(EncMaxShiftCounter+80);
1033df25739fSMilanka Ringwald     for (s32Blk=0; s32Blk <s32NumOfBlocks; s32Blk++)
1034df25739fSMilanka Ringwald     {
1035df25739fSMilanka Ringwald         Offset=(SINT32)(EncMaxShiftCounter-ShiftCounter);
1036df25739fSMilanka Ringwald         /* Store new samples */
1037df25739fSMilanka Ringwald         if (s32NumOfChannels==1)
1038df25739fSMilanka Ringwald         {
1039df25739fSMilanka Ringwald             s16X[7+Offset] = *ps16PcmBuf;   ps16PcmBuf++;
1040df25739fSMilanka Ringwald             s16X[6+Offset] = *ps16PcmBuf;   ps16PcmBuf++;
1041df25739fSMilanka Ringwald             s16X[5+Offset] = *ps16PcmBuf;   ps16PcmBuf++;
1042df25739fSMilanka Ringwald             s16X[4+Offset] = *ps16PcmBuf;   ps16PcmBuf++;
1043df25739fSMilanka Ringwald             s16X[3+Offset] = *ps16PcmBuf;   ps16PcmBuf++;
1044df25739fSMilanka Ringwald             s16X[2+Offset] = *ps16PcmBuf;   ps16PcmBuf++;
1045df25739fSMilanka Ringwald             s16X[1+Offset] = *ps16PcmBuf;   ps16PcmBuf++;
1046df25739fSMilanka Ringwald             s16X[0+Offset] = *ps16PcmBuf;   ps16PcmBuf++;
1047df25739fSMilanka Ringwald         }
1048df25739fSMilanka Ringwald         else
1049df25739fSMilanka Ringwald         {
1050df25739fSMilanka Ringwald             s16X[7+Offset] = *ps16PcmBuf;        ps16PcmBuf++;
1051df25739fSMilanka Ringwald             s16X[Offset2+7+Offset] = *ps16PcmBuf;     ps16PcmBuf++;
1052df25739fSMilanka Ringwald             s16X[6+Offset] = *ps16PcmBuf;        ps16PcmBuf++;
1053df25739fSMilanka Ringwald             s16X[Offset2+6+Offset] = *ps16PcmBuf;     ps16PcmBuf++;
1054df25739fSMilanka Ringwald             s16X[5+Offset] = *ps16PcmBuf;        ps16PcmBuf++;
1055df25739fSMilanka Ringwald             s16X[Offset2+5+Offset] = *ps16PcmBuf;     ps16PcmBuf++;
1056df25739fSMilanka Ringwald             s16X[4+Offset] = *ps16PcmBuf;        ps16PcmBuf++;
1057df25739fSMilanka Ringwald             s16X[Offset2+4+Offset] = *ps16PcmBuf;     ps16PcmBuf++;
1058df25739fSMilanka Ringwald             s16X[3+Offset] = *ps16PcmBuf;        ps16PcmBuf++;
1059df25739fSMilanka Ringwald             s16X[Offset2+3+Offset] = *ps16PcmBuf;     ps16PcmBuf++;
1060df25739fSMilanka Ringwald             s16X[2+Offset] = *ps16PcmBuf;        ps16PcmBuf++;
1061df25739fSMilanka Ringwald             s16X[Offset2+2+Offset] = *ps16PcmBuf;     ps16PcmBuf++;
1062df25739fSMilanka Ringwald             s16X[1+Offset] = *ps16PcmBuf;        ps16PcmBuf++;
1063df25739fSMilanka Ringwald             s16X[Offset2+1+Offset] = *ps16PcmBuf;     ps16PcmBuf++;
1064df25739fSMilanka Ringwald             s16X[0+Offset] = *ps16PcmBuf;        ps16PcmBuf++;
1065df25739fSMilanka Ringwald             s16X[Offset2+0+Offset] = *ps16PcmBuf;     ps16PcmBuf++;
1066df25739fSMilanka Ringwald         }
1067df25739fSMilanka Ringwald         for (s32Ch=0;s32Ch<s32NumOfChannels;s32Ch++)
1068df25739fSMilanka Ringwald         {
1069*c1ab6cc1SMatthias Ringwald             ChOffset=(s32Ch*Offset2)+Offset;
1070df25739fSMilanka Ringwald 
1071df25739fSMilanka Ringwald             WINDOW_PARTIAL_8
1072df25739fSMilanka Ringwald 
1073df25739fSMilanka Ringwald             SBC_FastIDCT8 (s32DCTY, ps32SbBuf);
1074df25739fSMilanka Ringwald 
1075df25739fSMilanka Ringwald             ps32SbBuf +=SUB_BANDS_8;
1076df25739fSMilanka Ringwald         }
1077df25739fSMilanka Ringwald         if (s32NumOfChannels==1)
1078df25739fSMilanka Ringwald         {
1079df25739fSMilanka Ringwald             if (ShiftCounter>=EncMaxShiftCounter)
1080df25739fSMilanka Ringwald             {
1081df25739fSMilanka Ringwald                 SHIFTUP_X8;
1082df25739fSMilanka Ringwald                 ShiftCounter=0;
1083df25739fSMilanka Ringwald             }
1084df25739fSMilanka Ringwald             else
1085df25739fSMilanka Ringwald             {
1086df25739fSMilanka Ringwald                 ShiftCounter+=SUB_BANDS_8;
1087df25739fSMilanka Ringwald             }
1088df25739fSMilanka Ringwald         }
1089df25739fSMilanka Ringwald         else
1090df25739fSMilanka Ringwald         {
1091df25739fSMilanka Ringwald             if (ShiftCounter>=EncMaxShiftCounter)
1092df25739fSMilanka Ringwald             {
1093df25739fSMilanka Ringwald                 SHIFTUP_X8_2;
1094df25739fSMilanka Ringwald                 ShiftCounter=0;
1095df25739fSMilanka Ringwald             }
1096df25739fSMilanka Ringwald             else
1097df25739fSMilanka Ringwald             {
1098df25739fSMilanka Ringwald                 ShiftCounter+=SUB_BANDS_8;
1099df25739fSMilanka Ringwald             }
1100df25739fSMilanka Ringwald         }
1101df25739fSMilanka Ringwald     }
1102df25739fSMilanka Ringwald }
1103df25739fSMilanka Ringwald 
1104df25739fSMilanka Ringwald void SbcAnalysisInit (void)
1105df25739fSMilanka Ringwald {
1106df25739fSMilanka Ringwald     memset(s16X,0,ENC_VX_BUFFER_SIZE*sizeof(SINT16));
1107df25739fSMilanka Ringwald     ShiftCounter=0;
1108df25739fSMilanka Ringwald }
1109