xref: /aosp_15_r20/prebuilts/ndk/current/sources/android/cpufeatures/cpu-features.h (revision e0e58e67cd11713799cdf6b50ba5843d62881660)
1*e0e58e67SRyan Prichard /*
2*e0e58e67SRyan Prichard  * Copyright (C) 2010 The Android Open Source Project
3*e0e58e67SRyan Prichard  * All rights reserved.
4*e0e58e67SRyan Prichard  *
5*e0e58e67SRyan Prichard  * Redistribution and use in source and binary forms, with or without
6*e0e58e67SRyan Prichard  * modification, are permitted provided that the following conditions
7*e0e58e67SRyan Prichard  * are met:
8*e0e58e67SRyan Prichard  *  * Redistributions of source code must retain the above copyright
9*e0e58e67SRyan Prichard  *    notice, this list of conditions and the following disclaimer.
10*e0e58e67SRyan Prichard  *  * Redistributions in binary form must reproduce the above copyright
11*e0e58e67SRyan Prichard  *    notice, this list of conditions and the following disclaimer in
12*e0e58e67SRyan Prichard  *    the documentation and/or other materials provided with the
13*e0e58e67SRyan Prichard  *    distribution.
14*e0e58e67SRyan Prichard  *
15*e0e58e67SRyan Prichard  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16*e0e58e67SRyan Prichard  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17*e0e58e67SRyan Prichard  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
18*e0e58e67SRyan Prichard  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
19*e0e58e67SRyan Prichard  * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
20*e0e58e67SRyan Prichard  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21*e0e58e67SRyan Prichard  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
22*e0e58e67SRyan Prichard  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23*e0e58e67SRyan Prichard  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24*e0e58e67SRyan Prichard  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
25*e0e58e67SRyan Prichard  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26*e0e58e67SRyan Prichard  * SUCH DAMAGE.
27*e0e58e67SRyan Prichard  */
28*e0e58e67SRyan Prichard 
29*e0e58e67SRyan Prichard #pragma once
30*e0e58e67SRyan Prichard 
31*e0e58e67SRyan Prichard #include <sys/cdefs.h>
32*e0e58e67SRyan Prichard #include <stdint.h>
33*e0e58e67SRyan Prichard 
34*e0e58e67SRyan Prichard __BEGIN_DECLS
35*e0e58e67SRyan Prichard 
36*e0e58e67SRyan Prichard /* A list of valid values returned by android_getCpuFamily().
37*e0e58e67SRyan Prichard  * They describe the CPU Architecture of the current process.
38*e0e58e67SRyan Prichard  */
39*e0e58e67SRyan Prichard typedef enum {
40*e0e58e67SRyan Prichard     ANDROID_CPU_FAMILY_UNKNOWN = 0,
41*e0e58e67SRyan Prichard     ANDROID_CPU_FAMILY_ARM,
42*e0e58e67SRyan Prichard     ANDROID_CPU_FAMILY_X86,
43*e0e58e67SRyan Prichard     ANDROID_CPU_FAMILY_MIPS,
44*e0e58e67SRyan Prichard     ANDROID_CPU_FAMILY_ARM64,
45*e0e58e67SRyan Prichard     ANDROID_CPU_FAMILY_X86_64,
46*e0e58e67SRyan Prichard     ANDROID_CPU_FAMILY_MIPS64,
47*e0e58e67SRyan Prichard 
48*e0e58e67SRyan Prichard     ANDROID_CPU_FAMILY_MAX  /* do not remove */
49*e0e58e67SRyan Prichard 
50*e0e58e67SRyan Prichard } AndroidCpuFamily;
51*e0e58e67SRyan Prichard 
52*e0e58e67SRyan Prichard /* Return the CPU family of the current process.
53*e0e58e67SRyan Prichard  *
54*e0e58e67SRyan Prichard  * Note that this matches the bitness of the current process. I.e. when
55*e0e58e67SRyan Prichard  * running a 32-bit binary on a 64-bit capable CPU, this will return the
56*e0e58e67SRyan Prichard  * 32-bit CPU family value.
57*e0e58e67SRyan Prichard  */
58*e0e58e67SRyan Prichard extern AndroidCpuFamily android_getCpuFamily(void);
59*e0e58e67SRyan Prichard 
60*e0e58e67SRyan Prichard /* Return a bitmap describing a set of optional CPU features that are
61*e0e58e67SRyan Prichard  * supported by the current device's CPU. The exact bit-flags returned
62*e0e58e67SRyan Prichard  * depend on the value returned by android_getCpuFamily(). See the
63*e0e58e67SRyan Prichard  * documentation for the ANDROID_CPU_*_FEATURE_* flags below for details.
64*e0e58e67SRyan Prichard  */
65*e0e58e67SRyan Prichard extern uint64_t android_getCpuFeatures(void);
66*e0e58e67SRyan Prichard 
67*e0e58e67SRyan Prichard /* The list of feature flags for ANDROID_CPU_FAMILY_ARM that can be
68*e0e58e67SRyan Prichard  * recognized by the library (see note below for 64-bit ARM). Value details
69*e0e58e67SRyan Prichard  * are:
70*e0e58e67SRyan Prichard  *
71*e0e58e67SRyan Prichard  *   VFPv2:
72*e0e58e67SRyan Prichard  *     CPU supports the VFPv2 instruction set. Many, but not all, ARMv6 CPUs
73*e0e58e67SRyan Prichard  *     support these instructions. VFPv2 is a subset of VFPv3 so this will
74*e0e58e67SRyan Prichard  *     be set whenever VFPv3 is set too.
75*e0e58e67SRyan Prichard  *
76*e0e58e67SRyan Prichard  *   ARMv7:
77*e0e58e67SRyan Prichard  *     CPU supports the ARMv7-A basic instruction set.
78*e0e58e67SRyan Prichard  *     This feature is mandated by the 'armeabi-v7a' ABI.
79*e0e58e67SRyan Prichard  *
80*e0e58e67SRyan Prichard  *   VFPv3:
81*e0e58e67SRyan Prichard  *     CPU supports the VFPv3-D16 instruction set, providing hardware FPU
82*e0e58e67SRyan Prichard  *     support for single and double precision floating point registers.
83*e0e58e67SRyan Prichard  *     Note that only 16 FPU registers are available by default, unless
84*e0e58e67SRyan Prichard  *     the D32 bit is set too. This feature is also mandated by the
85*e0e58e67SRyan Prichard  *     'armeabi-v7a' ABI.
86*e0e58e67SRyan Prichard  *
87*e0e58e67SRyan Prichard  *   VFP_D32:
88*e0e58e67SRyan Prichard  *     CPU VFP optional extension that provides 32 FPU registers,
89*e0e58e67SRyan Prichard  *     instead of 16. Note that ARM mandates this feature is the 'NEON'
90*e0e58e67SRyan Prichard  *     feature is implemented by the CPU.
91*e0e58e67SRyan Prichard  *
92*e0e58e67SRyan Prichard  *   NEON:
93*e0e58e67SRyan Prichard  *     CPU FPU supports "ARM Advanced SIMD" instructions, also known as
94*e0e58e67SRyan Prichard  *     NEON. Note that this mandates the VFP_D32 feature as well, per the
95*e0e58e67SRyan Prichard  *     ARM Architecture specification.
96*e0e58e67SRyan Prichard  *
97*e0e58e67SRyan Prichard  *   VFP_FP16:
98*e0e58e67SRyan Prichard  *     Half-width floating precision VFP extension. If set, the CPU
99*e0e58e67SRyan Prichard  *     supports instructions to perform floating-point operations on
100*e0e58e67SRyan Prichard  *     16-bit registers. This is part of the VFPv4 specification, but
101*e0e58e67SRyan Prichard  *     not mandated by any Android ABI.
102*e0e58e67SRyan Prichard  *
103*e0e58e67SRyan Prichard  *   VFP_FMA:
104*e0e58e67SRyan Prichard  *     Fused multiply-accumulate VFP instructions extension. Also part of
105*e0e58e67SRyan Prichard  *     the VFPv4 specification, but not mandated by any Android ABI.
106*e0e58e67SRyan Prichard  *
107*e0e58e67SRyan Prichard  *   NEON_FMA:
108*e0e58e67SRyan Prichard  *     Fused multiply-accumulate NEON instructions extension. Optional
109*e0e58e67SRyan Prichard  *     extension from the VFPv4 specification, but not mandated by any
110*e0e58e67SRyan Prichard  *     Android ABI.
111*e0e58e67SRyan Prichard  *
112*e0e58e67SRyan Prichard  *   IDIV_ARM:
113*e0e58e67SRyan Prichard  *     Integer division available in ARM mode. Only available
114*e0e58e67SRyan Prichard  *     on recent CPUs (e.g. Cortex-A15).
115*e0e58e67SRyan Prichard  *
116*e0e58e67SRyan Prichard  *   IDIV_THUMB2:
117*e0e58e67SRyan Prichard  *     Integer division available in Thumb-2 mode. Only available
118*e0e58e67SRyan Prichard  *     on recent CPUs (e.g. Cortex-A15).
119*e0e58e67SRyan Prichard  *
120*e0e58e67SRyan Prichard  *   iWMMXt:
121*e0e58e67SRyan Prichard  *     Optional extension that adds MMX registers and operations to an
122*e0e58e67SRyan Prichard  *     ARM CPU. This is only available on a few XScale-based CPU designs
123*e0e58e67SRyan Prichard  *     sold by Marvell. Pretty rare in practice.
124*e0e58e67SRyan Prichard  *
125*e0e58e67SRyan Prichard  *   AES:
126*e0e58e67SRyan Prichard  *     CPU supports AES instructions. These instructions are only
127*e0e58e67SRyan Prichard  *     available for 32-bit applications running on ARMv8 CPU.
128*e0e58e67SRyan Prichard  *
129*e0e58e67SRyan Prichard  *   CRC32:
130*e0e58e67SRyan Prichard  *     CPU supports CRC32 instructions. These instructions are only
131*e0e58e67SRyan Prichard  *     available for 32-bit applications running on ARMv8 CPU.
132*e0e58e67SRyan Prichard  *
133*e0e58e67SRyan Prichard  *   SHA2:
134*e0e58e67SRyan Prichard  *     CPU supports SHA2 instructions. These instructions are only
135*e0e58e67SRyan Prichard  *     available for 32-bit applications running on ARMv8 CPU.
136*e0e58e67SRyan Prichard  *
137*e0e58e67SRyan Prichard  *   SHA1:
138*e0e58e67SRyan Prichard  *     CPU supports SHA1 instructions. These instructions are only
139*e0e58e67SRyan Prichard  *     available for 32-bit applications running on ARMv8 CPU.
140*e0e58e67SRyan Prichard  *
141*e0e58e67SRyan Prichard  *   PMULL:
142*e0e58e67SRyan Prichard  *     CPU supports 64-bit PMULL and PMULL2 instructions. These
143*e0e58e67SRyan Prichard  *     instructions are only available for 32-bit applications
144*e0e58e67SRyan Prichard  *     running on ARMv8 CPU.
145*e0e58e67SRyan Prichard  *
146*e0e58e67SRyan Prichard  * If you want to tell the compiler to generate code that targets one of
147*e0e58e67SRyan Prichard  * the feature set above, you should probably use one of the following
148*e0e58e67SRyan Prichard  * flags (for more details, see technical note at the end of this file):
149*e0e58e67SRyan Prichard  *
150*e0e58e67SRyan Prichard  *   -mfpu=vfp
151*e0e58e67SRyan Prichard  *   -mfpu=vfpv2
152*e0e58e67SRyan Prichard  *     These are equivalent and tell GCC to use VFPv2 instructions for
153*e0e58e67SRyan Prichard  *     floating-point operations. Use this if you want your code to
154*e0e58e67SRyan Prichard  *     run on *some* ARMv6 devices, and any ARMv7-A device supported
155*e0e58e67SRyan Prichard  *     by Android.
156*e0e58e67SRyan Prichard  *
157*e0e58e67SRyan Prichard  *     Generated code requires VFPv2 feature.
158*e0e58e67SRyan Prichard  *
159*e0e58e67SRyan Prichard  *   -mfpu=vfpv3-d16
160*e0e58e67SRyan Prichard  *     Tell GCC to use VFPv3 instructions (using only 16 FPU registers).
161*e0e58e67SRyan Prichard  *     This should be generic code that runs on any CPU that supports the
162*e0e58e67SRyan Prichard  *     'armeabi-v7a' Android ABI. Note that no ARMv6 CPU supports this.
163*e0e58e67SRyan Prichard  *
164*e0e58e67SRyan Prichard  *     Generated code requires VFPv3 feature.
165*e0e58e67SRyan Prichard  *
166*e0e58e67SRyan Prichard  *   -mfpu=vfpv3
167*e0e58e67SRyan Prichard  *     Tell GCC to use VFPv3 instructions with 32 FPU registers.
168*e0e58e67SRyan Prichard  *     Generated code requires VFPv3|VFP_D32 features.
169*e0e58e67SRyan Prichard  *
170*e0e58e67SRyan Prichard  *   -mfpu=neon
171*e0e58e67SRyan Prichard  *     Tell GCC to use VFPv3 instructions with 32 FPU registers, and
172*e0e58e67SRyan Prichard  *     also support NEON intrinsics (see <arm_neon.h>).
173*e0e58e67SRyan Prichard  *     Generated code requires VFPv3|VFP_D32|NEON features.
174*e0e58e67SRyan Prichard  *
175*e0e58e67SRyan Prichard  *   -mfpu=vfpv4-d16
176*e0e58e67SRyan Prichard  *     Generated code requires VFPv3|VFP_FP16|VFP_FMA features.
177*e0e58e67SRyan Prichard  *
178*e0e58e67SRyan Prichard  *   -mfpu=vfpv4
179*e0e58e67SRyan Prichard  *     Generated code requires VFPv3|VFP_FP16|VFP_FMA|VFP_D32 features.
180*e0e58e67SRyan Prichard  *
181*e0e58e67SRyan Prichard  *   -mfpu=neon-vfpv4
182*e0e58e67SRyan Prichard  *     Generated code requires VFPv3|VFP_FP16|VFP_FMA|VFP_D32|NEON|NEON_FMA
183*e0e58e67SRyan Prichard  *     features.
184*e0e58e67SRyan Prichard  *
185*e0e58e67SRyan Prichard  *   -mcpu=cortex-a7
186*e0e58e67SRyan Prichard  *   -mcpu=cortex-a15
187*e0e58e67SRyan Prichard  *     Generated code requires VFPv3|VFP_FP16|VFP_FMA|VFP_D32|
188*e0e58e67SRyan Prichard  *                             NEON|NEON_FMA|IDIV_ARM|IDIV_THUMB2
189*e0e58e67SRyan Prichard  *     This flag implies -mfpu=neon-vfpv4.
190*e0e58e67SRyan Prichard  *
191*e0e58e67SRyan Prichard  *   -mcpu=iwmmxt
192*e0e58e67SRyan Prichard  *     Allows the use of iWMMXt instrinsics with GCC.
193*e0e58e67SRyan Prichard  *
194*e0e58e67SRyan Prichard  * IMPORTANT NOTE: These flags should only be tested when
195*e0e58e67SRyan Prichard  * android_getCpuFamily() returns ANDROID_CPU_FAMILY_ARM, i.e. this is a
196*e0e58e67SRyan Prichard  * 32-bit process.
197*e0e58e67SRyan Prichard  *
198*e0e58e67SRyan Prichard  * When running a 64-bit ARM process on an ARMv8 CPU,
199*e0e58e67SRyan Prichard  * android_getCpuFeatures() will return a different set of bitflags
200*e0e58e67SRyan Prichard  */
201*e0e58e67SRyan Prichard enum {
202*e0e58e67SRyan Prichard     ANDROID_CPU_ARM_FEATURE_ARMv7       = (1 << 0),
203*e0e58e67SRyan Prichard     ANDROID_CPU_ARM_FEATURE_VFPv3       = (1 << 1),
204*e0e58e67SRyan Prichard     ANDROID_CPU_ARM_FEATURE_NEON        = (1 << 2),
205*e0e58e67SRyan Prichard     ANDROID_CPU_ARM_FEATURE_LDREX_STREX = (1 << 3),
206*e0e58e67SRyan Prichard     ANDROID_CPU_ARM_FEATURE_VFPv2       = (1 << 4),
207*e0e58e67SRyan Prichard     ANDROID_CPU_ARM_FEATURE_VFP_D32     = (1 << 5),
208*e0e58e67SRyan Prichard     ANDROID_CPU_ARM_FEATURE_VFP_FP16    = (1 << 6),
209*e0e58e67SRyan Prichard     ANDROID_CPU_ARM_FEATURE_VFP_FMA     = (1 << 7),
210*e0e58e67SRyan Prichard     ANDROID_CPU_ARM_FEATURE_NEON_FMA    = (1 << 8),
211*e0e58e67SRyan Prichard     ANDROID_CPU_ARM_FEATURE_IDIV_ARM    = (1 << 9),
212*e0e58e67SRyan Prichard     ANDROID_CPU_ARM_FEATURE_IDIV_THUMB2 = (1 << 10),
213*e0e58e67SRyan Prichard     ANDROID_CPU_ARM_FEATURE_iWMMXt      = (1 << 11),
214*e0e58e67SRyan Prichard     ANDROID_CPU_ARM_FEATURE_AES         = (1 << 12),
215*e0e58e67SRyan Prichard     ANDROID_CPU_ARM_FEATURE_PMULL       = (1 << 13),
216*e0e58e67SRyan Prichard     ANDROID_CPU_ARM_FEATURE_SHA1        = (1 << 14),
217*e0e58e67SRyan Prichard     ANDROID_CPU_ARM_FEATURE_SHA2        = (1 << 15),
218*e0e58e67SRyan Prichard     ANDROID_CPU_ARM_FEATURE_CRC32       = (1 << 16),
219*e0e58e67SRyan Prichard };
220*e0e58e67SRyan Prichard 
221*e0e58e67SRyan Prichard /* The bit flags corresponding to the output of android_getCpuFeatures()
222*e0e58e67SRyan Prichard  * when android_getCpuFamily() returns ANDROID_CPU_FAMILY_ARM64. Value details
223*e0e58e67SRyan Prichard  * are:
224*e0e58e67SRyan Prichard  *
225*e0e58e67SRyan Prichard  *   FP:
226*e0e58e67SRyan Prichard  *     CPU has Floating-point unit.
227*e0e58e67SRyan Prichard  *
228*e0e58e67SRyan Prichard  *   ASIMD:
229*e0e58e67SRyan Prichard  *     CPU has Advanced SIMD unit.
230*e0e58e67SRyan Prichard  *
231*e0e58e67SRyan Prichard  *   AES:
232*e0e58e67SRyan Prichard  *     CPU supports AES instructions.
233*e0e58e67SRyan Prichard  *
234*e0e58e67SRyan Prichard  *   CRC32:
235*e0e58e67SRyan Prichard  *     CPU supports CRC32 instructions.
236*e0e58e67SRyan Prichard  *
237*e0e58e67SRyan Prichard  *   SHA2:
238*e0e58e67SRyan Prichard  *     CPU supports SHA2 instructions.
239*e0e58e67SRyan Prichard  *
240*e0e58e67SRyan Prichard  *   SHA1:
241*e0e58e67SRyan Prichard  *     CPU supports SHA1 instructions.
242*e0e58e67SRyan Prichard  *
243*e0e58e67SRyan Prichard  *   PMULL:
244*e0e58e67SRyan Prichard  *     CPU supports 64-bit PMULL and PMULL2 instructions.
245*e0e58e67SRyan Prichard  */
246*e0e58e67SRyan Prichard enum {
247*e0e58e67SRyan Prichard     ANDROID_CPU_ARM64_FEATURE_FP      = (1 << 0),
248*e0e58e67SRyan Prichard     ANDROID_CPU_ARM64_FEATURE_ASIMD   = (1 << 1),
249*e0e58e67SRyan Prichard     ANDROID_CPU_ARM64_FEATURE_AES     = (1 << 2),
250*e0e58e67SRyan Prichard     ANDROID_CPU_ARM64_FEATURE_PMULL   = (1 << 3),
251*e0e58e67SRyan Prichard     ANDROID_CPU_ARM64_FEATURE_SHA1    = (1 << 4),
252*e0e58e67SRyan Prichard     ANDROID_CPU_ARM64_FEATURE_SHA2    = (1 << 5),
253*e0e58e67SRyan Prichard     ANDROID_CPU_ARM64_FEATURE_CRC32   = (1 << 6),
254*e0e58e67SRyan Prichard };
255*e0e58e67SRyan Prichard 
256*e0e58e67SRyan Prichard /* The bit flags corresponding to the output of android_getCpuFeatures()
257*e0e58e67SRyan Prichard  * when android_getCpuFamily() returns ANDROID_CPU_FAMILY_X86 or
258*e0e58e67SRyan Prichard  * ANDROID_CPU_FAMILY_X86_64.
259*e0e58e67SRyan Prichard  */
260*e0e58e67SRyan Prichard enum {
261*e0e58e67SRyan Prichard     ANDROID_CPU_X86_FEATURE_SSSE3  = (1 << 0),
262*e0e58e67SRyan Prichard     ANDROID_CPU_X86_FEATURE_POPCNT = (1 << 1),
263*e0e58e67SRyan Prichard     ANDROID_CPU_X86_FEATURE_MOVBE  = (1 << 2),
264*e0e58e67SRyan Prichard     ANDROID_CPU_X86_FEATURE_SSE4_1 = (1 << 3),
265*e0e58e67SRyan Prichard     ANDROID_CPU_X86_FEATURE_SSE4_2 = (1 << 4),
266*e0e58e67SRyan Prichard     ANDROID_CPU_X86_FEATURE_AES_NI = (1 << 5),
267*e0e58e67SRyan Prichard     ANDROID_CPU_X86_FEATURE_AVX =    (1 << 6),
268*e0e58e67SRyan Prichard     ANDROID_CPU_X86_FEATURE_RDRAND = (1 << 7),
269*e0e58e67SRyan Prichard     ANDROID_CPU_X86_FEATURE_AVX2 =   (1 << 8),
270*e0e58e67SRyan Prichard     ANDROID_CPU_X86_FEATURE_SHA_NI = (1 << 9),
271*e0e58e67SRyan Prichard };
272*e0e58e67SRyan Prichard 
273*e0e58e67SRyan Prichard /* The bit flags corresponding to the output of android_getCpuFeatures()
274*e0e58e67SRyan Prichard  * when android_getCpuFamily() returns ANDROID_CPU_FAMILY_MIPS
275*e0e58e67SRyan Prichard  * or ANDROID_CPU_FAMILY_MIPS64.  Values are:
276*e0e58e67SRyan Prichard  *
277*e0e58e67SRyan Prichard  *   R6:
278*e0e58e67SRyan Prichard  *     CPU executes MIPS Release 6 instructions natively, and
279*e0e58e67SRyan Prichard  *     supports obsoleted R1..R5 instructions only via kernel traps.
280*e0e58e67SRyan Prichard  *
281*e0e58e67SRyan Prichard  *   MSA:
282*e0e58e67SRyan Prichard  *     CPU supports Mips SIMD Architecture instructions.
283*e0e58e67SRyan Prichard  */
284*e0e58e67SRyan Prichard enum {
285*e0e58e67SRyan Prichard     ANDROID_CPU_MIPS_FEATURE_R6    = (1 << 0),
286*e0e58e67SRyan Prichard     ANDROID_CPU_MIPS_FEATURE_MSA   = (1 << 1),
287*e0e58e67SRyan Prichard };
288*e0e58e67SRyan Prichard 
289*e0e58e67SRyan Prichard 
290*e0e58e67SRyan Prichard /* Return the number of CPU cores detected on this device. */
291*e0e58e67SRyan Prichard extern int android_getCpuCount(void);
292*e0e58e67SRyan Prichard 
293*e0e58e67SRyan Prichard /* The following is used to force the CPU count and features
294*e0e58e67SRyan Prichard  * mask in sandboxed processes. Under 4.1 and higher, these processes
295*e0e58e67SRyan Prichard  * cannot access /proc, which is the only way to get information from
296*e0e58e67SRyan Prichard  * the kernel about the current hardware (at least on ARM).
297*e0e58e67SRyan Prichard  *
298*e0e58e67SRyan Prichard  * It _must_ be called only once, and before any android_getCpuXXX
299*e0e58e67SRyan Prichard  * function, any other case will fail.
300*e0e58e67SRyan Prichard  *
301*e0e58e67SRyan Prichard  * This function return 1 on success, and 0 on failure.
302*e0e58e67SRyan Prichard  */
303*e0e58e67SRyan Prichard extern int android_setCpu(int      cpu_count,
304*e0e58e67SRyan Prichard                           uint64_t cpu_features);
305*e0e58e67SRyan Prichard 
306*e0e58e67SRyan Prichard #ifdef __arm__
307*e0e58e67SRyan Prichard /* Retrieve the ARM 32-bit CPUID value from the kernel.
308*e0e58e67SRyan Prichard  * Note that this cannot work on sandboxed processes under 4.1 and
309*e0e58e67SRyan Prichard  * higher, unless you called android_setCpuArm() before.
310*e0e58e67SRyan Prichard  */
311*e0e58e67SRyan Prichard extern uint32_t android_getCpuIdArm(void);
312*e0e58e67SRyan Prichard 
313*e0e58e67SRyan Prichard /* An ARM-specific variant of android_setCpu() that also allows you
314*e0e58e67SRyan Prichard  * to set the ARM CPUID field.
315*e0e58e67SRyan Prichard  */
316*e0e58e67SRyan Prichard extern int android_setCpuArm(int      cpu_count,
317*e0e58e67SRyan Prichard                              uint64_t cpu_features,
318*e0e58e67SRyan Prichard                              uint32_t cpu_id);
319*e0e58e67SRyan Prichard #endif
320*e0e58e67SRyan Prichard 
321*e0e58e67SRyan Prichard __END_DECLS
322