1*f5c631daSSadaf EbrahimiExtending the disassembler 2*f5c631daSSadaf Ebrahimi========================== 3*f5c631daSSadaf Ebrahimi 4*f5c631daSSadaf EbrahimiThe output of the disassembler can be extended and customized. This may be 5*f5c631daSSadaf Ebrahimiuseful for example to add comments and annotations to the disassembly, print 6*f5c631daSSadaf Ebrahimialiases for register names, or add an offset to disassembled addresses. 7*f5c631daSSadaf Ebrahimi 8*f5c631daSSadaf EbrahimiThe general procedure to achieve this is to create a sub-class of 9*f5c631daSSadaf Ebrahimi`Disassembler` and override the appropriate virtual functions. 10*f5c631daSSadaf Ebrahimi 11*f5c631daSSadaf EbrahimiThe `Disassembler` class provides virtual methods that implement how specific 12*f5c631daSSadaf Ebrahimidisassembly elements are printed. See 13*f5c631daSSadaf Ebrahimi[src/aarch64/disasm-aarch64.h](/src/aarch64/disasm-aarch64.h) for details. 14*f5c631daSSadaf EbrahimiThese include functions like: 15*f5c631daSSadaf Ebrahimi 16*f5c631daSSadaf Ebrahimi virtual void AppendRegisterNameToOutput(const Instruction* instr, 17*f5c631daSSadaf Ebrahimi const CPURegister& reg); 18*f5c631daSSadaf Ebrahimi virtual void AppendPCRelativeOffsetToOutput(const Instruction* instr, 19*f5c631daSSadaf Ebrahimi int64_t offset); 20*f5c631daSSadaf Ebrahimi virtual void AppendCodeRelativeAddressToOutput(const Instruction* instr, 21*f5c631daSSadaf Ebrahimi const void* addr); 22*f5c631daSSadaf Ebrahimi virtual void AppendCodeRelativeCodeAddressToOutput(const Instruction* instr, 23*f5c631daSSadaf Ebrahimi const void* addr); 24*f5c631daSSadaf Ebrahimi 25*f5c631daSSadaf EbrahimiThey can be overridden for example to use different register names and annotate 26*f5c631daSSadaf Ebrahimicode addresses. 27*f5c631daSSadaf Ebrahimi 28*f5c631daSSadaf EbrahimiMore complex modifications can be performed by overriding the visitor functions 29*f5c631daSSadaf Ebrahimiof the disassembler. The VIXL `Decoder` uses a visitor pattern implementation, 30*f5c631daSSadaf Ebrahimiso the `Disassembler` (as a sub-class of `DecoderVisitor`) must provide a 31*f5c631daSSadaf Ebrahimivisitor function for each sub-type of instructions. The complete list of 32*f5c631daSSadaf Ebrahimivisitors is defined by the macro `VISITOR_LIST` in 33*f5c631daSSadaf Ebrahimi[src/aarch64/decoder-aarch64.h](/src/aarch64/decoder-aarch64.h). 34*f5c631daSSadaf Ebrahimi 35*f5c631daSSadaf EbrahimiThe [/examples/custom-disassembler.h](/examples/custom-disassembler.h) and 36*f5c631daSSadaf Ebrahimi[/examples/custom-disassembler.cc](/examples/custom-disassembler.cc) example 37*f5c631daSSadaf Ebrahimifiles show how the methods can be overridden to use different register names, 38*f5c631daSSadaf Ebrahimimap code addresses, annotate code addresses, and add comments: 39*f5c631daSSadaf Ebrahimi 40*f5c631daSSadaf Ebrahimi VIXL disasm 0x7fff04cb05e0: add x10, x16, x17 41*f5c631daSSadaf Ebrahimi custom disasm -0x8: add x10, ip0, ip1 // add/sub to x10 42*f5c631daSSadaf Ebrahimi 43*f5c631daSSadaf Ebrahimi VIXL disasm 0x7fff04cb05e4: cbz x10, #+0x28 (addr 0x7fff04cb060c) 44*f5c631daSSadaf Ebrahimi custom disasm -0x4: cbz x10, #+0x28 (addr 0x24 ; label: somewhere) 45*f5c631daSSadaf Ebrahimi 46*f5c631daSSadaf Ebrahimi VIXL disasm 0x7fff04cb05e8: add x11, x16, x17 47*f5c631daSSadaf Ebrahimi custom disasm 0x0: add x11, ip0, ip1 48*f5c631daSSadaf Ebrahimi 49*f5c631daSSadaf Ebrahimi VIXL disasm 0x7fff04cb05ec: add w5, w6, w30 50*f5c631daSSadaf Ebrahimi custom disasm 0x4: add w5, w6, w30 51*f5c631daSSadaf Ebrahimi 52*f5c631daSSadaf Ebrahimi VIXL disasm 0x7fff04cb05f0: tbz w10, #2, #-0x10 (addr 0x7fff04cb05e0) 53*f5c631daSSadaf Ebrahimi custom disasm 0x8: tbz w10, #2, #-0x10 (addr -0x8) 54*f5c631daSSadaf Ebrahimi 55*f5c631daSSadaf Ebrahimi 56*f5c631daSSadaf EbrahimiOne can refer to the implementation of visitor functions for the `Disassembler` 57*f5c631daSSadaf Ebrahimi(in [src/aarch64/disasm-aarch64.cc](/src/aarch64/disasm-aarch64.cc)) or even 58*f5c631daSSadaf Ebrahimifor the `Simulator` 59*f5c631daSSadaf Ebrahimi(in [src/aarch64/simulator-aarch64.cc](/src/aarch64/simulator-aarch64.cc)) 60*f5c631daSSadaf Ebrahimito see how to extract information from instructions. 61