1*758e9fbaSOystein Eftevaag.SH AUTHOR 2*758e9fbaSOystein EftevaagPhilip Tricca <[email protected]> 3*758e9fbaSOystein Eftevaag.SH "SEE ALSO" 4*758e9fbaSOystein Eftevaag.BR Tss2_Tcti_Device_Init (3), 5*758e9fbaSOystein Eftevaag.BR Tss2_Tcti_Socket_Init (3), 6*758e9fbaSOystein Eftevaag.BR Tss2_TctiLdr_Initialize (3), 7*758e9fbaSOystein Eftevaag.BR Tss2_TctiLdr_Finalize (3), 8*758e9fbaSOystein Eftevaag.BR tcti-device (7), 9*758e9fbaSOystein Eftevaag.BR tcti-socket (7), 10*758e9fbaSOystein Eftevaag.BR tcti-tabrmd (7), 11*758e9fbaSOystein Eftevaag.BR tpm2-abrmd (8) 12*758e9fbaSOystein Eftevaag.SH COLOPHON 13*758e9fbaSOystein EftevaagThis page is part of release @VERSION@ of Intel's implementation of the TCG 14*758e9fbaSOystein EftevaagTPM2 Software Stack (TSS2). A description of the project, information about 15*758e9fbaSOystein Eftevaagreporting bugs, and the latest version of this page can be found at 16*758e9fbaSOystein Eftevaag\%https://github.com/tpm2-software/tpm2-tss/. 17