1 /* 2 * Copyright 2023 Google LLC 3 * SPDX-License-Identifier: MIT 4 */ 5 6 #include "amdgpu_devices.h" 7 #include "util/macros.h" 8 9 const struct amdgpu_device amdgpu_devices[] = { 10 { 11 .name = "renoir", 12 .radeon_family = CHIP_RENOIR, 13 .hw_ip_gfx = { 14 .hw_ip_version_major = 9, 15 .ib_start_alignment = 32, 16 .ib_size_alignment = 32, 17 .available_rings = 0x1, 18 .ip_discovery_version = 0x90300, 19 }, 20 .hw_ip_compute = { 21 .hw_ip_version_major = 9, 22 .ib_start_alignment = 32, 23 .ib_size_alignment = 32, 24 .available_rings = 0xf, 25 .ip_discovery_version = 0x90300, 26 }, 27 .fw_gfx_me = { 28 .ver = 166, 29 .feature = 53, 30 }, 31 .fw_gfx_pfp = { 32 .ver = 194, 33 .feature = 53, 34 }, 35 .fw_gfx_mec = { 36 .ver = 464, 37 .feature = 53, 38 }, 39 .mmr_regs = { 40 0x263e, 0xffffffff, 0x26010042, 41 }, 42 .mmr_reg_count = 1, 43 .dev = { 44 .device_id = 0x15e7, 45 .external_rev = 0xa1, 46 .pci_rev = 0xe9, 47 .family = AMDGPU_FAMILY_RV, 48 .num_shader_engines = 1, 49 .num_shader_arrays_per_engine = 1, 50 .gpu_counter_freq = 100000, 51 .max_engine_clock = 1800000, 52 .max_memory_clock = 1333000, 53 .cu_active_number = 7, 54 .cu_ao_mask = 0xfe, 55 .cu_bitmap[0][0] = 0xfe, 56 .enabled_rb_pipes_mask = 0x3, 57 .num_rb_pipes = 2, 58 .num_hw_gfx_contexts = 8, 59 .ids_flags = 0x5, 60 .virtual_address_offset = 0x200000, 61 .virtual_address_max = UINT64_C(0x800000000000), 62 .virtual_address_alignment = 4096, 63 .pte_fragment_size = 2097152, 64 .gart_page_size = 4096, 65 .ce_ram_size = 32768, 66 .vram_type = 11, 67 .vram_bit_width = 128, 68 .gc_double_offchip_lds_buf = 1, 69 .wave_front_size = 64, 70 .num_shader_visible_vgprs = 256, 71 .num_cu_per_sh = 8, 72 .num_tcc_blocks = 4, 73 .gs_vgt_table_depth = 32, 74 .gs_prim_buffer_depth = 1792, 75 .max_gs_waves_per_vgt = 32, 76 .cu_ao_bitmap[0][0] = 0xfe, 77 .high_va_offset = UINT64_C(0xffff800000000000), 78 .high_va_max = UINT64_C(0xffffffffffe00000), 79 }, 80 .mem = { 81 .vram = { 82 .total_heap_size = UINT64_C(64) << 20, 83 }, 84 .cpu_accessible_vram = { 85 .total_heap_size = UINT64_C(64) << 20, 86 }, 87 .gtt = { 88 .total_heap_size = UINT64_C(4096) << 20, 89 }, 90 }, 91 }, 92 { 93 .name = "raven", 94 .radeon_family = CHIP_RAVEN, 95 .hw_ip_gfx = { 96 .hw_ip_version_major = 9, 97 .ib_start_alignment = 32, 98 .ib_size_alignment = 32, 99 .available_rings = 0x1, 100 }, 101 .hw_ip_compute = { 102 .hw_ip_version_major = 9, 103 .ib_start_alignment = 32, 104 .ib_size_alignment = 32, 105 .available_rings = 0xf, 106 }, 107 .fw_gfx_me = { 108 .ver = 162, 109 .feature = 47, 110 }, 111 .fw_gfx_pfp = { 112 .ver = 185, 113 .feature = 47, 114 }, 115 .fw_gfx_mec = { 116 .ver = 427, 117 .feature = 47, 118 }, 119 .mmr_regs = { 120 0x263e, 0xffffffff, 0x24000042, 121 }, 122 .mmr_reg_count = 1, 123 .dev = { 124 .device_id = 0x15d8, 125 .chip_rev = 0x01, 126 .external_rev = 0x42, 127 .pci_rev = 0xc1, 128 .family = AMDGPU_FAMILY_RV, 129 .num_shader_engines = 1, 130 .num_shader_arrays_per_engine = 1, 131 .gpu_counter_freq = 25000, 132 .max_engine_clock = 1400000, 133 .max_memory_clock = 1200000, 134 .cu_active_number = 10, 135 .cu_ao_mask = 0x3ff, 136 .cu_bitmap[0][0] = 0x3ff, 137 .enabled_rb_pipes_mask = 0x3, 138 .num_rb_pipes = 2, 139 .num_hw_gfx_contexts = 8, 140 .ids_flags = 0x1, 141 .virtual_address_offset = 0x200000, 142 .virtual_address_max = UINT64_C(0x800000000000), 143 .virtual_address_alignment = 4096, 144 .pte_fragment_size = 2097152, 145 .gart_page_size = 4096, 146 .ce_ram_size = 32768, 147 .vram_type = 8, 148 .vram_bit_width = 128, 149 .gc_double_offchip_lds_buf = 1, 150 .wave_front_size = 64, 151 .num_shader_visible_vgprs = 256, 152 .num_cu_per_sh = 11, 153 .num_tcc_blocks = 4, 154 .gs_vgt_table_depth = 32, 155 .gs_prim_buffer_depth = 1792, 156 .max_gs_waves_per_vgt = 32, 157 .cu_ao_bitmap[0][0] = 0x3ff, 158 .high_va_offset = UINT64_C(0xffff800000000000), 159 .high_va_max = UINT64_C(0xffffffffffe00000), 160 }, 161 .mem = { 162 .vram = { 163 .total_heap_size = UINT64_C(64) << 20, 164 }, 165 .cpu_accessible_vram = { 166 .total_heap_size = UINT64_C(64) << 20, 167 }, 168 .gtt = { 169 .total_heap_size = UINT64_C(3072) << 20, 170 }, 171 }, 172 }, 173 { 174 .name = "raven2", 175 .radeon_family = CHIP_RAVEN2, 176 .hw_ip_gfx = { 177 .hw_ip_version_major = 9, 178 .hw_ip_version_minor = 0, 179 .capabilities_flags = UINT64_C(0), 180 .ib_start_alignment = 32, 181 .ib_size_alignment = 32, 182 .available_rings = 0x1, 183 .ip_discovery_version = 0x0000, 184 }, 185 .hw_ip_compute = { 186 .hw_ip_version_major = 9, 187 .hw_ip_version_minor = 0, 188 .capabilities_flags = UINT64_C(0), 189 .ib_start_alignment = 32, 190 .ib_size_alignment = 32, 191 .available_rings = 0xf, 192 .ip_discovery_version = 0x0000, 193 }, 194 .fw_gfx_me = { 195 .ver = 166, 196 .feature = 53, 197 }, 198 .fw_gfx_pfp = { 199 .ver = 194, 200 .feature = 53, 201 }, 202 .fw_gfx_mec = { 203 .ver = 464, 204 .feature = 53, 205 }, 206 .mmr_regs = { 207 0x263e, 0xffffffff, 0x26013041, 208 }, 209 .mmr_reg_count = 1, 210 .dev = { 211 .device_id = 0x15d8, 212 .chip_rev = 0x09, 213 .external_rev = 0x82, 214 .pci_rev = 0xea, 215 .family = AMDGPU_FAMILY_RV, 216 .num_shader_engines = 1, 217 .num_shader_arrays_per_engine = 1, 218 .gpu_counter_freq = 100000, 219 .max_engine_clock = UINT64_C(600000), 220 .max_memory_clock = UINT64_C(800000), 221 .cu_active_number = 3, 222 .cu_ao_mask = 0x7, 223 .cu_bitmap = { 224 { 0x7, 0x0, 0x0, 0x0, }, 225 { 0x0, 0x0, 0x0, 0x0, }, 226 { 0x0, 0x0, 0x0, 0x0, }, 227 { 0x0, 0x0, 0x0, 0x0, }, 228 }, 229 .enabled_rb_pipes_mask = 0x1, 230 .num_rb_pipes = 1, 231 .num_hw_gfx_contexts = 8, 232 .pcie_gen = 0, 233 .ids_flags = UINT64_C(0x1), 234 .virtual_address_offset = UINT64_C(0x200000), 235 .virtual_address_max = UINT64_C(0x800000000000), 236 .virtual_address_alignment = 4096, 237 .pte_fragment_size = 2097152, 238 .gart_page_size = 4096, 239 .ce_ram_size = 32768, 240 .vram_type = 8, 241 .vram_bit_width = 64, 242 .vce_harvest_config = 0, 243 .gc_double_offchip_lds_buf = 1, 244 .prim_buf_gpu_addr = UINT64_C(0), 245 .pos_buf_gpu_addr = UINT64_C(0), 246 .cntl_sb_buf_gpu_addr = UINT64_C(0), 247 .param_buf_gpu_addr = UINT64_C(0), 248 .prim_buf_size = 0, 249 .pos_buf_size = 0, 250 .cntl_sb_buf_size = 0, 251 .param_buf_size = 0, 252 .wave_front_size = 64, 253 .num_shader_visible_vgprs = 256, 254 .num_cu_per_sh = 3, 255 .num_tcc_blocks = 2, 256 .gs_vgt_table_depth = 32, 257 .gs_prim_buffer_depth = 1792, 258 .max_gs_waves_per_vgt = 32, 259 .pcie_num_lanes = 0, 260 .cu_ao_bitmap = { 261 { 0x7, 0x0, 0x0, 0x0, }, 262 { 0x0, 0x0, 0x0, 0x0, }, 263 { 0x0, 0x0, 0x0, 0x0, }, 264 { 0x0, 0x0, 0x0, 0x0, }, 265 }, 266 .high_va_offset = UINT64_C(0xffff800000000000), 267 .high_va_max = UINT64_C(0xffffffffffe00000), 268 .pa_sc_tile_steering_override = 0, 269 .tcc_disabled_mask = UINT64_C(0), 270 .min_engine_clock = UINT64_C(0), 271 .min_memory_clock = UINT64_C(0), 272 .tcp_cache_size = 0, 273 .num_sqc_per_wgp = 0, 274 .sqc_data_cache_size = 0, 275 .sqc_inst_cache_size = 0, 276 .gl1c_cache_size = 0, 277 .gl2c_cache_size = 0, 278 .mall_size = UINT64_C(0), 279 .enabled_rb_pipes_mask_hi = 0, 280 }, 281 .mem = { 282 .vram = { 283 .total_heap_size = UINT64_C(67108864), 284 .usable_heap_size = UINT64_C(50491392), 285 .heap_usage = UINT64_C(51437568), 286 .max_allocation = UINT64_C(37868544), 287 }, 288 .cpu_accessible_vram = { 289 .total_heap_size = UINT64_C(67108864), 290 .usable_heap_size = UINT64_C(50491392), 291 .heap_usage = UINT64_C(51437568), 292 .max_allocation = UINT64_C(37868544), 293 }, 294 .gtt = { 295 .total_heap_size = UINT64_C(3057070080), 296 .usable_heap_size = UINT64_C(3052445696), 297 .heap_usage = UINT64_C(62390272), 298 .max_allocation = UINT64_C(2289334272), 299 }, 300 }, 301 }, 302 { 303 .name = "stoney", 304 .radeon_family = CHIP_STONEY, 305 .hw_ip_gfx = { 306 .hw_ip_version_major = 8, 307 .hw_ip_version_minor = 1, 308 .ib_start_alignment = 32, 309 .ib_size_alignment = 32, 310 .available_rings = 0x1, 311 }, 312 .hw_ip_compute = { 313 .hw_ip_version_major = 8, 314 .hw_ip_version_minor = 1, 315 .ib_start_alignment = 32, 316 .ib_size_alignment = 32, 317 .available_rings = 0xf, 318 }, 319 .fw_gfx_me = { 320 .ver = 52, 321 .feature = 35, 322 }, 323 .fw_gfx_pfp = { 324 .ver = 77, 325 .feature = 35, 326 }, 327 .fw_gfx_mec = { 328 .ver = 134, 329 .feature = 35, 330 }, 331 .mmr_regs = { 332 0x263e, 0xffffffff, 0x02010001, 333 0x263d, 0x0000ff00, 0x00000000, 334 0xa0d4, 0x0000ff00, 0x00000000, 335 0xa0d5, 0x0000ff00, 0x00000000, 336 0x09d8, 0xffffffff, 0x00007111, 337 0x2644, 0xffffffff, 0x00800010, 338 0x2645, 0xffffffff, 0x00800810, 339 0x2646, 0xffffffff, 0x00801010, 340 0x2647, 0xffffffff, 0x00801810, 341 0x2648, 0xffffffff, 0x00802810, 342 0x2649, 0xffffffff, 0x00802808, 343 0x264a, 0xffffffff, 0x00802814, 344 0x264b, 0xffffffff, 0x00000000, 345 0x264c, 0xffffffff, 0x00000004, 346 0x264d, 0xffffffff, 0x02000008, 347 0x264e, 0xffffffff, 0x02000010, 348 0x264f, 0xffffffff, 0x06000014, 349 0x2650, 0xffffffff, 0x00000000, 350 0x2651, 0xffffffff, 0x02400008, 351 0x2652, 0xffffffff, 0x02400010, 352 0x2653, 0xffffffff, 0x02400030, 353 0x2654, 0xffffffff, 0x06400014, 354 0x2655, 0xffffffff, 0x00000000, 355 0x2656, 0xffffffff, 0x0040000c, 356 0x2657, 0xffffffff, 0x0100000c, 357 0x2658, 0xffffffff, 0x0100001c, 358 0x2659, 0xffffffff, 0x01000034, 359 0x265a, 0xffffffff, 0x01000024, 360 0x265b, 0xffffffff, 0x00000000, 361 0x265c, 0xffffffff, 0x0040001c, 362 0x265d, 0xffffffff, 0x01000020, 363 0x265e, 0xffffffff, 0x01000038, 364 0x265f, 0xffffffff, 0x02c00008, 365 0x2660, 0xffffffff, 0x02c00010, 366 0x2661, 0xffffffff, 0x06c00014, 367 0x2662, 0xffffffff, 0x00000000, 368 0x2663, 0xffffffff, 0x00000000, 369 0x2664, 0xffffffff, 0x000000a8, 370 0x2665, 0xffffffff, 0x000000a4, 371 0x2666, 0xffffffff, 0x00000090, 372 0x2667, 0xffffffff, 0x00000090, 373 0x2668, 0xffffffff, 0x00000090, 374 0x2669, 0xffffffff, 0x00000090, 375 0x266a, 0xffffffff, 0x00000090, 376 0x266b, 0xffffffff, 0x00000000, 377 0x266c, 0xffffffff, 0x000000ee, 378 0x266d, 0xffffffff, 0x000000ea, 379 0x266e, 0xffffffff, 0x000000e9, 380 0x266f, 0xffffffff, 0x000000e5, 381 0x2670, 0xffffffff, 0x000000e4, 382 0x2671, 0xffffffff, 0x000000e0, 383 0x2672, 0xffffffff, 0x00000090, 384 0x2673, 0xffffffff, 0x00000000, 385 }, 386 .mmr_reg_count = 53, 387 .dev = { 388 .device_id = 0x98e4, 389 .external_rev = 0x61, 390 .pci_rev = 0xeb, 391 .family = AMDGPU_FAMILY_CZ, 392 .num_shader_engines = 1, 393 .num_shader_arrays_per_engine = 1, 394 .gpu_counter_freq = 48000, 395 .max_engine_clock = 600000, 396 .max_memory_clock = 933000, 397 .cu_active_number = 3, 398 .cu_ao_mask = 0x3, 399 .cu_bitmap[0][0] = 0x7, 400 .enabled_rb_pipes_mask = 0x1, 401 .num_rb_pipes = 1, 402 .num_hw_gfx_contexts = 8, 403 .ids_flags = 0x1, 404 .virtual_address_offset = 0x200000, 405 .virtual_address_max = UINT64_C(0xfffe00000), 406 .virtual_address_alignment = 4096, 407 .pte_fragment_size = 2097152, 408 .gart_page_size = 4096, 409 .ce_ram_size = 32768, 410 .vram_bit_width = 64, 411 .vce_harvest_config = 2, 412 .wave_front_size = 64, 413 .num_shader_visible_vgprs = 256, 414 .num_cu_per_sh = 3, 415 .num_tcc_blocks = 2, 416 .max_gs_waves_per_vgt = 16, 417 .cu_ao_bitmap[0][0] = 0x3, 418 }, 419 .mem = { 420 .vram = { 421 .total_heap_size = UINT64_C(16) << 20, 422 }, 423 .cpu_accessible_vram = { 424 .total_heap_size = UINT64_C(16) << 20, 425 }, 426 .gtt = { 427 .total_heap_size = UINT64_C(3072) << 20, 428 }, 429 }, 430 }, 431 { 432 .name = "vangogh", 433 .radeon_family = CHIP_VANGOGH, 434 .hw_ip_gfx = { 435 .hw_ip_version_major = 10, 436 .hw_ip_version_minor = 0, 437 .capabilities_flags = UINT64_C(0), 438 .ib_start_alignment = 32, 439 .ib_size_alignment = 32, 440 .available_rings = 0x1, 441 .ip_discovery_version = 0x0000, 442 }, 443 .hw_ip_compute = { 444 .hw_ip_version_major = 10, 445 .hw_ip_version_minor = 0, 446 .capabilities_flags = UINT64_C(0), 447 .ib_start_alignment = 32, 448 .ib_size_alignment = 32, 449 .available_rings = 0xf, 450 .ip_discovery_version = 0x0000, 451 }, 452 .fw_gfx_me = { 453 .ver = 64, 454 .feature = 41, 455 }, 456 .fw_gfx_pfp = { 457 .ver = 95, 458 .feature = 41, 459 }, 460 .fw_gfx_mec = { 461 .ver = 98, 462 .feature = 41, 463 }, 464 .mmr_regs = { 465 0x263e, 0xffffffff, 0x00000142, 466 }, 467 .mmr_reg_count = 1, 468 .dev = { 469 .device_id = 0x163f, 470 .chip_rev = 0x00, 471 .external_rev = 0x01, 472 .pci_rev = 0xae, 473 .family = AMDGPU_FAMILY_VGH, 474 .num_shader_engines = 1, 475 .num_shader_arrays_per_engine = 1, 476 .gpu_counter_freq = 100000, 477 .max_engine_clock = UINT64_C(0), 478 .max_memory_clock = UINT64_C(0), 479 .cu_active_number = 8, 480 .cu_ao_mask = 0xff, 481 .cu_bitmap = { 482 { 0xff, 0x0, 0x0, 0x0, }, 483 { 0x0, 0x0, 0x0, 0x0, }, 484 { 0x0, 0x0, 0x0, 0x0, }, 485 { 0x0, 0x0, 0x0, 0x0, }, 486 }, 487 .enabled_rb_pipes_mask = 0x3, 488 .num_rb_pipes = 2, 489 .num_hw_gfx_contexts = 8, 490 .pcie_gen = 0, 491 .ids_flags = UINT64_C(0x1), 492 .virtual_address_offset = UINT64_C(0x200000), 493 .virtual_address_max = UINT64_C(0x800000000000), 494 .virtual_address_alignment = 4096, 495 .pte_fragment_size = 2097152, 496 .gart_page_size = 4096, 497 .ce_ram_size = 65536, 498 .vram_type = 10, 499 .vram_bit_width = 256, 500 .vce_harvest_config = 0, 501 .gc_double_offchip_lds_buf = 1, 502 .prim_buf_gpu_addr = UINT64_C(0), 503 .pos_buf_gpu_addr = UINT64_C(0), 504 .cntl_sb_buf_gpu_addr = UINT64_C(0), 505 .param_buf_gpu_addr = UINT64_C(0), 506 .prim_buf_size = 0, 507 .pos_buf_size = 0, 508 .cntl_sb_buf_size = 0, 509 .param_buf_size = 0, 510 .wave_front_size = 32, 511 .num_shader_visible_vgprs = 1024, 512 .num_cu_per_sh = 8, 513 .num_tcc_blocks = 4, 514 .gs_vgt_table_depth = 32, 515 .gs_prim_buffer_depth = 1792, 516 .max_gs_waves_per_vgt = 32, 517 .pcie_num_lanes = 0, 518 .cu_ao_bitmap = { 519 { 0xff, 0x0, 0x0, 0x0, }, 520 { 0x0, 0x0, 0x0, 0x0, }, 521 { 0x0, 0x0, 0x0, 0x0, }, 522 { 0x0, 0x0, 0x0, 0x0, }, 523 }, 524 .high_va_offset = UINT64_C(0xffff800000000000), 525 .high_va_max = UINT64_C(0xffffffffffe00000), 526 .pa_sc_tile_steering_override = 0, 527 .tcc_disabled_mask = UINT64_C(0), 528 .min_engine_clock = UINT64_C(0), 529 .min_memory_clock = UINT64_C(0), 530 .tcp_cache_size = 0, 531 .num_sqc_per_wgp = 0, 532 .sqc_data_cache_size = 0, 533 .sqc_inst_cache_size = 0, 534 .gl1c_cache_size = 0, 535 .gl2c_cache_size = 0, 536 .mall_size = UINT64_C(0), 537 .enabled_rb_pipes_mask_hi = 0, 538 }, 539 .mem = { 540 .vram = { 541 .total_heap_size = UINT64_C(1073741824), 542 .usable_heap_size = UINT64_C(1040584704), 543 .heap_usage = UINT64_C(344141824), 544 .max_allocation = UINT64_C(780438528), 545 }, 546 .cpu_accessible_vram = { 547 .total_heap_size = UINT64_C(1073741824), 548 .usable_heap_size = UINT64_C(1040584704), 549 .heap_usage = UINT64_C(344141824), 550 .max_allocation = UINT64_C(780438528), 551 }, 552 .gtt = { 553 .total_heap_size = UINT64_C(8522825728), 554 .usable_heap_size = UINT64_C(8511004672), 555 .heap_usage = UINT64_C(79179776), 556 .max_allocation = UINT64_C(6383253504), 557 }, 558 }, 559 }, 560 { 561 .name = "raphael_mendocino", 562 .radeon_family = CHIP_RAPHAEL_MENDOCINO, 563 .hw_ip_gfx = { 564 .hw_ip_version_major = 10, 565 .hw_ip_version_minor = 0, 566 .capabilities_flags = UINT64_C(0), 567 .ib_start_alignment = 32, 568 .ib_size_alignment = 32, 569 .available_rings = 0x1, 570 .ip_discovery_version = 0xa0306, 571 }, 572 .hw_ip_compute = { 573 .hw_ip_version_major = 10, 574 .hw_ip_version_minor = 0, 575 .capabilities_flags = UINT64_C(0), 576 .ib_start_alignment = 32, 577 .ib_size_alignment = 32, 578 .available_rings = 0xf, 579 .ip_discovery_version = 0xa0306, 580 }, 581 .fw_gfx_me = { 582 .ver = 13, 583 .feature = 38, 584 }, 585 .fw_gfx_pfp = { 586 .ver = 13, 587 .feature = 38, 588 }, 589 .fw_gfx_mec = { 590 .ver = 18, 591 .feature = 38, 592 }, 593 .mmr_regs = { 594 0x263e, 0xffffffff, 0x00000042, 595 }, 596 .mmr_reg_count = 1, 597 .dev = { 598 .device_id = 0x164e, 599 .chip_rev = 0x01, 600 .external_rev = 0x02, 601 .pci_rev = 0xc1, 602 .family = AMDGPU_FAMILY_GC_10_3_6, 603 .num_shader_engines = 1, 604 .num_shader_arrays_per_engine = 1, 605 .gpu_counter_freq = 100000, 606 .max_engine_clock = UINT64_C(200000), 607 .max_memory_clock = UINT64_C(2400000), 608 .cu_active_number = 2, 609 .cu_ao_mask = 0x3, 610 .cu_bitmap = { 611 { 0x3, 0x0, 0x0, 0x0, }, 612 { 0x0, 0x0, 0x0, 0x0, }, 613 { 0x0, 0x0, 0x0, 0x0, }, 614 { 0x0, 0x0, 0x0, 0x0, }, 615 }, 616 .enabled_rb_pipes_mask = 0x1, 617 .num_rb_pipes = 1, 618 .num_hw_gfx_contexts = 8, 619 .pcie_gen = 4, 620 .ids_flags = UINT64_C(0x1), 621 .virtual_address_offset = UINT64_C(0x200000), 622 .virtual_address_max = UINT64_C(0x800000000000), 623 .virtual_address_alignment = 4096, 624 .pte_fragment_size = 2097152, 625 .gart_page_size = 4096, 626 .ce_ram_size = 65536, 627 .vram_type = 10, 628 .vram_bit_width = 128, 629 .vce_harvest_config = 0, 630 .gc_double_offchip_lds_buf = 1, 631 .prim_buf_gpu_addr = UINT64_C(0), 632 .pos_buf_gpu_addr = UINT64_C(0), 633 .cntl_sb_buf_gpu_addr = UINT64_C(0), 634 .param_buf_gpu_addr = UINT64_C(0), 635 .prim_buf_size = 0, 636 .pos_buf_size = 0, 637 .cntl_sb_buf_size = 0, 638 .param_buf_size = 0, 639 .wave_front_size = 32, 640 .num_shader_visible_vgprs = 1024, 641 .num_cu_per_sh = 2, 642 .num_tcc_blocks = 2, 643 .gs_vgt_table_depth = 32, 644 .gs_prim_buffer_depth = 1792, 645 .max_gs_waves_per_vgt = 32, 646 .pcie_num_lanes = 16, 647 .cu_ao_bitmap = { 648 { 0x3, 0x0, 0x0, 0x0, }, 649 { 0x0, 0x0, 0x0, 0x0, }, 650 { 0x0, 0x0, 0x0, 0x0, }, 651 { 0x0, 0x0, 0x0, 0x0, }, 652 }, 653 .high_va_offset = UINT64_C(0xffff800000000000), 654 .high_va_max = UINT64_C(0xffffffffffe00000), 655 .pa_sc_tile_steering_override = 0, 656 .tcc_disabled_mask = UINT64_C(0), 657 .min_engine_clock = UINT64_C(200000), 658 .min_memory_clock = UINT64_C(2400000), 659 .tcp_cache_size = 0, 660 .num_sqc_per_wgp = 0, 661 .sqc_data_cache_size = 0, 662 .sqc_inst_cache_size = 0, 663 .gl1c_cache_size = 0, 664 .gl2c_cache_size = 0, 665 .mall_size = UINT64_C(0), 666 .enabled_rb_pipes_mask_hi = 0, 667 }, 668 .mem = { 669 .vram = { 670 .total_heap_size = UINT64_C(536870912), 671 .usable_heap_size = UINT64_C(512081920), 672 .heap_usage = UINT64_C(30093312), 673 .max_allocation = UINT64_C(384061440), 674 }, 675 .cpu_accessible_vram = { 676 .total_heap_size = UINT64_C(536870912), 677 .usable_heap_size = UINT64_C(512081920), 678 .heap_usage = UINT64_C(30093312), 679 .max_allocation = UINT64_C(384061440), 680 }, 681 .gtt = { 682 .total_heap_size = UINT64_C(33254252544), 683 .usable_heap_size = UINT64_C(33241997312), 684 .heap_usage = UINT64_C(14360576), 685 .max_allocation = UINT64_C(24931497984), 686 }, 687 }, 688 }, 689 { 690 .name = "polaris10", 691 .radeon_family = CHIP_POLARIS10, 692 .hw_ip_gfx = { 693 .hw_ip_version_major = 8, 694 .hw_ip_version_minor = 0, 695 .capabilities_flags = UINT64_C(0), 696 .ib_start_alignment = 32, 697 .ib_size_alignment = 32, 698 .available_rings = 0x1, 699 .ip_discovery_version = 0x0000, 700 }, 701 .hw_ip_compute = { 702 .hw_ip_version_major = 8, 703 .hw_ip_version_minor = 0, 704 .capabilities_flags = UINT64_C(0), 705 .ib_start_alignment = 32, 706 .ib_size_alignment = 32, 707 .available_rings = 0xf, 708 .ip_discovery_version = 0x0000, 709 }, 710 .fw_gfx_me = { 711 .ver = 167, 712 .feature = 49, 713 }, 714 .fw_gfx_pfp = { 715 .ver = 254, 716 .feature = 49, 717 }, 718 .fw_gfx_mec = { 719 .ver = 730, 720 .feature = 49, 721 }, 722 .mmr_regs = { 723 0x263e, 0xffffffff, 0x22011003, 724 0x263d, 0x0000ff00, 0x00000000, 725 0xa0d4, 0x0000ff00, 0x16000012, 726 0xa0d5, 0x0000ff00, 0x0000002a, 727 0x263d, 0x0000ff01, 0x00000000, 728 0xa0d4, 0x0000ff01, 0x16000012, 729 0xa0d5, 0x0000ff01, 0x0000002a, 730 0x263d, 0x0000ff02, 0x00000000, 731 0xa0d4, 0x0000ff02, 0x16000012, 732 0xa0d5, 0x0000ff02, 0x0000002a, 733 0x263d, 0x0000ff03, 0x00000000, 734 0xa0d4, 0x0000ff03, 0x16000012, 735 0xa0d5, 0x0000ff03, 0x0000002a, 736 0x09d8, 0xffffffff, 0x000060a2, 737 0x2644, 0xffffffff, 0x00800310, 738 0x2645, 0xffffffff, 0x00800b10, 739 0x2646, 0xffffffff, 0x00801310, 740 0x2647, 0xffffffff, 0x00801b10, 741 0x2648, 0xffffffff, 0x00802b10, 742 0x2649, 0xffffffff, 0x00802b08, 743 0x264a, 0xffffffff, 0x00802b14, 744 0x264b, 0xffffffff, 0x00802954, 745 0x264c, 0xffffffff, 0x00000304, 746 0x264d, 0xffffffff, 0x02000308, 747 0x264e, 0xffffffff, 0x02000310, 748 0x264f, 0xffffffff, 0x06000314, 749 0x2650, 0xffffffff, 0x06000154, 750 0x2651, 0xffffffff, 0x02400308, 751 0x2652, 0xffffffff, 0x02400310, 752 0x2653, 0xffffffff, 0x02400330, 753 0x2654, 0xffffffff, 0x06400314, 754 0x2655, 0xffffffff, 0x06400154, 755 0x2656, 0xffffffff, 0x0040030c, 756 0x2657, 0xffffffff, 0x0100030c, 757 0x2658, 0xffffffff, 0x0100031c, 758 0x2659, 0xffffffff, 0x01000334, 759 0x265a, 0xffffffff, 0x01000324, 760 0x265b, 0xffffffff, 0x01000164, 761 0x265c, 0xffffffff, 0x0040031c, 762 0x265d, 0xffffffff, 0x01000320, 763 0x265e, 0xffffffff, 0x01000338, 764 0x265f, 0xffffffff, 0x02c00308, 765 0x2660, 0xffffffff, 0x02c00310, 766 0x2661, 0xffffffff, 0x06c00314, 767 0x2662, 0xffffffff, 0x06c00154, 768 0x2663, 0xffffffff, 0x00000000, 769 0x2664, 0xffffffff, 0x000000e8, 770 0x2665, 0xffffffff, 0x000000e8, 771 0x2666, 0xffffffff, 0x000000e8, 772 0x2667, 0xffffffff, 0x000000e8, 773 0x2668, 0xffffffff, 0x000000d4, 774 0x2669, 0xffffffff, 0x000000c0, 775 0x266a, 0xffffffff, 0x000000c0, 776 0x266b, 0xffffffff, 0x00000000, 777 0x266c, 0xffffffff, 0x000000ec, 778 0x266d, 0xffffffff, 0x000000e8, 779 0x266e, 0xffffffff, 0x000000d4, 780 0x266f, 0xffffffff, 0x000000d0, 781 0x2670, 0xffffffff, 0x00000080, 782 0x2671, 0xffffffff, 0x00000040, 783 0x2672, 0xffffffff, 0x00000040, 784 0x2673, 0xffffffff, 0x00000000, 785 }, 786 .mmr_reg_count = 62, 787 .dev = { 788 .device_id = 0x67df, 789 .chip_rev = 0x01, 790 .external_rev = 0x51, 791 .pci_rev = 0xe7, 792 .family = AMDGPU_FAMILY_VI, 793 .num_shader_engines = 4, 794 .num_shader_arrays_per_engine = 1, 795 .gpu_counter_freq = 25000, 796 .max_engine_clock = UINT64_C(1360000), 797 .max_memory_clock = UINT64_C(2000000), 798 .cu_active_number = 36, 799 .cu_ao_mask = 0x1ff01ff, 800 .cu_bitmap = { 801 { 0x1ff, 0x0, 0x0, 0x0, }, 802 { 0x1ff, 0x0, 0x0, 0x0, }, 803 { 0x1ff, 0x0, 0x0, 0x0, }, 804 { 0x1ff, 0x0, 0x0, 0x0, }, 805 }, 806 .enabled_rb_pipes_mask = 0xff, 807 .num_rb_pipes = 8, 808 .num_hw_gfx_contexts = 8, 809 .pcie_gen = 0, 810 .ids_flags = UINT64_C(0x0), 811 .virtual_address_offset = UINT64_C(0x200000), 812 .virtual_address_max = UINT64_C(0x1fffe00000), 813 .virtual_address_alignment = 4096, 814 .pte_fragment_size = 2097152, 815 .gart_page_size = 4096, 816 .ce_ram_size = 32768, 817 .vram_type = 5, 818 .vram_bit_width = 256, 819 .vce_harvest_config = 2, 820 .gc_double_offchip_lds_buf = 1, 821 .prim_buf_gpu_addr = UINT64_C(0), 822 .pos_buf_gpu_addr = UINT64_C(0), 823 .cntl_sb_buf_gpu_addr = UINT64_C(0), 824 .param_buf_gpu_addr = UINT64_C(0), 825 .prim_buf_size = 0, 826 .pos_buf_size = 0, 827 .cntl_sb_buf_size = 0, 828 .param_buf_size = 0, 829 .wave_front_size = 64, 830 .num_shader_visible_vgprs = 256, 831 .num_cu_per_sh = 9, 832 .num_tcc_blocks = 8, 833 .gs_vgt_table_depth = 0, 834 .gs_prim_buffer_depth = 0, 835 .max_gs_waves_per_vgt = 32, 836 .pcie_num_lanes = 0, 837 .cu_ao_bitmap = { 838 { 0x1ff, 0x0, 0x0, 0x0, }, 839 { 0x1ff, 0x0, 0x0, 0x0, }, 840 { 0x1ff, 0x0, 0x0, 0x0, }, 841 { 0x1ff, 0x0, 0x0, 0x0, }, 842 }, 843 .high_va_offset = UINT64_C(0x0), 844 .high_va_max = UINT64_C(0x0), 845 .pa_sc_tile_steering_override = 0, 846 .tcc_disabled_mask = UINT64_C(0), 847 .min_engine_clock = UINT64_C(0), 848 .min_memory_clock = UINT64_C(0), 849 .tcp_cache_size = 0, 850 .num_sqc_per_wgp = 0, 851 .sqc_data_cache_size = 0, 852 .sqc_inst_cache_size = 0, 853 .gl1c_cache_size = 0, 854 .gl2c_cache_size = 0, 855 .mall_size = UINT64_C(0), 856 .enabled_rb_pipes_mask_hi = 0, 857 }, 858 .mem = { 859 .vram = { 860 .total_heap_size = UINT64_C(8589934592), 861 .usable_heap_size = UINT64_C(8576106496), 862 .heap_usage = UINT64_C(267620352), 863 .max_allocation = UINT64_C(6432079872), 864 }, 865 .cpu_accessible_vram = { 866 .total_heap_size = UINT64_C(268435456), 867 .usable_heap_size = UINT64_C(262995968), 868 .heap_usage = UINT64_C(17641472), 869 .max_allocation = UINT64_C(197246976), 870 }, 871 .gtt = { 872 .total_heap_size = UINT64_C(16776243200), 873 .usable_heap_size = UINT64_C(16766920704), 874 .heap_usage = UINT64_C(80318464), 875 .max_allocation = UINT64_C(12575190528), 876 }, 877 }, 878 }, 879 { 880 .name = "polaris12", 881 .radeon_family = CHIP_POLARIS12, 882 .hw_ip_gfx = { 883 .hw_ip_version_major = 8, 884 .hw_ip_version_minor = 0, 885 .capabilities_flags = UINT64_C(0), 886 .ib_start_alignment = 32, 887 .ib_size_alignment = 32, 888 .available_rings = 0x1, 889 .ip_discovery_version = 0x0000, 890 }, 891 .hw_ip_compute = { 892 .hw_ip_version_major = 8, 893 .hw_ip_version_minor = 0, 894 .capabilities_flags = UINT64_C(0), 895 .ib_start_alignment = 32, 896 .ib_size_alignment = 32, 897 .available_rings = 0xf, 898 .ip_discovery_version = 0x0000, 899 }, 900 .fw_gfx_me = { 901 .ver = 167, 902 .feature = 49, 903 }, 904 .fw_gfx_pfp = { 905 .ver = 254, 906 .feature = 49, 907 }, 908 .fw_gfx_mec = { 909 .ver = 730, 910 .feature = 49, 911 }, 912 .mmr_regs = { 913 0x263e, 0xffffffff, 0x22011002, 914 0x263d, 0x0000ff00, 0x00000001, 915 0xa0d4, 0x0000ff00, 0x16000012, 916 0xa0d5, 0x0000ff00, 0x00000000, 917 0x263d, 0x0000ff01, 0x00000001, 918 0xa0d4, 0x0000ff01, 0x16000012, 919 0xa0d5, 0x0000ff01, 0x00000000, 920 0x09d8, 0xffffffff, 0x000060a2, 921 0x2644, 0xffffffff, 0x00800150, 922 0x2645, 0xffffffff, 0x00800950, 923 0x2646, 0xffffffff, 0x00801150, 924 0x2647, 0xffffffff, 0x00801950, 925 0x2648, 0xffffffff, 0x00802950, 926 0x2649, 0xffffffff, 0x00802948, 927 0x264a, 0xffffffff, 0x00802954, 928 0x264b, 0xffffffff, 0x00802954, 929 0x264c, 0xffffffff, 0x00000144, 930 0x264d, 0xffffffff, 0x02000148, 931 0x264e, 0xffffffff, 0x02000150, 932 0x264f, 0xffffffff, 0x06000154, 933 0x2650, 0xffffffff, 0x06000154, 934 0x2651, 0xffffffff, 0x02400148, 935 0x2652, 0xffffffff, 0x02400150, 936 0x2653, 0xffffffff, 0x02400170, 937 0x2654, 0xffffffff, 0x06400154, 938 0x2655, 0xffffffff, 0x06400154, 939 0x2656, 0xffffffff, 0x0040014c, 940 0x2657, 0xffffffff, 0x0100014c, 941 0x2658, 0xffffffff, 0x0100015c, 942 0x2659, 0xffffffff, 0x01000174, 943 0x265a, 0xffffffff, 0x01000164, 944 0x265b, 0xffffffff, 0x01000164, 945 0x265c, 0xffffffff, 0x0040015c, 946 0x265d, 0xffffffff, 0x01000160, 947 0x265e, 0xffffffff, 0x01000178, 948 0x265f, 0xffffffff, 0x02c00148, 949 0x2660, 0xffffffff, 0x02c00150, 950 0x2661, 0xffffffff, 0x06c00154, 951 0x2662, 0xffffffff, 0x06c00154, 952 0x2663, 0xffffffff, 0x00000000, 953 0x2664, 0xffffffff, 0x000000e8, 954 0x2665, 0xffffffff, 0x000000e8, 955 0x2666, 0xffffffff, 0x000000e8, 956 0x2667, 0xffffffff, 0x000000e4, 957 0x2668, 0xffffffff, 0x000000d0, 958 0x2669, 0xffffffff, 0x000000d0, 959 0x266a, 0xffffffff, 0x000000d0, 960 0x266b, 0xffffffff, 0x00000000, 961 0x266c, 0xffffffff, 0x000000ed, 962 0x266d, 0xffffffff, 0x000000e9, 963 0x266e, 0xffffffff, 0x000000e8, 964 0x266f, 0xffffffff, 0x000000e4, 965 0x2670, 0xffffffff, 0x000000d0, 966 0x2671, 0xffffffff, 0x00000090, 967 0x2672, 0xffffffff, 0x00000040, 968 0x2673, 0xffffffff, 0x00000000, 969 }, 970 .mmr_reg_count = 56, 971 .dev = { 972 .device_id = 0x699f, 973 .chip_rev = 0x00, 974 .external_rev = 0x64, 975 .pci_rev = 0xc7, 976 .family = AMDGPU_FAMILY_VI, 977 .num_shader_engines = 2, 978 .num_shader_arrays_per_engine = 1, 979 .gpu_counter_freq = 25000, 980 .max_engine_clock = UINT64_C(1183000), 981 .max_memory_clock = UINT64_C(1750000), 982 .cu_active_number = 8, 983 .cu_ao_mask = 0x1e001e, 984 .cu_bitmap = { 985 { 0x1e, 0x0, 0x0, 0x0, }, 986 { 0x1e, 0x0, 0x0, 0x0, }, 987 { 0x0, 0x0, 0x0, 0x0, }, 988 { 0x0, 0x0, 0x0, 0x0, }, 989 }, 990 .enabled_rb_pipes_mask = 0xf, 991 .num_rb_pipes = 4, 992 .num_hw_gfx_contexts = 8, 993 .pcie_gen = 3, 994 .ids_flags = UINT64_C(0x0), 995 .virtual_address_offset = UINT64_C(0x200000), 996 .virtual_address_max = UINT64_C(0x3fffe00000), 997 .virtual_address_alignment = 4096, 998 .pte_fragment_size = 2097152, 999 .gart_page_size = 4096, 1000 .ce_ram_size = 32768, 1001 .vram_type = 5, 1002 .vram_bit_width = 128, 1003 .vce_harvest_config = 2, 1004 .gc_double_offchip_lds_buf = 1, 1005 .prim_buf_gpu_addr = UINT64_C(0), 1006 .pos_buf_gpu_addr = UINT64_C(0), 1007 .cntl_sb_buf_gpu_addr = UINT64_C(0), 1008 .param_buf_gpu_addr = UINT64_C(0), 1009 .prim_buf_size = 0, 1010 .pos_buf_size = 0, 1011 .cntl_sb_buf_size = 0, 1012 .param_buf_size = 0, 1013 .wave_front_size = 64, 1014 .num_shader_visible_vgprs = 256, 1015 .num_cu_per_sh = 5, 1016 .num_tcc_blocks = 4, 1017 .gs_vgt_table_depth = 0, 1018 .gs_prim_buffer_depth = 0, 1019 .max_gs_waves_per_vgt = 32, 1020 .pcie_num_lanes = 1, 1021 .cu_ao_bitmap = { 1022 { 0x1e, 0x0, 0x0, 0x0, }, 1023 { 0x1e, 0x0, 0x0, 0x0, }, 1024 { 0x0, 0x0, 0x0, 0x0, }, 1025 { 0x0, 0x0, 0x0, 0x0, }, 1026 }, 1027 .high_va_offset = UINT64_C(0x0), 1028 .high_va_max = UINT64_C(0x0), 1029 .pa_sc_tile_steering_override = 0, 1030 .tcc_disabled_mask = UINT64_C(0), 1031 .min_engine_clock = UINT64_C(214000), 1032 .min_memory_clock = UINT64_C(300000), 1033 .tcp_cache_size = 0, 1034 .num_sqc_per_wgp = 0, 1035 .sqc_data_cache_size = 0, 1036 .sqc_inst_cache_size = 0, 1037 .gl1c_cache_size = 0, 1038 .gl2c_cache_size = 0, 1039 .mall_size = UINT64_C(0), 1040 .enabled_rb_pipes_mask_hi = 0, 1041 }, 1042 .mem = { 1043 .vram = { 1044 .total_heap_size = UINT64_C(4294967296), 1045 .usable_heap_size = UINT64_C(4281139200), 1046 .heap_usage = UINT64_C(5963776), 1047 .max_allocation = UINT64_C(3210854400), 1048 }, 1049 .cpu_accessible_vram = { 1050 .total_heap_size = UINT64_C(4294967296), 1051 .usable_heap_size = UINT64_C(4281139200), 1052 .heap_usage = UINT64_C(5963776), 1053 .max_allocation = UINT64_C(3210854400), 1054 }, 1055 .gtt = { 1056 .total_heap_size = UINT64_C(33254252544), 1057 .usable_heap_size = UINT64_C(33249120256), 1058 .heap_usage = UINT64_C(17903616), 1059 .max_allocation = UINT64_C(24936840192), 1060 }, 1061 }, 1062 }, 1063 { 1064 .name = "vega10", 1065 .radeon_family = CHIP_VEGA10, 1066 .hw_ip_gfx = { 1067 .hw_ip_version_major = 9, 1068 .hw_ip_version_minor = 0, 1069 .capabilities_flags = UINT64_C(0), 1070 .ib_start_alignment = 32, 1071 .ib_size_alignment = 32, 1072 .available_rings = 0x1, 1073 .ip_discovery_version = 0x90001, 1074 }, 1075 .hw_ip_compute = { 1076 .hw_ip_version_major = 9, 1077 .hw_ip_version_minor = 0, 1078 .capabilities_flags = UINT64_C(0), 1079 .ib_start_alignment = 32, 1080 .ib_size_alignment = 32, 1081 .available_rings = 0xf, 1082 .ip_discovery_version = 0x90001, 1083 }, 1084 .fw_gfx_me = { 1085 .ver = 166, 1086 .feature = 53, 1087 }, 1088 .fw_gfx_pfp = { 1089 .ver = 194, 1090 .feature = 53, 1091 }, 1092 .fw_gfx_mec = { 1093 .ver = 33236, 1094 .feature = 53, 1095 }, 1096 .mmr_regs = { 1097 0x263e, 0xffffffff, 0x2a114042, 1098 }, 1099 .mmr_reg_count = 1, 1100 .dev = { 1101 .device_id = 0x687f, 1102 .chip_rev = 0x01, 1103 .external_rev = 0x01, 1104 .pci_rev = 0xc1, 1105 .family = AMDGPU_FAMILY_AI, 1106 .num_shader_engines = 4, 1107 .num_shader_arrays_per_engine = 1, 1108 .gpu_counter_freq = 27000, 1109 .max_engine_clock = UINT64_C(1630000), 1110 .max_memory_clock = UINT64_C(945000), 1111 .cu_active_number = 64, 1112 .cu_ao_mask = 0xffffffff, 1113 .cu_bitmap = { 1114 { 0xffff, 0x0, 0x0, 0x0, }, 1115 { 0xffff, 0x0, 0x0, 0x0, }, 1116 { 0xffff, 0x0, 0x0, 0x0, }, 1117 { 0xffff, 0x0, 0x0, 0x0, }, 1118 }, 1119 .enabled_rb_pipes_mask = 0xffff, 1120 .num_rb_pipes = 16, 1121 .num_hw_gfx_contexts = 8, 1122 .pcie_gen = 0, 1123 .ids_flags = UINT64_C(0x0), 1124 .virtual_address_offset = UINT64_C(0x200000), 1125 .virtual_address_max = UINT64_C(0x800000000000), 1126 .virtual_address_alignment = 4096, 1127 .pte_fragment_size = 2097152, 1128 .gart_page_size = 4096, 1129 .ce_ram_size = 32768, 1130 .vram_type = 6, 1131 .vram_bit_width = 2048, 1132 .vce_harvest_config = 0, 1133 .gc_double_offchip_lds_buf = 1, 1134 .prim_buf_gpu_addr = UINT64_C(0), 1135 .pos_buf_gpu_addr = UINT64_C(0), 1136 .cntl_sb_buf_gpu_addr = UINT64_C(0), 1137 .param_buf_gpu_addr = UINT64_C(0), 1138 .prim_buf_size = 0, 1139 .pos_buf_size = 0, 1140 .cntl_sb_buf_size = 0, 1141 .param_buf_size = 0, 1142 .wave_front_size = 64, 1143 .num_shader_visible_vgprs = 256, 1144 .num_cu_per_sh = 16, 1145 .num_tcc_blocks = 16, 1146 .gs_vgt_table_depth = 32, 1147 .gs_prim_buffer_depth = 1792, 1148 .max_gs_waves_per_vgt = 32, 1149 .pcie_num_lanes = 0, 1150 .cu_ao_bitmap = { 1151 { 0xffff, 0x0, 0x0, 0x0, }, 1152 { 0xffff, 0x0, 0x0, 0x0, }, 1153 { 0xffff, 0x0, 0x0, 0x0, }, 1154 { 0xffff, 0x0, 0x0, 0x0, }, 1155 }, 1156 .high_va_offset = UINT64_C(0xffff800000000000), 1157 .high_va_max = UINT64_C(0xffffffffffe00000), 1158 .pa_sc_tile_steering_override = 0, 1159 .tcc_disabled_mask = UINT64_C(0), 1160 .min_engine_clock = UINT64_C(0), 1161 .min_memory_clock = UINT64_C(0), 1162 .tcp_cache_size = 0, 1163 .num_sqc_per_wgp = 0, 1164 .sqc_data_cache_size = 0, 1165 .sqc_inst_cache_size = 0, 1166 .gl1c_cache_size = 0, 1167 .gl2c_cache_size = 0, 1168 .mall_size = UINT64_C(0), 1169 .enabled_rb_pipes_mask_hi = 0, 1170 }, 1171 .mem = { 1172 .vram = { 1173 .total_heap_size = UINT64_C(8573157376), 1174 .usable_heap_size = UINT64_C(8556453888), 1175 .heap_usage = UINT64_C(39575552), 1176 .max_allocation = UINT64_C(6417340416), 1177 }, 1178 .cpu_accessible_vram = { 1179 .total_heap_size = UINT64_C(268435456), 1180 .usable_heap_size = UINT64_C(260120576), 1181 .heap_usage = UINT64_C(30138368), 1182 .max_allocation = UINT64_C(195090432), 1183 }, 1184 .gtt = { 1185 .total_heap_size = UINT64_C(8359135232), 1186 .usable_heap_size = UINT64_C(8346802176), 1187 .heap_usage = UINT64_C(22892544), 1188 .max_allocation = UINT64_C(6260101632), 1189 }, 1190 }, 1191 }, 1192 { 1193 .name = "navi10", 1194 .radeon_family = CHIP_NAVI10, 1195 .hw_ip_gfx = { 1196 .hw_ip_version_major = 10, 1197 .hw_ip_version_minor = 0, 1198 .capabilities_flags = UINT64_C(0), 1199 .ib_start_alignment = 32, 1200 .ib_size_alignment = 32, 1201 .available_rings = 0x1, 1202 .ip_discovery_version = 0xa010a, 1203 }, 1204 .hw_ip_compute = { 1205 .hw_ip_version_major = 10, 1206 .hw_ip_version_minor = 0, 1207 .capabilities_flags = UINT64_C(0), 1208 .ib_start_alignment = 32, 1209 .ib_size_alignment = 32, 1210 .available_rings = 0xf, 1211 .ip_discovery_version = 0xa010a, 1212 }, 1213 .fw_gfx_me = { 1214 .ver = 100, 1215 .feature = 34, 1216 }, 1217 .fw_gfx_pfp = { 1218 .ver = 155, 1219 .feature = 34, 1220 }, 1221 .fw_gfx_mec = { 1222 .ver = 146, 1223 .feature = 34, 1224 }, 1225 .mmr_regs = { 1226 0x263e, 0xffffffff, 0x00100044, 1227 }, 1228 .mmr_reg_count = 1, 1229 .dev = { 1230 .device_id = 0x731f, 1231 .chip_rev = 0x02, 1232 .external_rev = 0x03, 1233 .pci_rev = 0xc1, 1234 .family = AMDGPU_FAMILY_NV, 1235 .num_shader_engines = 2, 1236 .num_shader_arrays_per_engine = 2, 1237 .gpu_counter_freq = 100000, 1238 .max_engine_clock = UINT64_C(2100000), 1239 .max_memory_clock = UINT64_C(875000), 1240 .cu_active_number = 40, 1241 .cu_ao_mask = 0xffffffff, 1242 .cu_bitmap = { 1243 { 0x3ff, 0x3ff, 0x0, 0x0, }, 1244 { 0x3ff, 0x3ff, 0x0, 0x0, }, 1245 { 0x0, 0x0, 0x0, 0x0, }, 1246 { 0x0, 0x0, 0x0, 0x0, }, 1247 }, 1248 .enabled_rb_pipes_mask = 0xffff, 1249 .num_rb_pipes = 16, 1250 .num_hw_gfx_contexts = 8, 1251 .pcie_gen = 0, 1252 .ids_flags = UINT64_C(0x0), 1253 .virtual_address_offset = UINT64_C(0x200000), 1254 .virtual_address_max = UINT64_C(0x800000000000), 1255 .virtual_address_alignment = 4096, 1256 .pte_fragment_size = 2097152, 1257 .gart_page_size = 4096, 1258 .ce_ram_size = 65536, 1259 .vram_type = 9, 1260 .vram_bit_width = 256, 1261 .vce_harvest_config = 0, 1262 .gc_double_offchip_lds_buf = 1, 1263 .prim_buf_gpu_addr = UINT64_C(0), 1264 .pos_buf_gpu_addr = UINT64_C(0), 1265 .cntl_sb_buf_gpu_addr = UINT64_C(0), 1266 .param_buf_gpu_addr = UINT64_C(0), 1267 .prim_buf_size = 0, 1268 .pos_buf_size = 0, 1269 .cntl_sb_buf_size = 0, 1270 .param_buf_size = 0, 1271 .wave_front_size = 32, 1272 .num_shader_visible_vgprs = 1024, 1273 .num_cu_per_sh = 10, 1274 .num_tcc_blocks = 16, 1275 .gs_vgt_table_depth = 32, 1276 .gs_prim_buffer_depth = 1792, 1277 .max_gs_waves_per_vgt = 32, 1278 .pcie_num_lanes = 0, 1279 .cu_ao_bitmap = { 1280 { 0x3ff, 0x3ff, 0x0, 0x0, }, 1281 { 0x3ff, 0x3ff, 0x0, 0x0, }, 1282 { 0x0, 0x0, 0x0, 0x0, }, 1283 { 0x0, 0x0, 0x0, 0x0, }, 1284 }, 1285 .high_va_offset = UINT64_C(0xffff800000000000), 1286 .high_va_max = UINT64_C(0xffffffffffe00000), 1287 .pa_sc_tile_steering_override = 1187840, 1288 .tcc_disabled_mask = UINT64_C(0), 1289 .min_engine_clock = UINT64_C(0), 1290 .min_memory_clock = UINT64_C(0), 1291 .tcp_cache_size = 0, 1292 .num_sqc_per_wgp = 0, 1293 .sqc_data_cache_size = 0, 1294 .sqc_inst_cache_size = 0, 1295 .gl1c_cache_size = 0, 1296 .gl2c_cache_size = 0, 1297 .mall_size = UINT64_C(0), 1298 .enabled_rb_pipes_mask_hi = 0, 1299 }, 1300 .mem = { 1301 .vram = { 1302 .total_heap_size = UINT64_C(8573157376), 1303 .usable_heap_size = UINT64_C(8553127936), 1304 .heap_usage = UINT64_C(11644928), 1305 .max_allocation = UINT64_C(6414845952), 1306 }, 1307 .cpu_accessible_vram = { 1308 .total_heap_size = UINT64_C(268435456), 1309 .usable_heap_size = UINT64_C(256860160), 1310 .heap_usage = UINT64_C(11579392), 1311 .max_allocation = UINT64_C(192645120), 1312 }, 1313 .gtt = { 1314 .total_heap_size = UINT64_C(8359135232), 1315 .usable_heap_size = UINT64_C(8347318272), 1316 .heap_usage = UINT64_C(22102016), 1317 .max_allocation = UINT64_C(6260488704), 1318 }, 1319 }, 1320 }, 1321 { 1322 .name = "navi31", 1323 .radeon_family = CHIP_NAVI31, 1324 .hw_ip_gfx = { 1325 .hw_ip_version_major = 11, 1326 .hw_ip_version_minor = 0, 1327 .capabilities_flags = UINT64_C(0), 1328 .ib_start_alignment = 32, 1329 .ib_size_alignment = 32, 1330 .available_rings = 0x1, 1331 .ip_discovery_version = 0xb0000, 1332 }, 1333 .hw_ip_compute = { 1334 .hw_ip_version_major = 11, 1335 .hw_ip_version_minor = 0, 1336 .capabilities_flags = UINT64_C(0), 1337 .ib_start_alignment = 32, 1338 .ib_size_alignment = 32, 1339 .available_rings = 0xf, 1340 .ip_discovery_version = 0xb0000, 1341 }, 1342 .fw_gfx_me = { 1343 .ver = 1486, 1344 .feature = 29, 1345 }, 1346 .fw_gfx_pfp = { 1347 .ver = 1525, 1348 .feature = 29, 1349 }, 1350 .fw_gfx_mec = { 1351 .ver = 494, 1352 .feature = 29, 1353 }, 1354 .mmr_regs = { 1355 0x263e, 0xffffffff, 0x00000545, 1356 }, 1357 .mmr_reg_count = 1, 1358 .dev = { 1359 .device_id = 0x744c, 1360 .chip_rev = 0x00, 1361 .external_rev = 0x01, 1362 .pci_rev = 0xc8, 1363 .family = AMDGPU_FAMILY_GC_11_0_0, 1364 .num_shader_engines = 6, 1365 .num_shader_arrays_per_engine = 2, 1366 .gpu_counter_freq = 100000, 1367 .max_engine_clock = UINT64_C(2371000), 1368 .max_memory_clock = UINT64_C(1249000), 1369 .cu_active_number = 96, 1370 .cu_ao_mask = 0x0, 1371 .cu_bitmap = { 1372 { 0xff, 0xff, 0xff, 0xff, }, 1373 { 0xff, 0xff, 0xff, 0xff, }, 1374 { 0xff, 0xff, 0x0, 0x0, }, 1375 { 0xff, 0xff, 0x0, 0x0, }, 1376 }, 1377 .enabled_rb_pipes_mask = 0xffffff, 1378 .num_rb_pipes = 24, 1379 .num_hw_gfx_contexts = 8, 1380 .pcie_gen = 4, 1381 .ids_flags = UINT64_C(0x0), 1382 .virtual_address_offset = UINT64_C(0x200000), 1383 .virtual_address_max = UINT64_C(0x800000000000), 1384 .virtual_address_alignment = 4096, 1385 .pte_fragment_size = 2097152, 1386 .gart_page_size = 4096, 1387 .ce_ram_size = 0, 1388 .vram_type = 9, 1389 .vram_bit_width = 384, 1390 .vce_harvest_config = 0, 1391 .gc_double_offchip_lds_buf = 0, 1392 .prim_buf_gpu_addr = UINT64_C(0), 1393 .pos_buf_gpu_addr = UINT64_C(0), 1394 .cntl_sb_buf_gpu_addr = UINT64_C(0), 1395 .param_buf_gpu_addr = UINT64_C(0), 1396 .prim_buf_size = 0, 1397 .pos_buf_size = 0, 1398 .cntl_sb_buf_size = 0, 1399 .param_buf_size = 0, 1400 .wave_front_size = 32, 1401 .num_shader_visible_vgprs = 1536, 1402 .num_cu_per_sh = 8, 1403 .num_tcc_blocks = 24, 1404 .gs_vgt_table_depth = 32, 1405 .gs_prim_buffer_depth = 1792, 1406 .max_gs_waves_per_vgt = 32, 1407 .pcie_num_lanes = 16, 1408 .cu_ao_bitmap = { 1409 { 0x0, 0x0, 0x0, 0x0, }, 1410 { 0x0, 0x0, 0x0, 0x0, }, 1411 { 0x0, 0x0, 0x0, 0x0, }, 1412 { 0x0, 0x0, 0x0, 0x0, }, 1413 }, 1414 .high_va_offset = UINT64_C(0xffff800000000000), 1415 .high_va_max = UINT64_C(0xffffffffffe00000), 1416 .pa_sc_tile_steering_override = 0, 1417 .tcc_disabled_mask = UINT64_C(0), 1418 .min_engine_clock = UINT64_C(500000), 1419 .min_memory_clock = UINT64_C(96000), 1420 .tcp_cache_size = 32, 1421 .num_sqc_per_wgp = 1, 1422 .sqc_data_cache_size = 16, 1423 .sqc_inst_cache_size = 32, 1424 .gl1c_cache_size = 256, 1425 .gl2c_cache_size = 6144, 1426 .mall_size = UINT64_C(100663296), 1427 .enabled_rb_pipes_mask_hi = 0, 1428 }, 1429 .mem = { 1430 .vram = { 1431 .total_heap_size = UINT64_C(25753026560), 1432 .usable_heap_size = UINT64_C(25681096704), 1433 .heap_usage = UINT64_C(7515435008), 1434 .max_allocation = UINT64_C(19260822528), 1435 }, 1436 .cpu_accessible_vram = { 1437 .total_heap_size = UINT64_C(25753026560), 1438 .usable_heap_size = UINT64_C(25681096704), 1439 .heap_usage = UINT64_C(7515435008), 1440 .max_allocation = UINT64_C(19260822528), 1441 }, 1442 .gtt = { 1443 .total_heap_size = UINT64_C(33254252544), 1444 .usable_heap_size = UINT64_C(33240895488), 1445 .heap_usage = UINT64_C(142462976), 1446 .max_allocation = UINT64_C(24930671616), 1447 }, 1448 }, 1449 }, 1450 { 1451 .name = "navi21", 1452 .radeon_family = CHIP_NAVI21, 1453 .hw_ip_gfx = { 1454 .hw_ip_version_major = 10, 1455 .hw_ip_version_minor = 0, 1456 .capabilities_flags = UINT64_C(0), 1457 .ib_start_alignment = 32, 1458 .ib_size_alignment = 32, 1459 .available_rings = 0x1, 1460 .ip_discovery_version = 0xa0300, 1461 }, 1462 .hw_ip_compute = { 1463 .hw_ip_version_major = 10, 1464 .hw_ip_version_minor = 0, 1465 .capabilities_flags = UINT64_C(0), 1466 .ib_start_alignment = 32, 1467 .ib_size_alignment = 32, 1468 .available_rings = 0xf, 1469 .ip_discovery_version = 0xa0300, 1470 }, 1471 .fw_gfx_me = { 1472 .ver = 64, 1473 .feature = 42, 1474 }, 1475 .fw_gfx_pfp = { 1476 .ver = 95, 1477 .feature = 42, 1478 }, 1479 .fw_gfx_mec = { 1480 .ver = 104, 1481 .feature = 42, 1482 }, 1483 .mmr_regs = { 1484 0x263e, 0xffffffff, 0x00000444, 1485 }, 1486 .mmr_reg_count = 1, 1487 .dev = { 1488 .device_id = 0x73bf, 1489 .chip_rev = 0x01, 1490 .external_rev = 0x29, 1491 .pci_rev = 0xc3, 1492 .family = AMDGPU_FAMILY_NV, 1493 .num_shader_engines = 4, 1494 .num_shader_arrays_per_engine = 2, 1495 .gpu_counter_freq = 100000, 1496 .max_engine_clock = UINT64_C(2475000), 1497 .max_memory_clock = UINT64_C(1000000), 1498 .cu_active_number = 60, 1499 .cu_ao_mask = 0x3ffff, 1500 .cu_bitmap = { 1501 { 0x3ff, 0x3ff, 0x0, 0x0, }, 1502 { 0x0, 0x0, 0x0, 0x0, }, 1503 { 0x3ff, 0x3ff, 0x0, 0x0, }, 1504 { 0x3ff, 0x3ff, 0x0, 0x0, }, 1505 }, 1506 .enabled_rb_pipes_mask = 0xff0f, 1507 .num_rb_pipes = 16, 1508 .num_hw_gfx_contexts = 8, 1509 .pcie_gen = 3, 1510 .ids_flags = UINT64_C(0x0), 1511 .virtual_address_offset = UINT64_C(0x200000), 1512 .virtual_address_max = UINT64_C(0x800000000000), 1513 .virtual_address_alignment = 4096, 1514 .pte_fragment_size = 2097152, 1515 .gart_page_size = 4096, 1516 .ce_ram_size = 65536, 1517 .vram_type = 9, 1518 .vram_bit_width = 256, 1519 .vce_harvest_config = 0, 1520 .gc_double_offchip_lds_buf = 1, 1521 .prim_buf_gpu_addr = UINT64_C(0), 1522 .pos_buf_gpu_addr = UINT64_C(0), 1523 .cntl_sb_buf_gpu_addr = UINT64_C(0), 1524 .param_buf_gpu_addr = UINT64_C(0), 1525 .prim_buf_size = 0, 1526 .pos_buf_size = 0, 1527 .cntl_sb_buf_size = 0, 1528 .param_buf_size = 0, 1529 .wave_front_size = 32, 1530 .num_shader_visible_vgprs = 1024, 1531 .num_cu_per_sh = 10, 1532 .num_tcc_blocks = 16, 1533 .gs_vgt_table_depth = 32, 1534 .gs_prim_buffer_depth = 1792, 1535 .max_gs_waves_per_vgt = 32, 1536 .pcie_num_lanes = 16, 1537 .cu_ao_bitmap = { 1538 { 0x3ff, 0x3ff, 0x0, 0x0, }, 1539 { 0x0, 0x0, 0x0, 0x0, }, 1540 { 0x3ff, 0x3ff, 0x0, 0x0, }, 1541 { 0x3ff, 0x3ff, 0x0, 0x0, }, 1542 }, 1543 .high_va_offset = UINT64_C(0xffff800000000000), 1544 .high_va_max = UINT64_C(0xffffffffffe00000), 1545 .pa_sc_tile_steering_override = 0, 1546 .tcc_disabled_mask = UINT64_C(0), 1547 .min_engine_clock = UINT64_C(500000), 1548 .min_memory_clock = UINT64_C(96000), 1549 .tcp_cache_size = 0, 1550 .num_sqc_per_wgp = 0, 1551 .sqc_data_cache_size = 0, 1552 .sqc_inst_cache_size = 0, 1553 .gl1c_cache_size = 0, 1554 .gl2c_cache_size = 0, 1555 .mall_size = UINT64_C(134217728), 1556 .enabled_rb_pipes_mask_hi = 0, 1557 }, 1558 .mem = { 1559 .vram = { 1560 .total_heap_size = UINT64_C(17163091968), 1561 .usable_heap_size = UINT64_C(17128448000), 1562 .heap_usage = UINT64_C(817770496), 1563 .max_allocation = UINT64_C(12846336000), 1564 }, 1565 .cpu_accessible_vram = { 1566 .total_heap_size = UINT64_C(268435456), 1567 .usable_heap_size = UINT64_C(273055744), 1568 .heap_usage = UINT64_C(246521856), 1569 .max_allocation = UINT64_C(204791808), 1570 }, 1571 .gtt = { 1572 .total_heap_size = UINT64_C(16746784768), 1573 .usable_heap_size = UINT64_C(16733624320), 1574 .heap_usage = UINT64_C(499445760), 1575 .max_allocation = UINT64_C(12550218240), 1576 }, 1577 }, 1578 }, 1579 { 1580 .name = "pitcairn", 1581 .radeon_family = CHIP_PITCAIRN, 1582 .hw_ip_gfx = { 1583 .hw_ip_version_major = 6, 1584 .hw_ip_version_minor = 0, 1585 .capabilities_flags = UINT64_C(0), 1586 .ib_start_alignment = 32, 1587 .ib_size_alignment = 32, 1588 .available_rings = 0x1, 1589 .ip_discovery_version = 0x0000, 1590 }, 1591 .hw_ip_compute = { 1592 .hw_ip_version_major = 6, 1593 .hw_ip_version_minor = 0, 1594 .capabilities_flags = UINT64_C(0), 1595 .ib_start_alignment = 32, 1596 .ib_size_alignment = 32, 1597 .available_rings = 0x3, 1598 .ip_discovery_version = 0x0000, 1599 }, 1600 .fw_gfx_me = { 1601 .ver = 145, 1602 .feature = 29, 1603 }, 1604 .fw_gfx_pfp = { 1605 .ver = 84, 1606 .feature = 29, 1607 }, 1608 .fw_gfx_mec = { 1609 .ver = 0, 1610 .feature = 0, 1611 }, 1612 .mmr_regs = { 1613 0x263e, 0xffffffff, 0x12011003, 1614 0x263d, 0x0000ff00, 0x00000001, 1615 0xa0d4, 0x0000ff00, 0x2a001260, 1616 0x263d, 0x0000ff01, 0x00000001, 1617 0xa0d4, 0x0000ff01, 0x2a001260, 1618 0x09d8, 0xffffffff, 0x0000025a, 1619 0x2644, 0xffffffff, 0x00360292, 1620 0x2645, 0xffffffff, 0x00360a92, 1621 0x2646, 0xffffffff, 0x00361292, 1622 0x2647, 0xffffffff, 0x00122a92, 1623 0x2648, 0xffffffff, 0x0000028a, 1624 0x2649, 0xffffffff, 0x00021a92, 1625 0x264a, 0xffffffff, 0x00031292, 1626 0x264b, 0xffffffff, 0x00022112, 1627 0x264c, 0xffffffff, 0x00000004, 1628 0x264d, 0xffffffff, 0x00000288, 1629 0x264e, 0xffffffff, 0x00361290, 1630 0x264f, 0xffffffff, 0x00351290, 1631 0x2650, 0xffffffff, 0x00301a90, 1632 0x2651, 0xffffffff, 0x00000289, 1633 0x2652, 0xffffffff, 0x00321291, 1634 0x2653, 0xffffffff, 0x00311291, 1635 0x2654, 0xffffffff, 0x00301a91, 1636 0x2655, 0xffffffff, 0x00302a91, 1637 0x2656, 0xffffffff, 0x0000028d, 1638 0x2657, 0xffffffff, 0x00302aa1, 1639 0x2658, 0xffffffff, 0x00302a9d, 1640 0x2659, 0xffffffff, 0x00131291, 1641 0x265a, 0xffffffff, 0x00121291, 1642 0x265b, 0xffffffff, 0x00031291, 1643 0x265c, 0xffffffff, 0x00021a91, 1644 0x265d, 0xffffffff, 0x00022111, 1645 0x265e, 0xffffffff, 0x00022111, 1646 0x265f, 0xffffffff, 0x00022111, 1647 0x2660, 0xffffffff, 0x00022111, 1648 0x2661, 0xffffffff, 0x00022111, 1649 0x2662, 0xffffffff, 0x00012911, 1650 0x2663, 0xffffffff, 0x00000000, 1651 }, 1652 .mmr_reg_count = 38, 1653 .dev = { 1654 .device_id = 0x6818, 1655 .chip_rev = 0x01, 1656 .external_rev = 0x15, 1657 .pci_rev = 0x00, 1658 .family = AMDGPU_FAMILY_SI, 1659 .num_shader_engines = 2, 1660 .num_shader_arrays_per_engine = 2, 1661 .gpu_counter_freq = 27000, 1662 .max_engine_clock = UINT64_C(1100000), 1663 .max_memory_clock = UINT64_C(1250000), 1664 .cu_active_number = 20, 1665 .cu_ao_mask = 0x1f1f1f1f, 1666 .cu_bitmap = { 1667 { 0x1f, 0x1f, 0x0, 0x0, }, 1668 { 0x1f, 0x1f, 0x0, 0x0, }, 1669 { 0x0, 0x0, 0x0, 0x0, }, 1670 { 0x0, 0x0, 0x0, 0x0, }, 1671 }, 1672 .enabled_rb_pipes_mask = 0xff, 1673 .num_rb_pipes = 8, 1674 .num_hw_gfx_contexts = 8, 1675 .pcie_gen = 3, 1676 .ids_flags = UINT64_C(0x0), 1677 .virtual_address_offset = UINT64_C(0x200000), 1678 .virtual_address_max = UINT64_C(0xfffe00000), 1679 .virtual_address_alignment = 4096, 1680 .pte_fragment_size = 2097152, 1681 .gart_page_size = 4096, 1682 .ce_ram_size = 32768, 1683 .vram_type = 5, 1684 .vram_bit_width = 256, 1685 .vce_harvest_config = 0, 1686 .gc_double_offchip_lds_buf = 0, 1687 .prim_buf_gpu_addr = UINT64_C(0), 1688 .pos_buf_gpu_addr = UINT64_C(0), 1689 .cntl_sb_buf_gpu_addr = UINT64_C(0), 1690 .param_buf_gpu_addr = UINT64_C(0), 1691 .prim_buf_size = 0, 1692 .pos_buf_size = 0, 1693 .cntl_sb_buf_size = 0, 1694 .param_buf_size = 0, 1695 .wave_front_size = 0, 1696 .num_shader_visible_vgprs = 256, 1697 .num_cu_per_sh = 5, 1698 .num_tcc_blocks = 8, 1699 .gs_vgt_table_depth = 0, 1700 .gs_prim_buffer_depth = 0, 1701 .max_gs_waves_per_vgt = 32, 1702 .pcie_num_lanes = 8, 1703 .cu_ao_bitmap = { 1704 { 0x1f, 0x1f, 0x0, 0x0, }, 1705 { 0x1f, 0x1f, 0x0, 0x0, }, 1706 { 0x0, 0x0, 0x0, 0x0, }, 1707 { 0x0, 0x0, 0x0, 0x0, }, 1708 }, 1709 .high_va_offset = UINT64_C(0x0), 1710 .high_va_max = UINT64_C(0x0), 1711 .pa_sc_tile_steering_override = 0, 1712 .tcc_disabled_mask = UINT64_C(0), 1713 .min_engine_clock = UINT64_C(300000), 1714 .min_memory_clock = UINT64_C(150000), 1715 .tcp_cache_size = 0, 1716 .num_sqc_per_wgp = 0, 1717 .sqc_data_cache_size = 0, 1718 .sqc_inst_cache_size = 0, 1719 .gl1c_cache_size = 0, 1720 .gl2c_cache_size = 0, 1721 .mall_size = UINT64_C(0), 1722 .enabled_rb_pipes_mask_hi = 0, 1723 }, 1724 .mem = { 1725 .vram = { 1726 .total_heap_size = UINT64_C(2147483648), 1727 .usable_heap_size = UINT64_C(2134118400), 1728 .heap_usage = UINT64_C(5238784), 1729 .max_allocation = UINT64_C(1600588800), 1730 }, 1731 .cpu_accessible_vram = { 1732 .total_heap_size = UINT64_C(268435456), 1733 .usable_heap_size = UINT64_C(263458816), 1734 .heap_usage = UINT64_C(4976640), 1735 .max_allocation = UINT64_C(197594112), 1736 }, 1737 .gtt = { 1738 .total_heap_size = UINT64_C(8363028480), 1739 .usable_heap_size = UINT64_C(8359759872), 1740 .heap_usage = UINT64_C(3530752), 1741 .max_allocation = UINT64_C(6269819904), 1742 }, 1743 }, 1744 }, 1745 { 1746 .name = "bonaire", 1747 .radeon_family = CHIP_BONAIRE, 1748 .hw_ip_gfx = { 1749 .hw_ip_version_major = 7, 1750 .hw_ip_version_minor = 2, 1751 .capabilities_flags = UINT64_C(0), 1752 .ib_start_alignment = 32, 1753 .ib_size_alignment = 32, 1754 .available_rings = 0x1, 1755 .ip_discovery_version = 0x0000, 1756 }, 1757 .hw_ip_compute = { 1758 .hw_ip_version_major = 7, 1759 .hw_ip_version_minor = 2, 1760 .capabilities_flags = UINT64_C(0), 1761 .ib_start_alignment = 32, 1762 .ib_size_alignment = 32, 1763 .available_rings = 0xf, 1764 .ip_discovery_version = 0x0000, 1765 }, 1766 .fw_gfx_me = { 1767 .ver = 187, 1768 .feature = 29, 1769 }, 1770 .fw_gfx_pfp = { 1771 .ver = 229, 1772 .feature = 29, 1773 }, 1774 .fw_gfx_mec = { 1775 .ver = 421, 1776 .feature = 29, 1777 }, 1778 .mmr_regs = { 1779 0x263e, 0xffffffff, 0x12010001, 1780 0x263d, 0x0000ff00, 0x00000001, 1781 0xa0d4, 0x0000ff00, 0x16000012, 1782 0xa0d5, 0x0000ff00, 0x00000000, 1783 0x263d, 0x0000ff01, 0x00000001, 1784 0xa0d4, 0x0000ff01, 0x16000012, 1785 0xa0d5, 0x0000ff01, 0x00000000, 1786 0x09d8, 0xffffffff, 0x00006262, 1787 0x2644, 0xffffffff, 0x00800150, 1788 0x2645, 0xffffffff, 0x00800950, 1789 0x2646, 0xffffffff, 0x00801150, 1790 0x2647, 0xffffffff, 0x00801950, 1791 0x2648, 0xffffffff, 0x00802950, 1792 0x2649, 0xffffffff, 0x00800148, 1793 0x264a, 0xffffffff, 0x00802954, 1794 0x264b, 0xffffffff, 0x00002800, 1795 0x264c, 0xffffffff, 0x00000144, 1796 0x264d, 0xffffffff, 0x00000148, 1797 0x264e, 0xffffffff, 0x02000150, 1798 0x264f, 0xffffffff, 0x06000154, 1799 0x2650, 0xffffffff, 0x00002800, 1800 0x2651, 0xffffffff, 0x00400148, 1801 0x2652, 0xffffffff, 0x02400150, 1802 0x2653, 0xffffffff, 0x02400170, 1803 0x2654, 0xffffffff, 0x06400154, 1804 0x2655, 0xffffffff, 0x00002800, 1805 0x2656, 0xffffffff, 0x0040014c, 1806 0x2657, 0xffffffff, 0x0040014c, 1807 0x2658, 0xffffffff, 0x0040015c, 1808 0x2659, 0xffffffff, 0x00400174, 1809 0x265a, 0xffffffff, 0x00400164, 1810 0x265b, 0xffffffff, 0x00002800, 1811 0x265c, 0xffffffff, 0x0040015c, 1812 0x265d, 0xffffffff, 0x00400160, 1813 0x265e, 0xffffffff, 0x00400178, 1814 0x265f, 0xffffffff, 0x00c00148, 1815 0x2660, 0xffffffff, 0x02c00150, 1816 0x2661, 0xffffffff, 0x06c00154, 1817 0x2662, 0xffffffff, 0x00002800, 1818 0x2663, 0xffffffff, 0x00000000, 1819 0x2664, 0xffffffff, 0x000000e8, 1820 0x2665, 0xffffffff, 0x000000e4, 1821 0x2666, 0xffffffff, 0x000000d0, 1822 0x2667, 0xffffffff, 0x000000d0, 1823 0x2668, 0xffffffff, 0x000000d0, 1824 0x2669, 0xffffffff, 0x00000090, 1825 0x266a, 0xffffffff, 0x00000040, 1826 0x266b, 0xffffffff, 0x00000000, 1827 0x266c, 0xffffffff, 0x000000ed, 1828 0x266d, 0xffffffff, 0x000000e9, 1829 0x266e, 0xffffffff, 0x000000e8, 1830 0x266f, 0xffffffff, 0x000000e4, 1831 0x2670, 0xffffffff, 0x000000d0, 1832 0x2671, 0xffffffff, 0x00000090, 1833 0x2672, 0xffffffff, 0x00000040, 1834 0x2673, 0xffffffff, 0x00000000, 1835 }, 1836 .mmr_reg_count = 56, 1837 .dev = { 1838 .device_id = 0x6658, 1839 .chip_rev = 0x01, 1840 .external_rev = 0x15, 1841 .pci_rev = 0x00, 1842 .family = AMDGPU_FAMILY_CI, 1843 .num_shader_engines = 2, 1844 .num_shader_arrays_per_engine = 1, 1845 .gpu_counter_freq = 27000, 1846 .max_engine_clock = UINT64_C(1075000), 1847 .max_memory_clock = UINT64_C(1600000), 1848 .cu_active_number = 14, 1849 .cu_ao_mask = 0x7f007f, 1850 .cu_bitmap = { 1851 { 0x7f, 0x0, 0x0, 0x0, }, 1852 { 0x7f, 0x0, 0x0, 0x0, }, 1853 { 0x0, 0x0, 0x0, 0x0, }, 1854 { 0x0, 0x0, 0x0, 0x0, }, 1855 }, 1856 .enabled_rb_pipes_mask = 0xf, 1857 .num_rb_pipes = 4, 1858 .num_hw_gfx_contexts = 8, 1859 .pcie_gen = 3, 1860 .ids_flags = UINT64_C(0x0), 1861 .virtual_address_offset = UINT64_C(0x200000), 1862 .virtual_address_max = UINT64_C(0x1fffe00000), 1863 .virtual_address_alignment = 4096, 1864 .pte_fragment_size = 2097152, 1865 .gart_page_size = 4096, 1866 .ce_ram_size = 32768, 1867 .vram_type = 5, 1868 .vram_bit_width = 128, 1869 .vce_harvest_config = 0, 1870 .gc_double_offchip_lds_buf = 1, 1871 .prim_buf_gpu_addr = UINT64_C(0), 1872 .pos_buf_gpu_addr = UINT64_C(0), 1873 .cntl_sb_buf_gpu_addr = UINT64_C(0), 1874 .param_buf_gpu_addr = UINT64_C(0), 1875 .prim_buf_size = 0, 1876 .pos_buf_size = 0, 1877 .cntl_sb_buf_size = 0, 1878 .param_buf_size = 0, 1879 .wave_front_size = 64, 1880 .num_shader_visible_vgprs = 256, 1881 .num_cu_per_sh = 7, 1882 .num_tcc_blocks = 4, 1883 .gs_vgt_table_depth = 0, 1884 .gs_prim_buffer_depth = 0, 1885 .max_gs_waves_per_vgt = 32, 1886 .pcie_num_lanes = 16, 1887 .cu_ao_bitmap = { 1888 { 0x7f, 0x0, 0x0, 0x0, }, 1889 { 0x7f, 0x0, 0x0, 0x0, }, 1890 { 0x0, 0x0, 0x0, 0x0, }, 1891 { 0x0, 0x0, 0x0, 0x0, }, 1892 }, 1893 .high_va_offset = UINT64_C(0x0), 1894 .high_va_max = UINT64_C(0x0), 1895 .pa_sc_tile_steering_override = 0, 1896 .tcc_disabled_mask = UINT64_C(0), 1897 .min_engine_clock = UINT64_C(300000), 1898 .min_memory_clock = UINT64_C(150000), 1899 .tcp_cache_size = 0, 1900 .num_sqc_per_wgp = 0, 1901 .sqc_data_cache_size = 0, 1902 .sqc_inst_cache_size = 0, 1903 .gl1c_cache_size = 0, 1904 .gl2c_cache_size = 0, 1905 .mall_size = UINT64_C(0), 1906 .enabled_rb_pipes_mask_hi = 0, 1907 }, 1908 .mem = { 1909 .vram = { 1910 .total_heap_size = UINT64_C(2147483648), 1911 .usable_heap_size = UINT64_C(2118266880), 1912 .heap_usage = UINT64_C(21352448), 1913 .max_allocation = UINT64_C(1588700160), 1914 }, 1915 .cpu_accessible_vram = { 1916 .total_heap_size = UINT64_C(268435456), 1917 .usable_heap_size = UINT64_C(255901696), 1918 .heap_usage = UINT64_C(20828160), 1919 .max_allocation = UINT64_C(191926272), 1920 }, 1921 .gtt = { 1922 .total_heap_size = UINT64_C(16746776576), 1923 .usable_heap_size = UINT64_C(16743417856), 1924 .heap_usage = UINT64_C(3883008), 1925 .max_allocation = UINT64_C(12557563392), 1926 }, 1927 }, 1928 }, 1929 { 1930 .name = "gfx1150", 1931 .radeon_family = CHIP_GFX1150, 1932 .hw_ip_gfx = { 1933 .hw_ip_version_major = 11, 1934 .hw_ip_version_minor = 0, 1935 .capabilities_flags = UINT64_C(0), 1936 .ib_start_alignment = 32, 1937 .ib_size_alignment = 32, 1938 .available_rings = 0x1, 1939 .ip_discovery_version = 0xb0500, 1940 }, 1941 .hw_ip_compute = { 1942 .hw_ip_version_major = 11, 1943 .hw_ip_version_minor = 0, 1944 .capabilities_flags = UINT64_C(0), 1945 .ib_start_alignment = 32, 1946 .ib_size_alignment = 32, 1947 .available_rings = 0xf, 1948 .ip_discovery_version = 0xb0500, 1949 }, 1950 .fw_gfx_me = { 1951 .ver = 29, 1952 .feature = 35, 1953 }, 1954 .fw_gfx_pfp = { 1955 .ver = 39, 1956 .feature = 35, 1957 }, 1958 .fw_gfx_mec = { 1959 .ver = 24, 1960 .feature = 35, 1961 }, 1962 .mmr_regs = { 1963 0x263e, 0xffffffff, 0x00000242, 1964 }, 1965 .mmr_reg_count = 1, 1966 .dev = { 1967 .device_id = 0x150e, 1968 .chip_rev = 0x01, 1969 .external_rev = 0x11, 1970 .pci_rev = 0xd1, 1971 .family = AMDGPU_FAMILY_GC_11_5_0, 1972 .num_shader_engines = 1, 1973 .num_shader_arrays_per_engine = 2, 1974 .gpu_counter_freq = 100000, 1975 .max_engine_clock = UINT64_C(2900000), 1976 .max_memory_clock = UINT64_C(937000), 1977 .cu_active_number = 16, 1978 .cu_ao_mask = 0x0, 1979 .cu_bitmap = { 1980 { 0xff, 0xff, 0x0, 0x0, }, 1981 { 0x0, 0x0, 0x0, 0x0, }, 1982 { 0x0, 0x0, 0x0, 0x0, }, 1983 { 0x0, 0x0, 0x0, 0x0, }, 1984 }, 1985 .enabled_rb_pipes_mask = 0xf, 1986 .num_rb_pipes = 4, 1987 .num_hw_gfx_contexts = 8, 1988 .pcie_gen = 4, 1989 .ids_flags = UINT64_C(0x9), 1990 .virtual_address_offset = UINT64_C(0x10000), 1991 .virtual_address_max = UINT64_C(0x800000000000), 1992 .virtual_address_alignment = 4096, 1993 .pte_fragment_size = 2097152, 1994 .gart_page_size = 4096, 1995 .ce_ram_size = 0, 1996 .vram_type = 12, 1997 .vram_bit_width = 128, 1998 .vce_harvest_config = 0, 1999 .gc_double_offchip_lds_buf = 0, 2000 .prim_buf_gpu_addr = UINT64_C(0), 2001 .pos_buf_gpu_addr = UINT64_C(0), 2002 .cntl_sb_buf_gpu_addr = UINT64_C(0), 2003 .param_buf_gpu_addr = UINT64_C(0), 2004 .prim_buf_size = 0, 2005 .pos_buf_size = 0, 2006 .cntl_sb_buf_size = 0, 2007 .param_buf_size = 0, 2008 .wave_front_size = 32, 2009 .num_shader_visible_vgprs = 1024, 2010 .num_cu_per_sh = 8, 2011 .num_tcc_blocks = 4, 2012 .gs_vgt_table_depth = 32, 2013 .gs_prim_buffer_depth = 1792, 2014 .max_gs_waves_per_vgt = 32, 2015 .pcie_num_lanes = 16, 2016 .cu_ao_bitmap = { 2017 { 0x0, 0x0, 0x0, 0x0, }, 2018 { 0x0, 0x0, 0x0, 0x0, }, 2019 { 0x0, 0x0, 0x0, 0x0, }, 2020 { 0x0, 0x0, 0x0, 0x0, }, 2021 }, 2022 .high_va_offset = UINT64_C(0xffff800000000000), 2023 .high_va_max = UINT64_C(0xffffffffffbfe000), 2024 .pa_sc_tile_steering_override = 0, 2025 .tcc_disabled_mask = UINT64_C(0), 2026 .min_engine_clock = UINT64_C(600000), 2027 .min_memory_clock = UINT64_C(400000), 2028 .tcp_cache_size = 32, 2029 .num_sqc_per_wgp = 1, 2030 .sqc_data_cache_size = 16, 2031 .sqc_inst_cache_size = 32, 2032 .gl1c_cache_size = 256, 2033 .gl2c_cache_size = 2048, 2034 .mall_size = UINT64_C(0), 2035 .enabled_rb_pipes_mask_hi = 0, 2036 }, 2037 .mem = { 2038 .vram = { 2039 .total_heap_size = UINT64_C(536870912), 2040 .usable_heap_size = UINT64_C(368558080), 2041 .heap_usage = UINT64_C(281300992), 2042 .max_allocation = UINT64_C(276418560), 2043 }, 2044 .cpu_accessible_vram = { 2045 .total_heap_size = UINT64_C(536870912), 2046 .usable_heap_size = UINT64_C(368558080), 2047 .heap_usage = UINT64_C(281300992), 2048 .max_allocation = UINT64_C(276418560), 2049 }, 2050 .gtt = { 2051 .total_heap_size = UINT64_C(16488497152), 2052 .usable_heap_size = UINT64_C(16474185728), 2053 .heap_usage = UINT64_C(50016256), 2054 .max_allocation = UINT64_C(12355639296), 2055 }, 2056 }, 2057 } 2058 }; 2059 2060 const size_t num_amdgpu_devices = ARRAY_SIZE(amdgpu_devices); 2061