1*9880d681SAndroid Build Coastguard Worker; RUN: llc -mtriple=x86_64-unknown-unknown -o - -stop-after machine-scheduler %s | FileCheck %s --check-prefix=PRE-RA
2*9880d681SAndroid Build Coastguard Worker; RUN: llc -mtriple=x86_64-unknown-unknown -o - -stop-after prologepilog %s | FileCheck %s --check-prefix=POST-RA
3*9880d681SAndroid Build Coastguard Worker
4*9880d681SAndroid Build Coastguard Worker; This test verifies that the virtual register references in machine function's
5*9880d681SAndroid Build Coastguard Worker; liveins are cleared after register allocation.
6*9880d681SAndroid Build Coastguard Worker
7*9880d681SAndroid Build Coastguard Workerdefine i32 @test(i32 %a, i32 %b) {
8*9880d681SAndroid Build Coastguard Workerbody:
9*9880d681SAndroid Build Coastguard Worker  %c = mul i32 %a, %b
10*9880d681SAndroid Build Coastguard Worker  ret i32 %c
11*9880d681SAndroid Build Coastguard Worker}
12*9880d681SAndroid Build Coastguard Worker
13*9880d681SAndroid Build Coastguard Worker; PRE-RA: liveins:
14*9880d681SAndroid Build Coastguard Worker; PRE-RA-NEXT: - { reg: '%edi', virtual-reg: '%0' }
15*9880d681SAndroid Build Coastguard Worker; PRE-RA-NEXT: - { reg: '%esi', virtual-reg: '%1' }
16*9880d681SAndroid Build Coastguard Worker
17*9880d681SAndroid Build Coastguard Worker; POST-RA: liveins:
18*9880d681SAndroid Build Coastguard Worker; POST-RA-NEXT: - { reg: '%edi' }
19*9880d681SAndroid Build Coastguard Worker; POST-RA-NEXT: - { reg: '%esi' }
20