1*9880d681SAndroid Build Coastguard Worker;; X's live range extends beyond the shift, so the register allocator 2*9880d681SAndroid Build Coastguard Worker;; cannot coalesce it with Y. Because of this, a copy needs to be 3*9880d681SAndroid Build Coastguard Worker;; emitted before the shift to save the register value before it is 4*9880d681SAndroid Build Coastguard Worker;; clobbered. However, this copy is not needed if the register 5*9880d681SAndroid Build Coastguard Worker;; allocator turns the shift into an LEA. This also occurs for ADD. 6*9880d681SAndroid Build Coastguard Worker 7*9880d681SAndroid Build Coastguard Worker; Check that the shift gets turned into an LEA. 8*9880d681SAndroid Build Coastguard Worker; RUN: llc < %s -mcpu=generic -mtriple=x86_64-apple-darwin | FileCheck %s 9*9880d681SAndroid Build Coastguard Worker 10*9880d681SAndroid Build Coastguard Worker@G = external global i32 11*9880d681SAndroid Build Coastguard Worker 12*9880d681SAndroid Build Coastguard Workerdefine i32 @test1(i32 %X) nounwind { 13*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: test1: 14*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: mov 15*9880d681SAndroid Build Coastguard Worker; CHECK: leal 1(%rdi) 16*9880d681SAndroid Build Coastguard Worker %Z = add i32 %X, 1 17*9880d681SAndroid Build Coastguard Worker store volatile i32 %Z, i32* @G 18*9880d681SAndroid Build Coastguard Worker ret i32 %X 19*9880d681SAndroid Build Coastguard Worker} 20*9880d681SAndroid Build Coastguard Worker 21*9880d681SAndroid Build Coastguard Worker; rdar://8977508 22*9880d681SAndroid Build Coastguard Worker; The second add should not be transformed to leal nor should it be 23*9880d681SAndroid Build Coastguard Worker; commutted (which would require inserting a copy). 24*9880d681SAndroid Build Coastguard Workerdefine i32 @test2(i32 inreg %a, i32 inreg %b, i32 %c, i32 %d) nounwind { 25*9880d681SAndroid Build Coastguard Workerentry: 26*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: test2: 27*9880d681SAndroid Build Coastguard Worker; CHECK: leal 28*9880d681SAndroid Build Coastguard Worker; CHECK-NEXT: addl 29*9880d681SAndroid Build Coastguard Worker; CHECK-NEXT: addl 30*9880d681SAndroid Build Coastguard Worker; CHECK-NEXT: ret 31*9880d681SAndroid Build Coastguard Worker %add = add i32 %b, %a 32*9880d681SAndroid Build Coastguard Worker %add3 = add i32 %add, %c 33*9880d681SAndroid Build Coastguard Worker %add5 = add i32 %add3, %d 34*9880d681SAndroid Build Coastguard Worker ret i32 %add5 35*9880d681SAndroid Build Coastguard Worker} 36*9880d681SAndroid Build Coastguard Worker 37*9880d681SAndroid Build Coastguard Worker; rdar://9002648 38*9880d681SAndroid Build Coastguard Workerdefine i64 @test3(i64 %x) nounwind readnone ssp { 39*9880d681SAndroid Build Coastguard Workerentry: 40*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: test3: 41*9880d681SAndroid Build Coastguard Worker; CHECK: leaq (%rdi,%rdi), %rax 42*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: addq 43*9880d681SAndroid Build Coastguard Worker; CHECK-NEXT: ret 44*9880d681SAndroid Build Coastguard Worker %0 = shl i64 %x, 1 45*9880d681SAndroid Build Coastguard Worker ret i64 %0 46*9880d681SAndroid Build Coastguard Worker} 47