1*9880d681SAndroid Build Coastguard Worker; RUN: llc -mtriple=i386-apple-darwin9 -mcpu=corei7 -fast-isel=false -O0 < %s | FileCheck %s 2*9880d681SAndroid Build Coastguard Worker 3*9880d681SAndroid Build Coastguard Worker; Gather non-machine specific tests for the transformations in 4*9880d681SAndroid Build Coastguard Worker; CodeGen/SelectionDAG/TargetLowering. Currently, these 5*9880d681SAndroid Build Coastguard Worker; can't be tested easily by checking the SDNodes that are 6*9880d681SAndroid Build Coastguard Worker; the data structures that these transformations act on. 7*9880d681SAndroid Build Coastguard Worker; Therefore, use X86 assembler output to check against. 8*9880d681SAndroid Build Coastguard Worker 9*9880d681SAndroid Build Coastguard Worker; rdar://11195364 A problem with the transformation: 10*9880d681SAndroid Build Coastguard Worker; If all of the demanded bits on one side are known, and all of the set 11*9880d681SAndroid Build Coastguard Worker; bits on that side are also known to be set on the other side, turn this 12*9880d681SAndroid Build Coastguard Worker; into an AND, as we know the bits will be cleared. 13*9880d681SAndroid Build Coastguard Worker; The known set (one) bits for the arguments %xor1 are not the same, so the 14*9880d681SAndroid Build Coastguard Worker; transformation should not occur 15*9880d681SAndroid Build Coastguard Workerdefine void @foo(i32 %i32In1, i32 %i32In2, i32 %i32In3, i32 %i32In4, 16*9880d681SAndroid Build Coastguard Worker i32 %i32In5, i32 %i32In6, i32* %i32StarOut, i1 %i1In1, 17*9880d681SAndroid Build Coastguard Worker i32* %i32SelOut) nounwind { 18*9880d681SAndroid Build Coastguard Worker %and3 = and i32 %i32In1, 1362779777 19*9880d681SAndroid Build Coastguard Worker %or2 = or i32 %i32In2, %i32In3 20*9880d681SAndroid Build Coastguard Worker %and2 = and i32 %or2, 1362779777 21*9880d681SAndroid Build Coastguard Worker %xor3 = xor i32 %and3, %and2 22*9880d681SAndroid Build Coastguard Worker ; CHECK: shll 23*9880d681SAndroid Build Coastguard Worker %shl1 = shl i32 %xor3, %i32In4 24*9880d681SAndroid Build Coastguard Worker %sub1 = sub i32 %or2, %shl1 25*9880d681SAndroid Build Coastguard Worker %add1 = add i32 %sub1, %i32In5 26*9880d681SAndroid Build Coastguard Worker %and1 = and i32 %add1, 1 27*9880d681SAndroid Build Coastguard Worker %xor2 = xor i32 %and1, 1 28*9880d681SAndroid Build Coastguard Worker %or1 = or i32 %xor2, 364806994 ;0x15BE8352 29*9880d681SAndroid Build Coastguard Worker ; CHECK-NOT: andl $96239955 30*9880d681SAndroid Build Coastguard Worker %xor1 = xor i32 %or1, 268567040 ;0x10020200 31*9880d681SAndroid Build Coastguard Worker ; force an output so not DCE'd 32*9880d681SAndroid Build Coastguard Worker store i32 %xor1, i32* %i32StarOut 33*9880d681SAndroid Build Coastguard Worker ; force not fast isel by using a select 34*9880d681SAndroid Build Coastguard Worker %i32SelVal = select i1 %i1In1, i32 %i32In1, i32 %xor1 35*9880d681SAndroid Build Coastguard Worker store i32 %i32SelVal, i32* %i32SelOut 36*9880d681SAndroid Build Coastguard Worker ; CHECK: ret 37*9880d681SAndroid Build Coastguard Worker ret void 38*9880d681SAndroid Build Coastguard Worker} 39