xref: /aosp_15_r20/external/llvm/test/CodeGen/X86/memset-sse-stack-realignment.ll (revision 9880d6810fe72a1726cb53787c6711e909410d58)
1*9880d681SAndroid Build Coastguard Worker; Make sure that we realign the stack. Mingw32 uses 4 byte stack alignment, we
2*9880d681SAndroid Build Coastguard Worker; need 16 bytes for SSE and 32 bytes for AVX.
3*9880d681SAndroid Build Coastguard Worker
4*9880d681SAndroid Build Coastguard Worker; RUN: llc < %s -mtriple=i386-pc-mingw32 -mcpu=pentium2 | FileCheck %s -check-prefix=NOSSE
5*9880d681SAndroid Build Coastguard Worker; RUN: llc < %s -mtriple=i386-pc-mingw32 -mcpu=pentium3 | FileCheck %s -check-prefix=SSE1
6*9880d681SAndroid Build Coastguard Worker; RUN: llc < %s -mtriple=i386-pc-mingw32 -mcpu=yonah | FileCheck %s -check-prefix=SSE2
7*9880d681SAndroid Build Coastguard Worker; RUN: llc < %s -mtriple=i386-pc-mingw32 -mcpu=corei7-avx | FileCheck %s -check-prefix=AVX1
8*9880d681SAndroid Build Coastguard Worker; RUN: llc < %s -mtriple=i386-pc-mingw32 -mcpu=core-avx2 | FileCheck %s -check-prefix=AVX2
9*9880d681SAndroid Build Coastguard Worker
10*9880d681SAndroid Build Coastguard Workerdefine void @test1(i32 %t) nounwind {
11*9880d681SAndroid Build Coastguard Worker  %tmp1210 = alloca i8, i32 32, align 4
12*9880d681SAndroid Build Coastguard Worker  call void @llvm.memset.p0i8.i64(i8* %tmp1210, i8 0, i64 32, i32 4, i1 false)
13*9880d681SAndroid Build Coastguard Worker  %x = alloca i8, i32 %t
14*9880d681SAndroid Build Coastguard Worker  call void @dummy(i8* %x)
15*9880d681SAndroid Build Coastguard Worker  ret void
16*9880d681SAndroid Build Coastguard Worker
17*9880d681SAndroid Build Coastguard Worker; NOSSE-LABEL: test1:
18*9880d681SAndroid Build Coastguard Worker; NOSSE-NOT: and
19*9880d681SAndroid Build Coastguard Worker; NOSSE: movl $0
20*9880d681SAndroid Build Coastguard Worker
21*9880d681SAndroid Build Coastguard Worker; SSE1-LABEL: test1:
22*9880d681SAndroid Build Coastguard Worker; SSE1: andl $-16
23*9880d681SAndroid Build Coastguard Worker; SSE1: movl %esp, %esi
24*9880d681SAndroid Build Coastguard Worker; SSE1: movaps
25*9880d681SAndroid Build Coastguard Worker
26*9880d681SAndroid Build Coastguard Worker; SSE2-LABEL: test1:
27*9880d681SAndroid Build Coastguard Worker; SSE2: andl $-16
28*9880d681SAndroid Build Coastguard Worker; SSE2: movl %esp, %esi
29*9880d681SAndroid Build Coastguard Worker; SSE2: movaps
30*9880d681SAndroid Build Coastguard Worker
31*9880d681SAndroid Build Coastguard Worker; AVX1-LABEL: test1:
32*9880d681SAndroid Build Coastguard Worker; AVX1: andl $-32
33*9880d681SAndroid Build Coastguard Worker; AVX1: movl %esp, %esi
34*9880d681SAndroid Build Coastguard Worker; AVX1: vmovaps %ymm
35*9880d681SAndroid Build Coastguard Worker
36*9880d681SAndroid Build Coastguard Worker; AVX2-LABEL: test1:
37*9880d681SAndroid Build Coastguard Worker; AVX2: andl $-32
38*9880d681SAndroid Build Coastguard Worker; AVX2: movl %esp, %esi
39*9880d681SAndroid Build Coastguard Worker; AVX2: vmovaps %ymm
40*9880d681SAndroid Build Coastguard Worker
41*9880d681SAndroid Build Coastguard Worker}
42*9880d681SAndroid Build Coastguard Worker
43*9880d681SAndroid Build Coastguard Workerdefine void @test2(i32 %t) nounwind {
44*9880d681SAndroid Build Coastguard Worker  %tmp1210 = alloca i8, i32 16, align 4
45*9880d681SAndroid Build Coastguard Worker  call void @llvm.memset.p0i8.i64(i8* %tmp1210, i8 0, i64 16, i32 4, i1 false)
46*9880d681SAndroid Build Coastguard Worker  %x = alloca i8, i32 %t
47*9880d681SAndroid Build Coastguard Worker  call void @dummy(i8* %x)
48*9880d681SAndroid Build Coastguard Worker  ret void
49*9880d681SAndroid Build Coastguard Worker
50*9880d681SAndroid Build Coastguard Worker; NOSSE-LABEL: test2:
51*9880d681SAndroid Build Coastguard Worker; NOSSE-NOT: and
52*9880d681SAndroid Build Coastguard Worker; NOSSE: movl $0
53*9880d681SAndroid Build Coastguard Worker
54*9880d681SAndroid Build Coastguard Worker; SSE1-LABEL: test2:
55*9880d681SAndroid Build Coastguard Worker; SSE1: andl $-16
56*9880d681SAndroid Build Coastguard Worker; SSE1: movl %esp, %esi
57*9880d681SAndroid Build Coastguard Worker; SSE1: movaps
58*9880d681SAndroid Build Coastguard Worker
59*9880d681SAndroid Build Coastguard Worker; SSE2-LABEL: test2:
60*9880d681SAndroid Build Coastguard Worker; SSE2: andl $-16
61*9880d681SAndroid Build Coastguard Worker; SSE2: movl %esp, %esi
62*9880d681SAndroid Build Coastguard Worker; SSE2: movaps
63*9880d681SAndroid Build Coastguard Worker
64*9880d681SAndroid Build Coastguard Worker; AVX1-LABEL: test2:
65*9880d681SAndroid Build Coastguard Worker; AVX1: andl $-16
66*9880d681SAndroid Build Coastguard Worker; AVX1: movl %esp, %esi
67*9880d681SAndroid Build Coastguard Worker; AVX1: vmovaps %xmm
68*9880d681SAndroid Build Coastguard Worker
69*9880d681SAndroid Build Coastguard Worker; AVX2-LABEL: test2:
70*9880d681SAndroid Build Coastguard Worker; AVX2: andl $-16
71*9880d681SAndroid Build Coastguard Worker; AVX2: movl %esp, %esi
72*9880d681SAndroid Build Coastguard Worker; AVX2: vmovaps %xmm
73*9880d681SAndroid Build Coastguard Worker}
74*9880d681SAndroid Build Coastguard Worker
75*9880d681SAndroid Build Coastguard Workerdeclare void @dummy(i8*)
76*9880d681SAndroid Build Coastguard Worker
77*9880d681SAndroid Build Coastguard Workerdeclare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind
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