xref: /aosp_15_r20/external/llvm/test/CodeGen/X86/fast-isel-constrain-store-indexreg.ll (revision 9880d6810fe72a1726cb53787c6711e909410d58)
1*9880d681SAndroid Build Coastguard Worker; RUN: llc %s -o - -verify-machineinstrs | FileCheck %s
2*9880d681SAndroid Build Coastguard Worker
3*9880d681SAndroid Build Coastguard Workertarget datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
4*9880d681SAndroid Build Coastguard Workertarget triple = "x86_64-apple-unknown"
5*9880d681SAndroid Build Coastguard Worker
6*9880d681SAndroid Build Coastguard Worker@TheArray = external global [100000 x double], align 16
7*9880d681SAndroid Build Coastguard Worker
8*9880d681SAndroid Build Coastguard Worker; This test ensures, via the machine verifier, that the register class for the
9*9880d681SAndroid Build Coastguard Worker; index of the double store is correctly constrained to not include SP.
10*9880d681SAndroid Build Coastguard Worker
11*9880d681SAndroid Build Coastguard Worker; CHECK: movsd
12*9880d681SAndroid Build Coastguard Worker
13*9880d681SAndroid Build Coastguard Workerdefine i32 @main(i32* %i, double %tmpv) {
14*9880d681SAndroid Build Coastguard Workerbb:
15*9880d681SAndroid Build Coastguard Worker  br label %bb7
16*9880d681SAndroid Build Coastguard Worker
17*9880d681SAndroid Build Coastguard Workerbb7:                                              ; preds = %bb7, %bb
18*9880d681SAndroid Build Coastguard Worker  %storemerge = phi i32 [ 0, %bb ], [ %tmp19, %bb7 ]
19*9880d681SAndroid Build Coastguard Worker  %tmp15 = zext i32 %storemerge to i64
20*9880d681SAndroid Build Coastguard Worker  %tmp16 = getelementptr inbounds [100000 x double], [100000 x double]* @TheArray, i64 0, i64 %tmp15
21*9880d681SAndroid Build Coastguard Worker  store double %tmpv, double* %tmp16, align 8
22*9880d681SAndroid Build Coastguard Worker  %tmp18 = load i32, i32* %i, align 4
23*9880d681SAndroid Build Coastguard Worker  %tmp19 = add i32 %tmp18, 1
24*9880d681SAndroid Build Coastguard Worker  br label %bb7
25*9880d681SAndroid Build Coastguard Worker}
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