xref: /aosp_15_r20/external/llvm/test/CodeGen/X86/early-ifcvt-crash.ll (revision 9880d6810fe72a1726cb53787c6711e909410d58)
1*9880d681SAndroid Build Coastguard Worker; RUN: llc < %s -x86-early-ifcvt -verify-machineinstrs
2*9880d681SAndroid Build Coastguard Worker; RUN: llc < %s -x86-early-ifcvt -stress-early-ifcvt -verify-machineinstrs
3*9880d681SAndroid Build Coastguard Worker; CPU without a scheduling model:
4*9880d681SAndroid Build Coastguard Worker; RUN: llc < %s -x86-early-ifcvt -mcpu=pentium3 -verify-machineinstrs
5*9880d681SAndroid Build Coastguard Worker;
6*9880d681SAndroid Build Coastguard Worker; Run these tests with and without -stress-early-ifcvt to exercise heuristics.
7*9880d681SAndroid Build Coastguard Worker;
8*9880d681SAndroid Build Coastguard Workertarget triple = "x86_64-apple-macosx10.8.0"
9*9880d681SAndroid Build Coastguard Worker
10*9880d681SAndroid Build Coastguard Worker; MachineTraceMetrics::Ensemble::addLiveIns crashes because the first operand
11*9880d681SAndroid Build Coastguard Worker; on an inline asm instruction is not a vreg def.
12*9880d681SAndroid Build Coastguard Worker; <rdar://problem/12472811>
13*9880d681SAndroid Build Coastguard Workerdefine void @f1() nounwind {
14*9880d681SAndroid Build Coastguard Workerentry:
15*9880d681SAndroid Build Coastguard Worker  br i1 undef, label %if.then6.i, label %if.end.i
16*9880d681SAndroid Build Coastguard Worker
17*9880d681SAndroid Build Coastguard Workerif.then6.i:
18*9880d681SAndroid Build Coastguard Worker  br label %if.end.i
19*9880d681SAndroid Build Coastguard Worker
20*9880d681SAndroid Build Coastguard Workerif.end.i:
21*9880d681SAndroid Build Coastguard Worker  br i1 undef, label %if.end25.i, label %if.else17.i
22*9880d681SAndroid Build Coastguard Worker
23*9880d681SAndroid Build Coastguard Workerif.else17.i:
24*9880d681SAndroid Build Coastguard Worker  %shl24.i = shl i32 undef, undef
25*9880d681SAndroid Build Coastguard Worker  br label %if.end25.i
26*9880d681SAndroid Build Coastguard Worker
27*9880d681SAndroid Build Coastguard Workerif.end25.i:
28*9880d681SAndroid Build Coastguard Worker  %storemerge31.i = phi i32 [ %shl24.i, %if.else17.i ], [ 0, %if.end.i ]
29*9880d681SAndroid Build Coastguard Worker  store i32 %storemerge31.i, i32* undef, align 4
30*9880d681SAndroid Build Coastguard Worker  %0 = tail call i32 asm sideeffect "", "=r,r,i,i"(i32 undef, i32 15, i32 1) nounwind
31*9880d681SAndroid Build Coastguard Worker  %conv = trunc i32 %0 to i8
32*9880d681SAndroid Build Coastguard Worker  store i8 %conv, i8* undef, align 1
33*9880d681SAndroid Build Coastguard Worker  unreachable
34*9880d681SAndroid Build Coastguard Worker}
35