xref: /aosp_15_r20/external/llvm/test/CodeGen/X86/2008-09-18-inline-asm-2.ll (revision 9880d6810fe72a1726cb53787c6711e909410d58)
1*9880d681SAndroid Build Coastguard Worker; RUN: llc < %s -march=x86 -regalloc=fast -optimize-regalloc=0 -no-integrated-as | FileCheck %s
2*9880d681SAndroid Build Coastguard Worker; RUN: llc < %s -march=x86 -regalloc=basic -no-integrated-as      | FileCheck %s
3*9880d681SAndroid Build Coastguard Worker; RUN: llc < %s -march=x86 -regalloc=greedy -no-integrated-as     | FileCheck %s
4*9880d681SAndroid Build Coastguard Worker
5*9880d681SAndroid Build Coastguard Worker; The 1st, 2nd, 3rd and 5th registers must all be different.  The registers
6*9880d681SAndroid Build Coastguard Worker; referenced in the 4th and 6th operands must not be the same as the 1st or 5th
7*9880d681SAndroid Build Coastguard Worker; operand.
8*9880d681SAndroid Build Coastguard Worker;
9*9880d681SAndroid Build Coastguard Worker; CHECK: 1st=[[A1:%...]]
10*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: [[A1]]
11*9880d681SAndroid Build Coastguard Worker; CHECK: 2nd=[[A2:%...]]
12*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: [[A1]]
13*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: [[A2]]
14*9880d681SAndroid Build Coastguard Worker; CHECK: 3rd=[[A3:%...]]
15*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: [[A1]]
16*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: [[A2]]
17*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: [[A3]]
18*9880d681SAndroid Build Coastguard Worker; CHECK: 5th=[[A5:%...]]
19*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: [[A1]]
20*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: [[A5]]
21*9880d681SAndroid Build Coastguard Worker; CHECK: =4th
22*9880d681SAndroid Build Coastguard Worker
23*9880d681SAndroid Build Coastguard Worker; The 6th operand is an 8-bit register, and it mustn't alias the 1st and 5th.
24*9880d681SAndroid Build Coastguard Worker; CHECK: 1%e[[S1:.]]x
25*9880d681SAndroid Build Coastguard Worker; CHECK: 5%e[[S5:.]]x
26*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: %[[S1]]
27*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: %[[S5]]
28*9880d681SAndroid Build Coastguard Worker
29*9880d681SAndroid Build Coastguard Workertarget datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
30*9880d681SAndroid Build Coastguard Workertarget triple = "i386-apple-darwin8"
31*9880d681SAndroid Build Coastguard Worker	%struct.foo = type { i32, i32, i8* }
32*9880d681SAndroid Build Coastguard Worker
33*9880d681SAndroid Build Coastguard Workerdefine i32 @get(%struct.foo* %c, i8* %state) nounwind {
34*9880d681SAndroid Build Coastguard Workerentry:
35*9880d681SAndroid Build Coastguard Worker	%0 = getelementptr %struct.foo, %struct.foo* %c, i32 0, i32 0		; <i32*> [#uses=2]
36*9880d681SAndroid Build Coastguard Worker	%1 = getelementptr %struct.foo, %struct.foo* %c, i32 0, i32 1		; <i32*> [#uses=2]
37*9880d681SAndroid Build Coastguard Worker	%2 = getelementptr %struct.foo, %struct.foo* %c, i32 0, i32 2		; <i8**> [#uses=2]
38*9880d681SAndroid Build Coastguard Worker	%3 = load i32, i32* %0, align 4		; <i32> [#uses=1]
39*9880d681SAndroid Build Coastguard Worker	%4 = load i32, i32* %1, align 4		; <i32> [#uses=1]
40*9880d681SAndroid Build Coastguard Worker	%5 = load i8, i8* %state, align 1		; <i8> [#uses=1]
41*9880d681SAndroid Build Coastguard Worker	%asmtmp = tail call { i32, i32, i32, i32 } asm sideeffect "#1st=$0 $1 2nd=$1 $2 3rd=$2 $4 5th=$4 $3=4th 1$0 1%eXx 5$4 5%eXx 6th=$5", "=&r,=r,=r,=*m,=&q,=*imr,1,2,*m,5,~{dirflag},~{fpsr},~{flags},~{cx}"(i8** %2, i8* %state, i32 %3, i32 %4, i8** %2, i8 %5) nounwind		; <{ i32, i32, i32, i32 }> [#uses=3]
42*9880d681SAndroid Build Coastguard Worker	%asmresult = extractvalue { i32, i32, i32, i32 } %asmtmp, 0		; <i32> [#uses=1]
43*9880d681SAndroid Build Coastguard Worker	%asmresult1 = extractvalue { i32, i32, i32, i32 } %asmtmp, 1		; <i32> [#uses=1]
44*9880d681SAndroid Build Coastguard Worker	store i32 %asmresult1, i32* %0
45*9880d681SAndroid Build Coastguard Worker	%asmresult2 = extractvalue { i32, i32, i32, i32 } %asmtmp, 2		; <i32> [#uses=1]
46*9880d681SAndroid Build Coastguard Worker	store i32 %asmresult2, i32* %1
47*9880d681SAndroid Build Coastguard Worker	ret i32 %asmresult
48*9880d681SAndroid Build Coastguard Worker}
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