xref: /aosp_15_r20/external/llvm/test/CodeGen/Thumb2/thumb2-bcc.ll (revision 9880d6810fe72a1726cb53787c6711e909410d58)
1*9880d681SAndroid Build Coastguard Worker; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
2*9880d681SAndroid Build Coastguard Worker; If-conversion defeats the purpose of this test, which is to check CBZ
3*9880d681SAndroid Build Coastguard Worker; generation, so use memory barrier instruction to make sure it doesn't
4*9880d681SAndroid Build Coastguard Worker; happen and we get actual branches.
5*9880d681SAndroid Build Coastguard Worker
6*9880d681SAndroid Build Coastguard Workerdefine i32 @t1(i32 %a, i32 %b, i32 %c) {
7*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: t1:
8*9880d681SAndroid Build Coastguard Worker; CHECK: cbz
9*9880d681SAndroid Build Coastguard Worker  %tmp2 = icmp eq i32 %a, 0
10*9880d681SAndroid Build Coastguard Worker  br i1 %tmp2, label %cond_false, label %cond_true
11*9880d681SAndroid Build Coastguard Worker
12*9880d681SAndroid Build Coastguard Workercond_true:
13*9880d681SAndroid Build Coastguard Worker  fence seq_cst
14*9880d681SAndroid Build Coastguard Worker  %tmp5 = add i32 %b, 1
15*9880d681SAndroid Build Coastguard Worker  %tmp6 = and i32 %tmp5, %c
16*9880d681SAndroid Build Coastguard Worker  ret i32 %tmp6
17*9880d681SAndroid Build Coastguard Worker
18*9880d681SAndroid Build Coastguard Workercond_false:
19*9880d681SAndroid Build Coastguard Worker  fence seq_cst
20*9880d681SAndroid Build Coastguard Worker  %tmp7 = add i32 %b, -1
21*9880d681SAndroid Build Coastguard Worker  %tmp8 = xor i32 %tmp7, %c
22*9880d681SAndroid Build Coastguard Worker  ret i32 %tmp8
23*9880d681SAndroid Build Coastguard Worker}
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