xref: /aosp_15_r20/external/llvm/test/CodeGen/Thumb2/thumb2-and.ll (revision 9880d6810fe72a1726cb53787c6711e909410d58)
1*9880d681SAndroid Build Coastguard Worker; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
2*9880d681SAndroid Build Coastguard Worker
3*9880d681SAndroid Build Coastguard Workerdefine i32 @f1(i32 %a, i32 %b) {
4*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f1:
5*9880d681SAndroid Build Coastguard Worker; CHECK: ands r0, r1
6*9880d681SAndroid Build Coastguard Worker    %tmp = and i32 %a, %b
7*9880d681SAndroid Build Coastguard Worker    ret i32 %tmp
8*9880d681SAndroid Build Coastguard Worker}
9*9880d681SAndroid Build Coastguard Worker
10*9880d681SAndroid Build Coastguard Workerdefine i32 @f2(i32 %a, i32 %b) {
11*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f2:
12*9880d681SAndroid Build Coastguard Worker; CHECK: and.w r0, r0, r1, lsl #5
13*9880d681SAndroid Build Coastguard Worker    %tmp = shl i32 %b, 5
14*9880d681SAndroid Build Coastguard Worker    %tmp1 = and i32 %a, %tmp
15*9880d681SAndroid Build Coastguard Worker    ret i32 %tmp1
16*9880d681SAndroid Build Coastguard Worker}
17*9880d681SAndroid Build Coastguard Worker
18*9880d681SAndroid Build Coastguard Workerdefine i32 @f3(i32 %a, i32 %b) {
19*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f3:
20*9880d681SAndroid Build Coastguard Worker; CHECK: and.w r0, r0, r1, lsr #6
21*9880d681SAndroid Build Coastguard Worker    %tmp = lshr i32 %b, 6
22*9880d681SAndroid Build Coastguard Worker    %tmp1 = and i32 %a, %tmp
23*9880d681SAndroid Build Coastguard Worker    ret i32 %tmp1
24*9880d681SAndroid Build Coastguard Worker}
25*9880d681SAndroid Build Coastguard Worker
26*9880d681SAndroid Build Coastguard Workerdefine i32 @f4(i32 %a, i32 %b) {
27*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f4:
28*9880d681SAndroid Build Coastguard Worker; CHECK: and.w r0, r0, r1, asr #7
29*9880d681SAndroid Build Coastguard Worker    %tmp = ashr i32 %b, 7
30*9880d681SAndroid Build Coastguard Worker    %tmp1 = and i32 %a, %tmp
31*9880d681SAndroid Build Coastguard Worker    ret i32 %tmp1
32*9880d681SAndroid Build Coastguard Worker}
33*9880d681SAndroid Build Coastguard Worker
34*9880d681SAndroid Build Coastguard Workerdefine i32 @f5(i32 %a, i32 %b) {
35*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f5:
36*9880d681SAndroid Build Coastguard Worker; CHECK: and.w r0, r0, r0, ror #8
37*9880d681SAndroid Build Coastguard Worker    %l8 = shl i32 %a, 24
38*9880d681SAndroid Build Coastguard Worker    %r8 = lshr i32 %a, 8
39*9880d681SAndroid Build Coastguard Worker    %tmp = or i32 %l8, %r8
40*9880d681SAndroid Build Coastguard Worker    %tmp1 = and i32 %a, %tmp
41*9880d681SAndroid Build Coastguard Worker    ret i32 %tmp1
42*9880d681SAndroid Build Coastguard Worker}
43