1*9880d681SAndroid Build Coastguard Worker; RUN: llc < %s -mcpu=cortex-a8 | FileCheck %s 2*9880d681SAndroid Build Coastguard Workertarget triple = "thumbv7-apple-ios" 3*9880d681SAndroid Build Coastguard Worker 4*9880d681SAndroid Build Coastguard Worker; CHECK: local_split 5*9880d681SAndroid Build Coastguard Worker; 6*9880d681SAndroid Build Coastguard Worker; The load must go into d0-15 which are all clobbered by the asm. 7*9880d681SAndroid Build Coastguard Worker; RAGreedy should split the range and use d16-d31 to avoid a spill. 8*9880d681SAndroid Build Coastguard Worker; 9*9880d681SAndroid Build Coastguard Worker; CHECK: vldr s 10*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: vstr 11*9880d681SAndroid Build Coastguard Worker; CHECK: vadd.f32 12*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: vstr 13*9880d681SAndroid Build Coastguard Worker; CHECK: vorr 14*9880d681SAndroid Build Coastguard Worker; CHECK: vstr s 15*9880d681SAndroid Build Coastguard Workerdefine void @local_split(float* nocapture %p) nounwind ssp { 16*9880d681SAndroid Build Coastguard Workerentry: 17*9880d681SAndroid Build Coastguard Worker %x = load float, float* %p, align 4 18*9880d681SAndroid Build Coastguard Worker %a = fadd float %x, 1.0 19*9880d681SAndroid Build Coastguard Worker tail call void asm sideeffect "", "~{d0},~{d1},~{d2},~{d3},~{d4},~{d5},~{d6},~{d7},~{d8},~{d9},~{d10},~{d11},~{d12},~{d13},~{d14},~{d15}"() nounwind 20*9880d681SAndroid Build Coastguard Worker store float %a, float* %p, align 4 21*9880d681SAndroid Build Coastguard Worker ret void 22*9880d681SAndroid Build Coastguard Worker} 23*9880d681SAndroid Build Coastguard Worker 24*9880d681SAndroid Build Coastguard Worker; CHECK: global_split 25*9880d681SAndroid Build Coastguard Worker; 26*9880d681SAndroid Build Coastguard Worker; Same thing, but across basic blocks. 27*9880d681SAndroid Build Coastguard Worker; 28*9880d681SAndroid Build Coastguard Worker; CHECK: vldr s 29*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: vstr 30*9880d681SAndroid Build Coastguard Worker; CHECK: vadd.f32 31*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: vstr 32*9880d681SAndroid Build Coastguard Worker; CHECK: vorr 33*9880d681SAndroid Build Coastguard Worker; CHECK: vstr s 34*9880d681SAndroid Build Coastguard Workerdefine void @global_split(float* nocapture %p1, float* nocapture %p2) nounwind ssp { 35*9880d681SAndroid Build Coastguard Workerentry: 36*9880d681SAndroid Build Coastguard Worker %0 = load float, float* %p1, align 4 37*9880d681SAndroid Build Coastguard Worker %add = fadd float %0, 1.000000e+00 38*9880d681SAndroid Build Coastguard Worker tail call void asm sideeffect "", "~{d0},~{d1},~{d2},~{d3},~{d4},~{d5},~{d6},~{d7},~{d8},~{d9},~{d10},~{d11},~{d12},~{d13},~{d14},~{d15}"() nounwind 39*9880d681SAndroid Build Coastguard Worker %cmp = fcmp ogt float %add, 0.000000e+00 40*9880d681SAndroid Build Coastguard Worker br i1 %cmp, label %if.then, label %if.end 41*9880d681SAndroid Build Coastguard Worker 42*9880d681SAndroid Build Coastguard Workerif.then: 43*9880d681SAndroid Build Coastguard Worker store float %add, float* %p2, align 4 44*9880d681SAndroid Build Coastguard Worker br label %if.end 45*9880d681SAndroid Build Coastguard Worker 46*9880d681SAndroid Build Coastguard Workerif.end: 47*9880d681SAndroid Build Coastguard Worker store float %add, float* %p1, align 4 48*9880d681SAndroid Build Coastguard Worker ret void 49*9880d681SAndroid Build Coastguard Worker} 50