1*9880d681SAndroid Build Coastguard Worker; Test SETCC for every integer condition. The tests here assume that 2*9880d681SAndroid Build Coastguard Worker; RISBLG isn't available. 3*9880d681SAndroid Build Coastguard Worker; 4*9880d681SAndroid Build Coastguard Worker; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s 5*9880d681SAndroid Build Coastguard Worker 6*9880d681SAndroid Build Coastguard Worker; Test CC in { 0 }, with 3 don't care. 7*9880d681SAndroid Build Coastguard Workerdefine i32 @f1(i32 %a, i32 %b) { 8*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f1: 9*9880d681SAndroid Build Coastguard Worker; CHECK: ipm %r2 10*9880d681SAndroid Build Coastguard Worker; CHECK-NEXT: afi %r2, -268435456 11*9880d681SAndroid Build Coastguard Worker; CHECK-NEXT: srl %r2, 31 12*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14 13*9880d681SAndroid Build Coastguard Worker %cond = icmp eq i32 %a, %b 14*9880d681SAndroid Build Coastguard Worker %res = zext i1 %cond to i32 15*9880d681SAndroid Build Coastguard Worker ret i32 %res 16*9880d681SAndroid Build Coastguard Worker} 17*9880d681SAndroid Build Coastguard Worker 18*9880d681SAndroid Build Coastguard Worker; Test CC in { 1 }, with 3 don't care. 19*9880d681SAndroid Build Coastguard Workerdefine i32 @f2(i32 %a, i32 %b) { 20*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f2: 21*9880d681SAndroid Build Coastguard Worker; CHECK: ipm [[REG:%r[0-5]]] 22*9880d681SAndroid Build Coastguard Worker; CHECK-NEXT: risbg %r2, [[REG]], 63, 191, 36 23*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14 24*9880d681SAndroid Build Coastguard Worker %cond = icmp slt i32 %a, %b 25*9880d681SAndroid Build Coastguard Worker %res = zext i1 %cond to i32 26*9880d681SAndroid Build Coastguard Worker ret i32 %res 27*9880d681SAndroid Build Coastguard Worker} 28*9880d681SAndroid Build Coastguard Worker 29*9880d681SAndroid Build Coastguard Worker; Test CC in { 0, 1 }, with 3 don't care. 30*9880d681SAndroid Build Coastguard Workerdefine i32 @f3(i32 %a, i32 %b) { 31*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f3: 32*9880d681SAndroid Build Coastguard Worker; CHECK: ipm %r2 33*9880d681SAndroid Build Coastguard Worker; CHECK-NEXT: afi %r2, -536870912 34*9880d681SAndroid Build Coastguard Worker; CHECK-NEXT: srl %r2, 31 35*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14 36*9880d681SAndroid Build Coastguard Worker %cond = icmp sle i32 %a, %b 37*9880d681SAndroid Build Coastguard Worker %res = zext i1 %cond to i32 38*9880d681SAndroid Build Coastguard Worker ret i32 %res 39*9880d681SAndroid Build Coastguard Worker} 40*9880d681SAndroid Build Coastguard Worker 41*9880d681SAndroid Build Coastguard Worker; Test CC in { 2 }, with 3 don't care. 42*9880d681SAndroid Build Coastguard Workerdefine i32 @f4(i32 %a, i32 %b) { 43*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f4: 44*9880d681SAndroid Build Coastguard Worker; CHECK: ipm [[REG:%r[0-5]]] 45*9880d681SAndroid Build Coastguard Worker; CHECK-NEXT: risbg %r2, [[REG]], 63, 191, 35 46*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14 47*9880d681SAndroid Build Coastguard Worker %cond = icmp sgt i32 %a, %b 48*9880d681SAndroid Build Coastguard Worker %res = zext i1 %cond to i32 49*9880d681SAndroid Build Coastguard Worker ret i32 %res 50*9880d681SAndroid Build Coastguard Worker} 51*9880d681SAndroid Build Coastguard Worker 52*9880d681SAndroid Build Coastguard Worker; Test CC in { 0, 2 }, with 3 don't care. 53*9880d681SAndroid Build Coastguard Workerdefine i32 @f5(i32 %a, i32 %b) { 54*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f5: 55*9880d681SAndroid Build Coastguard Worker; CHECK: ipm [[REG:%r[0-5]]] 56*9880d681SAndroid Build Coastguard Worker; CHECK-NEXT: xilf [[REG]], 4294967295 57*9880d681SAndroid Build Coastguard Worker; CHECK-NEXT: risbg %r2, [[REG]], 63, 191, 36 58*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14 59*9880d681SAndroid Build Coastguard Worker %cond = icmp sge i32 %a, %b 60*9880d681SAndroid Build Coastguard Worker %res = zext i1 %cond to i32 61*9880d681SAndroid Build Coastguard Worker ret i32 %res 62*9880d681SAndroid Build Coastguard Worker} 63*9880d681SAndroid Build Coastguard Worker 64*9880d681SAndroid Build Coastguard Worker; Test CC in { 1, 2 }, with 3 don't care. 65*9880d681SAndroid Build Coastguard Workerdefine i32 @f6(i32 %a, i32 %b) { 66*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f6: 67*9880d681SAndroid Build Coastguard Worker; CHECK: ipm %r2 68*9880d681SAndroid Build Coastguard Worker; CHECK-NEXT: afi %r2, 1879048192 69*9880d681SAndroid Build Coastguard Worker; CHECK-NEXT: srl %r2, 31 70*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14 71*9880d681SAndroid Build Coastguard Worker %cond = icmp ne i32 %a, %b 72*9880d681SAndroid Build Coastguard Worker %res = zext i1 %cond to i32 73*9880d681SAndroid Build Coastguard Worker ret i32 %res 74*9880d681SAndroid Build Coastguard Worker} 75