xref: /aosp_15_r20/external/llvm/test/CodeGen/SystemZ/cond-store-03.ll (revision 9880d6810fe72a1726cb53787c6711e909410d58)
1*9880d681SAndroid Build Coastguard Worker; Test 32-bit conditional stores that are presented as selects.
2*9880d681SAndroid Build Coastguard Worker;
3*9880d681SAndroid Build Coastguard Worker; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
4*9880d681SAndroid Build Coastguard Worker
5*9880d681SAndroid Build Coastguard Workerdeclare void @foo(i32 *)
6*9880d681SAndroid Build Coastguard Worker
7*9880d681SAndroid Build Coastguard Worker; Test the simple case, with the loaded value first.
8*9880d681SAndroid Build Coastguard Workerdefine void @f1(i32 *%ptr, i32 %alt, i32 %limit) {
9*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f1:
10*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: %r2
11*9880d681SAndroid Build Coastguard Worker; CHECK: blr %r14
12*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: %r2
13*9880d681SAndroid Build Coastguard Worker; CHECK: st %r3, 0(%r2)
14*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14
15*9880d681SAndroid Build Coastguard Worker  %cond = icmp ult i32 %limit, 420
16*9880d681SAndroid Build Coastguard Worker  %orig = load i32 , i32 *%ptr
17*9880d681SAndroid Build Coastguard Worker  %res = select i1 %cond, i32 %orig, i32 %alt
18*9880d681SAndroid Build Coastguard Worker  store i32 %res, i32 *%ptr
19*9880d681SAndroid Build Coastguard Worker  ret void
20*9880d681SAndroid Build Coastguard Worker}
21*9880d681SAndroid Build Coastguard Worker
22*9880d681SAndroid Build Coastguard Worker; ...and with the loaded value second
23*9880d681SAndroid Build Coastguard Workerdefine void @f2(i32 *%ptr, i32 %alt, i32 %limit) {
24*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f2:
25*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: %r2
26*9880d681SAndroid Build Coastguard Worker; CHECK: bher %r14
27*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: %r2
28*9880d681SAndroid Build Coastguard Worker; CHECK: st %r3, 0(%r2)
29*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14
30*9880d681SAndroid Build Coastguard Worker  %cond = icmp ult i32 %limit, 420
31*9880d681SAndroid Build Coastguard Worker  %orig = load i32 , i32 *%ptr
32*9880d681SAndroid Build Coastguard Worker  %res = select i1 %cond, i32 %alt, i32 %orig
33*9880d681SAndroid Build Coastguard Worker  store i32 %res, i32 *%ptr
34*9880d681SAndroid Build Coastguard Worker  ret void
35*9880d681SAndroid Build Coastguard Worker}
36*9880d681SAndroid Build Coastguard Worker
37*9880d681SAndroid Build Coastguard Worker; Test cases where the value is explicitly sign-extended to 64 bits, with the
38*9880d681SAndroid Build Coastguard Worker; loaded value first.
39*9880d681SAndroid Build Coastguard Workerdefine void @f3(i32 *%ptr, i64 %alt, i32 %limit) {
40*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f3:
41*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: %r2
42*9880d681SAndroid Build Coastguard Worker; CHECK: blr %r14
43*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: %r2
44*9880d681SAndroid Build Coastguard Worker; CHECK: st %r3, 0(%r2)
45*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14
46*9880d681SAndroid Build Coastguard Worker  %cond = icmp ult i32 %limit, 420
47*9880d681SAndroid Build Coastguard Worker  %orig = load i32 , i32 *%ptr
48*9880d681SAndroid Build Coastguard Worker  %ext = sext i32 %orig to i64
49*9880d681SAndroid Build Coastguard Worker  %res = select i1 %cond, i64 %ext, i64 %alt
50*9880d681SAndroid Build Coastguard Worker  %trunc = trunc i64 %res to i32
51*9880d681SAndroid Build Coastguard Worker  store i32 %trunc, i32 *%ptr
52*9880d681SAndroid Build Coastguard Worker  ret void
53*9880d681SAndroid Build Coastguard Worker}
54*9880d681SAndroid Build Coastguard Worker
55*9880d681SAndroid Build Coastguard Worker; ...and with the loaded value second
56*9880d681SAndroid Build Coastguard Workerdefine void @f4(i32 *%ptr, i64 %alt, i32 %limit) {
57*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f4:
58*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: %r2
59*9880d681SAndroid Build Coastguard Worker; CHECK: bher %r14
60*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: %r2
61*9880d681SAndroid Build Coastguard Worker; CHECK: st %r3, 0(%r2)
62*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14
63*9880d681SAndroid Build Coastguard Worker  %cond = icmp ult i32 %limit, 420
64*9880d681SAndroid Build Coastguard Worker  %orig = load i32 , i32 *%ptr
65*9880d681SAndroid Build Coastguard Worker  %ext = sext i32 %orig to i64
66*9880d681SAndroid Build Coastguard Worker  %res = select i1 %cond, i64 %alt, i64 %ext
67*9880d681SAndroid Build Coastguard Worker  %trunc = trunc i64 %res to i32
68*9880d681SAndroid Build Coastguard Worker  store i32 %trunc, i32 *%ptr
69*9880d681SAndroid Build Coastguard Worker  ret void
70*9880d681SAndroid Build Coastguard Worker}
71*9880d681SAndroid Build Coastguard Worker
72*9880d681SAndroid Build Coastguard Worker; Test cases where the value is explicitly zero-extended to 32 bits, with the
73*9880d681SAndroid Build Coastguard Worker; loaded value first.
74*9880d681SAndroid Build Coastguard Workerdefine void @f5(i32 *%ptr, i64 %alt, i32 %limit) {
75*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f5:
76*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: %r2
77*9880d681SAndroid Build Coastguard Worker; CHECK: blr %r14
78*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: %r2
79*9880d681SAndroid Build Coastguard Worker; CHECK: st %r3, 0(%r2)
80*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14
81*9880d681SAndroid Build Coastguard Worker  %cond = icmp ult i32 %limit, 420
82*9880d681SAndroid Build Coastguard Worker  %orig = load i32 , i32 *%ptr
83*9880d681SAndroid Build Coastguard Worker  %ext = zext i32 %orig to i64
84*9880d681SAndroid Build Coastguard Worker  %res = select i1 %cond, i64 %ext, i64 %alt
85*9880d681SAndroid Build Coastguard Worker  %trunc = trunc i64 %res to i32
86*9880d681SAndroid Build Coastguard Worker  store i32 %trunc, i32 *%ptr
87*9880d681SAndroid Build Coastguard Worker  ret void
88*9880d681SAndroid Build Coastguard Worker}
89*9880d681SAndroid Build Coastguard Worker
90*9880d681SAndroid Build Coastguard Worker; ...and with the loaded value second
91*9880d681SAndroid Build Coastguard Workerdefine void @f6(i32 *%ptr, i64 %alt, i32 %limit) {
92*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f6:
93*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: %r2
94*9880d681SAndroid Build Coastguard Worker; CHECK: bher %r14
95*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: %r2
96*9880d681SAndroid Build Coastguard Worker; CHECK: st %r3, 0(%r2)
97*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14
98*9880d681SAndroid Build Coastguard Worker  %cond = icmp ult i32 %limit, 420
99*9880d681SAndroid Build Coastguard Worker  %orig = load i32 , i32 *%ptr
100*9880d681SAndroid Build Coastguard Worker  %ext = zext i32 %orig to i64
101*9880d681SAndroid Build Coastguard Worker  %res = select i1 %cond, i64 %alt, i64 %ext
102*9880d681SAndroid Build Coastguard Worker  %trunc = trunc i64 %res to i32
103*9880d681SAndroid Build Coastguard Worker  store i32 %trunc, i32 *%ptr
104*9880d681SAndroid Build Coastguard Worker  ret void
105*9880d681SAndroid Build Coastguard Worker}
106*9880d681SAndroid Build Coastguard Worker
107*9880d681SAndroid Build Coastguard Worker; Check the high end of the aligned ST range.
108*9880d681SAndroid Build Coastguard Workerdefine void @f7(i32 *%base, i32 %alt, i32 %limit) {
109*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f7:
110*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: %r2
111*9880d681SAndroid Build Coastguard Worker; CHECK: blr %r14
112*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: %r2
113*9880d681SAndroid Build Coastguard Worker; CHECK: st %r3, 4092(%r2)
114*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14
115*9880d681SAndroid Build Coastguard Worker  %ptr = getelementptr i32, i32 *%base, i64 1023
116*9880d681SAndroid Build Coastguard Worker  %cond = icmp ult i32 %limit, 420
117*9880d681SAndroid Build Coastguard Worker  %orig = load i32 , i32 *%ptr
118*9880d681SAndroid Build Coastguard Worker  %res = select i1 %cond, i32 %orig, i32 %alt
119*9880d681SAndroid Build Coastguard Worker  store i32 %res, i32 *%ptr
120*9880d681SAndroid Build Coastguard Worker  ret void
121*9880d681SAndroid Build Coastguard Worker}
122*9880d681SAndroid Build Coastguard Worker
123*9880d681SAndroid Build Coastguard Worker; Check the next word up, which should use STY instead of ST.
124*9880d681SAndroid Build Coastguard Workerdefine void @f8(i32 *%base, i32 %alt, i32 %limit) {
125*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f8:
126*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: %r2
127*9880d681SAndroid Build Coastguard Worker; CHECK: blr %r14
128*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: %r2
129*9880d681SAndroid Build Coastguard Worker; CHECK: sty %r3, 4096(%r2)
130*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14
131*9880d681SAndroid Build Coastguard Worker  %ptr = getelementptr i32, i32 *%base, i64 1024
132*9880d681SAndroid Build Coastguard Worker  %cond = icmp ult i32 %limit, 420
133*9880d681SAndroid Build Coastguard Worker  %orig = load i32 , i32 *%ptr
134*9880d681SAndroid Build Coastguard Worker  %res = select i1 %cond, i32 %orig, i32 %alt
135*9880d681SAndroid Build Coastguard Worker  store i32 %res, i32 *%ptr
136*9880d681SAndroid Build Coastguard Worker  ret void
137*9880d681SAndroid Build Coastguard Worker}
138*9880d681SAndroid Build Coastguard Worker
139*9880d681SAndroid Build Coastguard Worker; Check the high end of the aligned STY range.
140*9880d681SAndroid Build Coastguard Workerdefine void @f9(i32 *%base, i32 %alt, i32 %limit) {
141*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f9:
142*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: %r2
143*9880d681SAndroid Build Coastguard Worker; CHECK: blr %r14
144*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: %r2
145*9880d681SAndroid Build Coastguard Worker; CHECK: sty %r3, 524284(%r2)
146*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14
147*9880d681SAndroid Build Coastguard Worker  %ptr = getelementptr i32, i32 *%base, i64 131071
148*9880d681SAndroid Build Coastguard Worker  %cond = icmp ult i32 %limit, 420
149*9880d681SAndroid Build Coastguard Worker  %orig = load i32 , i32 *%ptr
150*9880d681SAndroid Build Coastguard Worker  %res = select i1 %cond, i32 %orig, i32 %alt
151*9880d681SAndroid Build Coastguard Worker  store i32 %res, i32 *%ptr
152*9880d681SAndroid Build Coastguard Worker  ret void
153*9880d681SAndroid Build Coastguard Worker}
154*9880d681SAndroid Build Coastguard Worker
155*9880d681SAndroid Build Coastguard Worker; Check the next word up, which needs separate address logic.
156*9880d681SAndroid Build Coastguard Worker; Other sequences besides this one would be OK.
157*9880d681SAndroid Build Coastguard Workerdefine void @f10(i32 *%base, i32 %alt, i32 %limit) {
158*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f10:
159*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: %r2
160*9880d681SAndroid Build Coastguard Worker; CHECK: blr %r14
161*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: %r2
162*9880d681SAndroid Build Coastguard Worker; CHECK: agfi %r2, 524288
163*9880d681SAndroid Build Coastguard Worker; CHECK: st %r3, 0(%r2)
164*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14
165*9880d681SAndroid Build Coastguard Worker  %ptr = getelementptr i32, i32 *%base, i64 131072
166*9880d681SAndroid Build Coastguard Worker  %cond = icmp ult i32 %limit, 420
167*9880d681SAndroid Build Coastguard Worker  %orig = load i32 , i32 *%ptr
168*9880d681SAndroid Build Coastguard Worker  %res = select i1 %cond, i32 %orig, i32 %alt
169*9880d681SAndroid Build Coastguard Worker  store i32 %res, i32 *%ptr
170*9880d681SAndroid Build Coastguard Worker  ret void
171*9880d681SAndroid Build Coastguard Worker}
172*9880d681SAndroid Build Coastguard Worker
173*9880d681SAndroid Build Coastguard Worker; Check the low end of the STY range.
174*9880d681SAndroid Build Coastguard Workerdefine void @f11(i32 *%base, i32 %alt, i32 %limit) {
175*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f11:
176*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: %r2
177*9880d681SAndroid Build Coastguard Worker; CHECK: blr %r14
178*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: %r2
179*9880d681SAndroid Build Coastguard Worker; CHECK: sty %r3, -524288(%r2)
180*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14
181*9880d681SAndroid Build Coastguard Worker  %ptr = getelementptr i32, i32 *%base, i64 -131072
182*9880d681SAndroid Build Coastguard Worker  %cond = icmp ult i32 %limit, 420
183*9880d681SAndroid Build Coastguard Worker  %orig = load i32 , i32 *%ptr
184*9880d681SAndroid Build Coastguard Worker  %res = select i1 %cond, i32 %orig, i32 %alt
185*9880d681SAndroid Build Coastguard Worker  store i32 %res, i32 *%ptr
186*9880d681SAndroid Build Coastguard Worker  ret void
187*9880d681SAndroid Build Coastguard Worker}
188*9880d681SAndroid Build Coastguard Worker
189*9880d681SAndroid Build Coastguard Worker; Check the next word down, which needs separate address logic.
190*9880d681SAndroid Build Coastguard Worker; Other sequences besides this one would be OK.
191*9880d681SAndroid Build Coastguard Workerdefine void @f12(i32 *%base, i32 %alt, i32 %limit) {
192*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f12:
193*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: %r2
194*9880d681SAndroid Build Coastguard Worker; CHECK: blr %r14
195*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: %r2
196*9880d681SAndroid Build Coastguard Worker; CHECK: agfi %r2, -524292
197*9880d681SAndroid Build Coastguard Worker; CHECK: st %r3, 0(%r2)
198*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14
199*9880d681SAndroid Build Coastguard Worker  %ptr = getelementptr i32, i32 *%base, i64 -131073
200*9880d681SAndroid Build Coastguard Worker  %cond = icmp ult i32 %limit, 420
201*9880d681SAndroid Build Coastguard Worker  %orig = load i32 , i32 *%ptr
202*9880d681SAndroid Build Coastguard Worker  %res = select i1 %cond, i32 %orig, i32 %alt
203*9880d681SAndroid Build Coastguard Worker  store i32 %res, i32 *%ptr
204*9880d681SAndroid Build Coastguard Worker  ret void
205*9880d681SAndroid Build Coastguard Worker}
206*9880d681SAndroid Build Coastguard Worker
207*9880d681SAndroid Build Coastguard Worker; Check that STY allows an index.
208*9880d681SAndroid Build Coastguard Workerdefine void @f13(i64 %base, i64 %index, i32 %alt, i32 %limit) {
209*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f13:
210*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: %r2
211*9880d681SAndroid Build Coastguard Worker; CHECK: blr %r14
212*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: %r2
213*9880d681SAndroid Build Coastguard Worker; CHECK: sty %r4, 4096(%r3,%r2)
214*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14
215*9880d681SAndroid Build Coastguard Worker  %add1 = add i64 %base, %index
216*9880d681SAndroid Build Coastguard Worker  %add2 = add i64 %add1, 4096
217*9880d681SAndroid Build Coastguard Worker  %ptr = inttoptr i64 %add2 to i32 *
218*9880d681SAndroid Build Coastguard Worker  %cond = icmp ult i32 %limit, 420
219*9880d681SAndroid Build Coastguard Worker  %orig = load i32 , i32 *%ptr
220*9880d681SAndroid Build Coastguard Worker  %res = select i1 %cond, i32 %orig, i32 %alt
221*9880d681SAndroid Build Coastguard Worker  store i32 %res, i32 *%ptr
222*9880d681SAndroid Build Coastguard Worker  ret void
223*9880d681SAndroid Build Coastguard Worker}
224*9880d681SAndroid Build Coastguard Worker
225*9880d681SAndroid Build Coastguard Worker; Check that volatile loads are not matched.
226*9880d681SAndroid Build Coastguard Workerdefine void @f14(i32 *%ptr, i32 %alt, i32 %limit) {
227*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f14:
228*9880d681SAndroid Build Coastguard Worker; CHECK: l {{%r[0-5]}}, 0(%r2)
229*9880d681SAndroid Build Coastguard Worker; CHECK: {{jl|jnl}} [[LABEL:[^ ]*]]
230*9880d681SAndroid Build Coastguard Worker; CHECK: [[LABEL]]:
231*9880d681SAndroid Build Coastguard Worker; CHECK: st {{%r[0-5]}}, 0(%r2)
232*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14
233*9880d681SAndroid Build Coastguard Worker  %cond = icmp ult i32 %limit, 420
234*9880d681SAndroid Build Coastguard Worker  %orig = load volatile i32 , i32 *%ptr
235*9880d681SAndroid Build Coastguard Worker  %res = select i1 %cond, i32 %orig, i32 %alt
236*9880d681SAndroid Build Coastguard Worker  store i32 %res, i32 *%ptr
237*9880d681SAndroid Build Coastguard Worker  ret void
238*9880d681SAndroid Build Coastguard Worker}
239*9880d681SAndroid Build Coastguard Worker
240*9880d681SAndroid Build Coastguard Worker; ...likewise stores.  In this case we should have a conditional load into %r3.
241*9880d681SAndroid Build Coastguard Workerdefine void @f15(i32 *%ptr, i32 %alt, i32 %limit) {
242*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f15:
243*9880d681SAndroid Build Coastguard Worker; CHECK: jhe [[LABEL:[^ ]*]]
244*9880d681SAndroid Build Coastguard Worker; CHECK: l %r3, 0(%r2)
245*9880d681SAndroid Build Coastguard Worker; CHECK: [[LABEL]]:
246*9880d681SAndroid Build Coastguard Worker; CHECK: st %r3, 0(%r2)
247*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14
248*9880d681SAndroid Build Coastguard Worker  %cond = icmp ult i32 %limit, 420
249*9880d681SAndroid Build Coastguard Worker  %orig = load i32 , i32 *%ptr
250*9880d681SAndroid Build Coastguard Worker  %res = select i1 %cond, i32 %orig, i32 %alt
251*9880d681SAndroid Build Coastguard Worker  store volatile i32 %res, i32 *%ptr
252*9880d681SAndroid Build Coastguard Worker  ret void
253*9880d681SAndroid Build Coastguard Worker}
254*9880d681SAndroid Build Coastguard Worker
255*9880d681SAndroid Build Coastguard Worker; Check that atomic loads are not matched.  The transformation is OK for
256*9880d681SAndroid Build Coastguard Worker; the "unordered" case tested here, but since we don't try to handle atomic
257*9880d681SAndroid Build Coastguard Worker; operations at all in this context, it seems better to assert that than
258*9880d681SAndroid Build Coastguard Worker; to restrict the test to a stronger ordering.
259*9880d681SAndroid Build Coastguard Workerdefine void @f16(i32 *%ptr, i32 %alt, i32 %limit) {
260*9880d681SAndroid Build Coastguard Worker; FIXME: should use a normal load instead of CS.
261*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f16:
262*9880d681SAndroid Build Coastguard Worker; CHECK: l {{%r[0-5]}}, 0(%r2)
263*9880d681SAndroid Build Coastguard Worker; CHECK: {{jl|jnl}} [[LABEL:[^ ]*]]
264*9880d681SAndroid Build Coastguard Worker; CHECK: [[LABEL]]:
265*9880d681SAndroid Build Coastguard Worker; CHECK: st {{%r[0-5]}}, 0(%r2)
266*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14
267*9880d681SAndroid Build Coastguard Worker  %cond = icmp ult i32 %limit, 420
268*9880d681SAndroid Build Coastguard Worker  %orig = load atomic i32 , i32 *%ptr unordered, align 4
269*9880d681SAndroid Build Coastguard Worker  %res = select i1 %cond, i32 %orig, i32 %alt
270*9880d681SAndroid Build Coastguard Worker  store i32 %res, i32 *%ptr
271*9880d681SAndroid Build Coastguard Worker  ret void
272*9880d681SAndroid Build Coastguard Worker}
273*9880d681SAndroid Build Coastguard Worker
274*9880d681SAndroid Build Coastguard Worker; ...likewise stores.
275*9880d681SAndroid Build Coastguard Workerdefine void @f17(i32 *%ptr, i32 %alt, i32 %limit) {
276*9880d681SAndroid Build Coastguard Worker; FIXME: should use a normal store instead of CS.
277*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f17:
278*9880d681SAndroid Build Coastguard Worker; CHECK: jhe [[LABEL:[^ ]*]]
279*9880d681SAndroid Build Coastguard Worker; CHECK: l %r3, 0(%r2)
280*9880d681SAndroid Build Coastguard Worker; CHECK: [[LABEL]]:
281*9880d681SAndroid Build Coastguard Worker; CHECK: st %r3, 0(%r2)
282*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14
283*9880d681SAndroid Build Coastguard Worker  %cond = icmp ult i32 %limit, 420
284*9880d681SAndroid Build Coastguard Worker  %orig = load i32 , i32 *%ptr
285*9880d681SAndroid Build Coastguard Worker  %res = select i1 %cond, i32 %orig, i32 %alt
286*9880d681SAndroid Build Coastguard Worker  store atomic i32 %res, i32 *%ptr unordered, align 4
287*9880d681SAndroid Build Coastguard Worker  ret void
288*9880d681SAndroid Build Coastguard Worker}
289*9880d681SAndroid Build Coastguard Worker
290*9880d681SAndroid Build Coastguard Worker; Try a frame index base.
291*9880d681SAndroid Build Coastguard Workerdefine void @f18(i32 %alt, i32 %limit) {
292*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f18:
293*9880d681SAndroid Build Coastguard Worker; CHECK: brasl %r14, foo@PLT
294*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: %r15
295*9880d681SAndroid Build Coastguard Worker; CHECK: jl [[LABEL:[^ ]*]]
296*9880d681SAndroid Build Coastguard Worker; CHECK-NOT: %r15
297*9880d681SAndroid Build Coastguard Worker; CHECK: st {{%r[0-9]+}}, {{[0-9]+}}(%r15)
298*9880d681SAndroid Build Coastguard Worker; CHECK: [[LABEL]]:
299*9880d681SAndroid Build Coastguard Worker; CHECK: brasl %r14, foo@PLT
300*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14
301*9880d681SAndroid Build Coastguard Worker  %ptr = alloca i32
302*9880d681SAndroid Build Coastguard Worker  call void @foo(i32 *%ptr)
303*9880d681SAndroid Build Coastguard Worker  %cond = icmp ult i32 %limit, 420
304*9880d681SAndroid Build Coastguard Worker  %orig = load i32 , i32 *%ptr
305*9880d681SAndroid Build Coastguard Worker  %res = select i1 %cond, i32 %orig, i32 %alt
306*9880d681SAndroid Build Coastguard Worker  store i32 %res, i32 *%ptr
307*9880d681SAndroid Build Coastguard Worker  call void @foo(i32 *%ptr)
308*9880d681SAndroid Build Coastguard Worker  ret void
309*9880d681SAndroid Build Coastguard Worker}
310