1*9880d681SAndroid Build Coastguard Worker; Test 32-bit byteswaps from registers to memory. 2*9880d681SAndroid Build Coastguard Worker; 3*9880d681SAndroid Build Coastguard Worker; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s 4*9880d681SAndroid Build Coastguard Worker 5*9880d681SAndroid Build Coastguard Workerdeclare i32 @llvm.bswap.i32(i32 %a) 6*9880d681SAndroid Build Coastguard Worker 7*9880d681SAndroid Build Coastguard Worker; Check STRV with no displacement. 8*9880d681SAndroid Build Coastguard Workerdefine void @f1(i32 *%dst, i32 %a) { 9*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f1: 10*9880d681SAndroid Build Coastguard Worker; CHECK: strv %r3, 0(%r2) 11*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14 12*9880d681SAndroid Build Coastguard Worker %swapped = call i32 @llvm.bswap.i32(i32 %a) 13*9880d681SAndroid Build Coastguard Worker store i32 %swapped, i32 *%dst 14*9880d681SAndroid Build Coastguard Worker ret void 15*9880d681SAndroid Build Coastguard Worker} 16*9880d681SAndroid Build Coastguard Worker 17*9880d681SAndroid Build Coastguard Worker; Check the high end of the aligned STRV range. 18*9880d681SAndroid Build Coastguard Workerdefine void @f2(i32 *%dst, i32 %a) { 19*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f2: 20*9880d681SAndroid Build Coastguard Worker; CHECK: strv %r3, 524284(%r2) 21*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14 22*9880d681SAndroid Build Coastguard Worker %ptr = getelementptr i32, i32 *%dst, i64 131071 23*9880d681SAndroid Build Coastguard Worker %swapped = call i32 @llvm.bswap.i32(i32 %a) 24*9880d681SAndroid Build Coastguard Worker store i32 %swapped, i32 *%ptr 25*9880d681SAndroid Build Coastguard Worker ret void 26*9880d681SAndroid Build Coastguard Worker} 27*9880d681SAndroid Build Coastguard Worker 28*9880d681SAndroid Build Coastguard Worker; Check the next word up, which needs separate address logic. 29*9880d681SAndroid Build Coastguard Worker; Other sequences besides this one would be OK. 30*9880d681SAndroid Build Coastguard Workerdefine void @f3(i32 *%dst, i32 %a) { 31*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f3: 32*9880d681SAndroid Build Coastguard Worker; CHECK: agfi %r2, 524288 33*9880d681SAndroid Build Coastguard Worker; CHECK: strv %r3, 0(%r2) 34*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14 35*9880d681SAndroid Build Coastguard Worker %ptr = getelementptr i32, i32 *%dst, i64 131072 36*9880d681SAndroid Build Coastguard Worker %swapped = call i32 @llvm.bswap.i32(i32 %a) 37*9880d681SAndroid Build Coastguard Worker store i32 %swapped, i32 *%ptr 38*9880d681SAndroid Build Coastguard Worker ret void 39*9880d681SAndroid Build Coastguard Worker} 40*9880d681SAndroid Build Coastguard Worker 41*9880d681SAndroid Build Coastguard Worker; Check the high end of the negative aligned STRV range. 42*9880d681SAndroid Build Coastguard Workerdefine void @f4(i32 *%dst, i32 %a) { 43*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f4: 44*9880d681SAndroid Build Coastguard Worker; CHECK: strv %r3, -4(%r2) 45*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14 46*9880d681SAndroid Build Coastguard Worker %ptr = getelementptr i32, i32 *%dst, i64 -1 47*9880d681SAndroid Build Coastguard Worker %swapped = call i32 @llvm.bswap.i32(i32 %a) 48*9880d681SAndroid Build Coastguard Worker store i32 %swapped, i32 *%ptr 49*9880d681SAndroid Build Coastguard Worker ret void 50*9880d681SAndroid Build Coastguard Worker} 51*9880d681SAndroid Build Coastguard Worker 52*9880d681SAndroid Build Coastguard Worker; Check the low end of the STRV range. 53*9880d681SAndroid Build Coastguard Workerdefine void @f5(i32 *%dst, i32 %a) { 54*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f5: 55*9880d681SAndroid Build Coastguard Worker; CHECK: strv %r3, -524288(%r2) 56*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14 57*9880d681SAndroid Build Coastguard Worker %ptr = getelementptr i32, i32 *%dst, i64 -131072 58*9880d681SAndroid Build Coastguard Worker %swapped = call i32 @llvm.bswap.i32(i32 %a) 59*9880d681SAndroid Build Coastguard Worker store i32 %swapped, i32 *%ptr 60*9880d681SAndroid Build Coastguard Worker ret void 61*9880d681SAndroid Build Coastguard Worker} 62*9880d681SAndroid Build Coastguard Worker 63*9880d681SAndroid Build Coastguard Worker; Check the next word down, which needs separate address logic. 64*9880d681SAndroid Build Coastguard Worker; Other sequences besides this one would be OK. 65*9880d681SAndroid Build Coastguard Workerdefine void @f6(i32 *%dst, i32 %a) { 66*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f6: 67*9880d681SAndroid Build Coastguard Worker; CHECK: agfi %r2, -524292 68*9880d681SAndroid Build Coastguard Worker; CHECK: strv %r3, 0(%r2) 69*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14 70*9880d681SAndroid Build Coastguard Worker %ptr = getelementptr i32, i32 *%dst, i64 -131073 71*9880d681SAndroid Build Coastguard Worker %swapped = call i32 @llvm.bswap.i32(i32 %a) 72*9880d681SAndroid Build Coastguard Worker store i32 %swapped, i32 *%ptr 73*9880d681SAndroid Build Coastguard Worker ret void 74*9880d681SAndroid Build Coastguard Worker} 75*9880d681SAndroid Build Coastguard Worker 76*9880d681SAndroid Build Coastguard Worker; Check that STRV allows an index. 77*9880d681SAndroid Build Coastguard Workerdefine void @f7(i64 %src, i64 %index, i32 %a) { 78*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f7: 79*9880d681SAndroid Build Coastguard Worker; CHECK: strv %r4, 524287({{%r3,%r2|%r2,%r3}}) 80*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14 81*9880d681SAndroid Build Coastguard Worker %add1 = add i64 %src, %index 82*9880d681SAndroid Build Coastguard Worker %add2 = add i64 %add1, 524287 83*9880d681SAndroid Build Coastguard Worker %ptr = inttoptr i64 %add2 to i32 * 84*9880d681SAndroid Build Coastguard Worker %swapped = call i32 @llvm.bswap.i32(i32 %a) 85*9880d681SAndroid Build Coastguard Worker store i32 %swapped, i32 *%ptr 86*9880d681SAndroid Build Coastguard Worker ret void 87*9880d681SAndroid Build Coastguard Worker} 88*9880d681SAndroid Build Coastguard Worker 89*9880d681SAndroid Build Coastguard Worker; Check that volatile stores do not use STRV, which might access the 90*9880d681SAndroid Build Coastguard Worker; storage multple times. 91*9880d681SAndroid Build Coastguard Workerdefine void @f8(i32 *%dst, i32 %a) { 92*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f8: 93*9880d681SAndroid Build Coastguard Worker; CHECK: lrvr [[REG:%r[0-5]]], %r3 94*9880d681SAndroid Build Coastguard Worker; CHECK: st [[REG]], 0(%r2) 95*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14 96*9880d681SAndroid Build Coastguard Worker %swapped = call i32 @llvm.bswap.i32(i32 %a) 97*9880d681SAndroid Build Coastguard Worker store volatile i32 %swapped, i32 *%dst 98*9880d681SAndroid Build Coastguard Worker ret void 99*9880d681SAndroid Build Coastguard Worker} 100