xref: /aosp_15_r20/external/llvm/test/CodeGen/SystemZ/atomicrmw-sub-06.ll (revision 9880d6810fe72a1726cb53787c6711e909410d58)
1*9880d681SAndroid Build Coastguard Worker; Test 64-bit atomic subtractions, z196 version.
2*9880d681SAndroid Build Coastguard Worker;
3*9880d681SAndroid Build Coastguard Worker; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s
4*9880d681SAndroid Build Coastguard Worker
5*9880d681SAndroid Build Coastguard Worker; Check addition of a variable.
6*9880d681SAndroid Build Coastguard Workerdefine i64 @f1(i64 %dummy, i64 *%src, i64 %b) {
7*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f1:
8*9880d681SAndroid Build Coastguard Worker; CHECK: lcgr [[NEG:%r[0-5]]], %r4
9*9880d681SAndroid Build Coastguard Worker; CHECK: laag %r2, [[NEG]], 0(%r3)
10*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14
11*9880d681SAndroid Build Coastguard Worker  %res = atomicrmw sub i64 *%src, i64 %b seq_cst
12*9880d681SAndroid Build Coastguard Worker  ret i64 %res
13*9880d681SAndroid Build Coastguard Worker}
14*9880d681SAndroid Build Coastguard Worker
15*9880d681SAndroid Build Coastguard Worker; Check addition of 1, which needs a temporary.
16*9880d681SAndroid Build Coastguard Workerdefine i64 @f2(i64 %dummy, i64 *%src) {
17*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f2:
18*9880d681SAndroid Build Coastguard Worker; CHECK: lghi [[TMP:%r[0-5]]], -1
19*9880d681SAndroid Build Coastguard Worker; CHECK: laag %r2, [[TMP]], 0(%r3)
20*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14
21*9880d681SAndroid Build Coastguard Worker  %res = atomicrmw sub i64 *%src, i64 1 seq_cst
22*9880d681SAndroid Build Coastguard Worker  ret i64 %res
23*9880d681SAndroid Build Coastguard Worker}
24*9880d681SAndroid Build Coastguard Worker
25*9880d681SAndroid Build Coastguard Worker; Check the high end of the LAAG range.
26*9880d681SAndroid Build Coastguard Workerdefine i64 @f3(i64 %dummy, i64 *%src, i64 %b) {
27*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f3:
28*9880d681SAndroid Build Coastguard Worker; CHECK: lcgr [[NEG:%r[0-5]]], %r4
29*9880d681SAndroid Build Coastguard Worker; CHECK: laag %r2, [[NEG]], 524280(%r3)
30*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14
31*9880d681SAndroid Build Coastguard Worker  %ptr = getelementptr i64, i64 *%src, i64 65535
32*9880d681SAndroid Build Coastguard Worker  %res = atomicrmw sub i64 *%ptr, i64 %b seq_cst
33*9880d681SAndroid Build Coastguard Worker  ret i64 %res
34*9880d681SAndroid Build Coastguard Worker}
35*9880d681SAndroid Build Coastguard Worker
36*9880d681SAndroid Build Coastguard Worker; Check the next doubleword up, which needs separate address logic.
37*9880d681SAndroid Build Coastguard Workerdefine i64 @f4(i64 %dummy, i64 *%src, i64 %b) {
38*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f4:
39*9880d681SAndroid Build Coastguard Worker; CHECK-DAG: lcgr [[NEG:%r[0-5]]], %r4
40*9880d681SAndroid Build Coastguard Worker; CHECK-DAG: agfi %r3, 524288
41*9880d681SAndroid Build Coastguard Worker; CHECK: laag %r2, [[NEG]], 0(%r3)
42*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14
43*9880d681SAndroid Build Coastguard Worker  %ptr = getelementptr i64, i64 *%src, i64 65536
44*9880d681SAndroid Build Coastguard Worker  %res = atomicrmw sub i64 *%ptr, i64 %b seq_cst
45*9880d681SAndroid Build Coastguard Worker  ret i64 %res
46*9880d681SAndroid Build Coastguard Worker}
47*9880d681SAndroid Build Coastguard Worker
48*9880d681SAndroid Build Coastguard Worker; Check the low end of the LAAG range.
49*9880d681SAndroid Build Coastguard Workerdefine i64 @f5(i64 %dummy, i64 *%src, i64 %b) {
50*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f5:
51*9880d681SAndroid Build Coastguard Worker; CHECK: lcgr [[NEG:%r[0-5]]], %r4
52*9880d681SAndroid Build Coastguard Worker; CHECK: laag %r2, [[NEG]], -524288(%r3)
53*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14
54*9880d681SAndroid Build Coastguard Worker  %ptr = getelementptr i64, i64 *%src, i64 -65536
55*9880d681SAndroid Build Coastguard Worker  %res = atomicrmw sub i64 *%ptr, i64 %b seq_cst
56*9880d681SAndroid Build Coastguard Worker  ret i64 %res
57*9880d681SAndroid Build Coastguard Worker}
58*9880d681SAndroid Build Coastguard Worker
59*9880d681SAndroid Build Coastguard Worker; Check the next doubleword down, which needs separate address logic.
60*9880d681SAndroid Build Coastguard Workerdefine i64 @f6(i64 %dummy, i64 *%src, i64 %b) {
61*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f6:
62*9880d681SAndroid Build Coastguard Worker; CHECK-DAG: lcgr [[NEG:%r[0-5]]], %r4
63*9880d681SAndroid Build Coastguard Worker; CHECK-DAG: agfi %r3, -524296
64*9880d681SAndroid Build Coastguard Worker; CHECK: laag %r2, [[NEG]], 0(%r3)
65*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14
66*9880d681SAndroid Build Coastguard Worker  %ptr = getelementptr i64, i64 *%src, i64 -65537
67*9880d681SAndroid Build Coastguard Worker  %res = atomicrmw sub i64 *%ptr, i64 %b seq_cst
68*9880d681SAndroid Build Coastguard Worker  ret i64 %res
69*9880d681SAndroid Build Coastguard Worker}
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