1*9880d681SAndroid Build Coastguard Worker; Test 64-bit atomic additions. 2*9880d681SAndroid Build Coastguard Worker; 3*9880d681SAndroid Build Coastguard Worker; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s 4*9880d681SAndroid Build Coastguard Worker 5*9880d681SAndroid Build Coastguard Worker; Check addition of a variable. 6*9880d681SAndroid Build Coastguard Workerdefine i64 @f1(i64 %dummy, i64 *%src, i64 %b) { 7*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f1: 8*9880d681SAndroid Build Coastguard Worker; CHECK: lg %r2, 0(%r3) 9*9880d681SAndroid Build Coastguard Worker; CHECK: [[LABEL:\.[^:]*]]: 10*9880d681SAndroid Build Coastguard Worker; CHECK: lgr %r0, %r2 11*9880d681SAndroid Build Coastguard Worker; CHECK: agr %r0, %r4 12*9880d681SAndroid Build Coastguard Worker; CHECK: csg %r2, %r0, 0(%r3) 13*9880d681SAndroid Build Coastguard Worker; CHECK: jl [[LABEL]] 14*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14 15*9880d681SAndroid Build Coastguard Worker %res = atomicrmw add i64 *%src, i64 %b seq_cst 16*9880d681SAndroid Build Coastguard Worker ret i64 %res 17*9880d681SAndroid Build Coastguard Worker} 18*9880d681SAndroid Build Coastguard Worker 19*9880d681SAndroid Build Coastguard Worker; Check addition of 1, which can use AGHI. 20*9880d681SAndroid Build Coastguard Workerdefine i64 @f2(i64 %dummy, i64 *%src) { 21*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f2: 22*9880d681SAndroid Build Coastguard Worker; CHECK: lg %r2, 0(%r3) 23*9880d681SAndroid Build Coastguard Worker; CHECK: [[LABEL:\.[^:]*]]: 24*9880d681SAndroid Build Coastguard Worker; CHECK: lgr %r0, %r2 25*9880d681SAndroid Build Coastguard Worker; CHECK: aghi %r0, 1 26*9880d681SAndroid Build Coastguard Worker; CHECK: csg %r2, %r0, 0(%r3) 27*9880d681SAndroid Build Coastguard Worker; CHECK: jl [[LABEL]] 28*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14 29*9880d681SAndroid Build Coastguard Worker %res = atomicrmw add i64 *%src, i64 1 seq_cst 30*9880d681SAndroid Build Coastguard Worker ret i64 %res 31*9880d681SAndroid Build Coastguard Worker} 32*9880d681SAndroid Build Coastguard Worker 33*9880d681SAndroid Build Coastguard Worker; Check the high end of the AGHI range. 34*9880d681SAndroid Build Coastguard Workerdefine i64 @f3(i64 %dummy, i64 *%src) { 35*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f3: 36*9880d681SAndroid Build Coastguard Worker; CHECK: aghi %r0, 32767 37*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14 38*9880d681SAndroid Build Coastguard Worker %res = atomicrmw add i64 *%src, i64 32767 seq_cst 39*9880d681SAndroid Build Coastguard Worker ret i64 %res 40*9880d681SAndroid Build Coastguard Worker} 41*9880d681SAndroid Build Coastguard Worker 42*9880d681SAndroid Build Coastguard Worker; Check the next value up, which must use AGFI. 43*9880d681SAndroid Build Coastguard Workerdefine i64 @f4(i64 %dummy, i64 *%src) { 44*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f4: 45*9880d681SAndroid Build Coastguard Worker; CHECK: agfi %r0, 32768 46*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14 47*9880d681SAndroid Build Coastguard Worker %res = atomicrmw add i64 *%src, i64 32768 seq_cst 48*9880d681SAndroid Build Coastguard Worker ret i64 %res 49*9880d681SAndroid Build Coastguard Worker} 50*9880d681SAndroid Build Coastguard Worker 51*9880d681SAndroid Build Coastguard Worker; Check the high end of the AGFI range. 52*9880d681SAndroid Build Coastguard Workerdefine i64 @f5(i64 %dummy, i64 *%src) { 53*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f5: 54*9880d681SAndroid Build Coastguard Worker; CHECK: agfi %r0, 2147483647 55*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14 56*9880d681SAndroid Build Coastguard Worker %res = atomicrmw add i64 *%src, i64 2147483647 seq_cst 57*9880d681SAndroid Build Coastguard Worker ret i64 %res 58*9880d681SAndroid Build Coastguard Worker} 59*9880d681SAndroid Build Coastguard Worker 60*9880d681SAndroid Build Coastguard Worker; Check the next value up, which must use a register addition. 61*9880d681SAndroid Build Coastguard Workerdefine i64 @f6(i64 %dummy, i64 *%src) { 62*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f6: 63*9880d681SAndroid Build Coastguard Worker; CHECK: agr 64*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14 65*9880d681SAndroid Build Coastguard Worker %res = atomicrmw add i64 *%src, i64 2147483648 seq_cst 66*9880d681SAndroid Build Coastguard Worker ret i64 %res 67*9880d681SAndroid Build Coastguard Worker} 68*9880d681SAndroid Build Coastguard Worker 69*9880d681SAndroid Build Coastguard Worker; Check addition of -1, which can use AGHI. 70*9880d681SAndroid Build Coastguard Workerdefine i64 @f7(i64 %dummy, i64 *%src) { 71*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f7: 72*9880d681SAndroid Build Coastguard Worker; CHECK: aghi %r0, -1 73*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14 74*9880d681SAndroid Build Coastguard Worker %res = atomicrmw add i64 *%src, i64 -1 seq_cst 75*9880d681SAndroid Build Coastguard Worker ret i64 %res 76*9880d681SAndroid Build Coastguard Worker} 77*9880d681SAndroid Build Coastguard Worker 78*9880d681SAndroid Build Coastguard Worker; Check the low end of the AGHI range. 79*9880d681SAndroid Build Coastguard Workerdefine i64 @f8(i64 %dummy, i64 *%src) { 80*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f8: 81*9880d681SAndroid Build Coastguard Worker; CHECK: aghi %r0, -32768 82*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14 83*9880d681SAndroid Build Coastguard Worker %res = atomicrmw add i64 *%src, i64 -32768 seq_cst 84*9880d681SAndroid Build Coastguard Worker ret i64 %res 85*9880d681SAndroid Build Coastguard Worker} 86*9880d681SAndroid Build Coastguard Worker 87*9880d681SAndroid Build Coastguard Worker; Check the next value down, which must use AGFI instead. 88*9880d681SAndroid Build Coastguard Workerdefine i64 @f9(i64 %dummy, i64 *%src) { 89*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f9: 90*9880d681SAndroid Build Coastguard Worker; CHECK: agfi %r0, -32769 91*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14 92*9880d681SAndroid Build Coastguard Worker %res = atomicrmw add i64 *%src, i64 -32769 seq_cst 93*9880d681SAndroid Build Coastguard Worker ret i64 %res 94*9880d681SAndroid Build Coastguard Worker} 95*9880d681SAndroid Build Coastguard Worker 96*9880d681SAndroid Build Coastguard Worker; Check the low end of the AGFI range. 97*9880d681SAndroid Build Coastguard Workerdefine i64 @f10(i64 %dummy, i64 *%src) { 98*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f10: 99*9880d681SAndroid Build Coastguard Worker; CHECK: agfi %r0, -2147483648 100*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14 101*9880d681SAndroid Build Coastguard Worker %res = atomicrmw add i64 *%src, i64 -2147483648 seq_cst 102*9880d681SAndroid Build Coastguard Worker ret i64 %res 103*9880d681SAndroid Build Coastguard Worker} 104*9880d681SAndroid Build Coastguard Worker 105*9880d681SAndroid Build Coastguard Worker; Check the next value down, which must use a register addition. 106*9880d681SAndroid Build Coastguard Workerdefine i64 @f11(i64 %dummy, i64 *%src) { 107*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: f11: 108*9880d681SAndroid Build Coastguard Worker; CHECK: agr 109*9880d681SAndroid Build Coastguard Worker; CHECK: br %r14 110*9880d681SAndroid Build Coastguard Worker %res = atomicrmw add i64 *%src, i64 -2147483649 seq_cst 111*9880d681SAndroid Build Coastguard Worker ret i64 %res 112*9880d681SAndroid Build Coastguard Worker} 113