xref: /aosp_15_r20/external/llvm/test/CodeGen/SPARC/LeonInsertNOPLoadPassUT.ll (revision 9880d6810fe72a1726cb53787c6711e909410d58)
1; RUN: llc %s -O0 -march=sparc -mcpu=ut699 -o - | FileCheck %s
2; RUN: llc %s -O0 -march=sparc -mcpu=leon3 -mattr=+insertnopload -o - | FileCheck %s
3
4; CHECK-LABEL: ld_float_test
5; CHECK:       ld [%o0+%lo(.LCPI0_0)], %f0
6; CHECK-NEXT:  nop
7define float @ld_float_test() #0 {
8entry:
9  %f = alloca float, align 4
10  store float 0x3FF3C08320000000, float* %f, align 4
11  %0 = load float, float* %f, align 4
12  ret float %0
13}
14
15; CHECK-LABEL: ld_i32_test
16; CHECK:       ld [%o0], %o0
17; CHECK-NEXT:  nop
18define i32 @ld_i32_test(i32 *%p) {
19  %res = load i32, i32* %p
20  ret i32 %res
21}
22
23; CHECK-LABEL: ld_inlineasm_test_1
24; CHECK:       ld [%o0], %o0
25; CHECK-NEXT:  !NO_APP
26; CHECK-NEXT:  nop
27define float @ld_inlineasm_test_1(float* %a) {
28entry:
29  %res = tail call float asm sideeffect "ld [$1], $0", "=r,r"(float* %a)
30
31  ret float %res
32}
33
34; CHECK-LABEL: ld_inlineasm_test_2
35; CHECK:       ld [%o0], %o0
36; CHECK-NEXT:  !NO_APP
37; CHECK-NEXT:  nop
38define i32 @ld_inlineasm_test_2(i32* %a) {
39entry:
40  %res = tail call i32 asm sideeffect "ld [$1], $0", "=r,r"(i32* %a)
41
42  ret i32 %res
43}